DC1326A - Schematic

REVISION #
REVISION HISTORY
SD PC AD FD
0
0 0 0
2
1
DESCRIPTION
DATE
APPROVED
02/05/09
Fran Hoffart
1st Release
Value Changed - C3,C4,C5.
Added - C14
2
$$$ SD, ML & AD Rev Only $$$
BUCK INPUT
1
BUCK IN
2
PARALLEL
3
BOOST OUT
4
L1
3.3uH
CDRH2D18/HP-3R3NC D1
JP1
E1
BUCK IN
1.8V - 5.5V
+
Sumida
C1
(Opt)
E2 VOUT BOOST
1.8V/3.3V/5V
VOUT BOOST
VOUT BOOST
C2
(Opt)
E11
GND
4.7uF
6.3V
U1
LTC3100EUD
E12
GND
1
SWBST
E4
16
BOOST IN
0.65V - 5V
+
LDO
C13
(Opt)
ON
VBST
VNBST
2
12
R4
499K
1%
10
RUNLDO
VLDO
FBLDO
8
2
RUNBK
JP3
6
BUCK
SWBK
4
D2
(Opt)
PGBK
1
E9
R8
60.4K
1%
R5
R6
R7
90.9K
1%
137K
1%
14.0K
1%
L2
2
3
15
4
JP4
BOOST PGD
R3
715K
1%
11
3
OFF
5
6
5V
C14
10uF
16V
C3
10uF
16V
R13
PGBST
FBBK
MODE
GND
GND
13
7
17
9
GND
1
2
1.5V
3
4
2.85V
5
6
3V
C8
2.2uF
VOUT BUCK
C12
10pF
1
2
1.2V
3
4
1.5V
5
6
1.8V
VOUT BOOST
E5 VOUT LDO
1.5V/2.85V/3V
100mA
C9
1uF
16V
GND
E6
JP6
VOUT BUCK
4.7uH
SD3110-4R7-R
COOPER Bussmann
C4
4.7uF
10V
E3
VOUT LDO
RUNBST
1
ON
R2
619K
1%
C7
33pF
BOOST
SEQ
3.3V
VOUT LDO
14
JP2
ON
R1
249K
1%
3
4
OFF
1.8V
4
JP5
VNBK
FBBST
3
OFF
C5
68pF
2
3
5
C6
2.2uF
1
SEQ
2
1
C10
10uF
6.3V
E7 VOUT BUCK
1.2V/1.5V/1.8V
250mA
C11
1uF
16V
GND
E8
JP7
100K
E10
R14
BUCK PGD
100K
VOUT BUCK
R12
499K
1%
R9
R10
499K
1%
249K
1%
R11
249K
1%
MODE
1
BURST
2
3
PWM
JP8
APPROVALS
This circuit is proprietary to Linear Technology and supplied
for use with Linear Technology parts.
Customer Notice: Linear Technology has made a best effort to
design a circuit that meets customer-supplied specifications;
however, it remains the customers responsibility to verify proper
and reliable operation in the actual application. Component
substitution and printed circuit board layout may significantly
affect circuit performance or reliability. Contact Linear
Applications Engineering for assistance.
LINEAR TECHNOLOGY CORPORATION
APPROVED:
1630 McCARTHY BLVD
www.linear.com
MILPITAS, CA. 95035
LTC Confidential (408)432-1900
For Customer Use Only
(408)434-0507 (FAX)
Title
LTC3100EUD, Synchronous Step-Up and Step-Down
Converters and LDO Regulator
CHECKED:
SD
DRAWN: Rudy Bautista
ENGINEER: Fran Hoffart
Date: Friday, February 13, 2009
Document Number
Rev
Demo Circuit 1326A
C:\ORCADWIN\CAPTURE\1326A\1326A_00_REV2.DSN
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