DEMO MANUAL DC2033A LT6110 Cable/Wire Drop Compensator Description The DC2033A demo board features the LT®6110 cable/ wire drop compensator IC. The LT6110 is a precision high side current sense that monitors load current via a sense resistor and converts the sense voltage to a sinking or sourcing current. Using the LT6110 sourcing or sinking current to control a regulator’s output voltage can compensate for the voltage loss due to a cable/wire drop. The LT6110 includes an internal sense resistor or can be used with an external sense resistor. The DC2033A is jumper-configurable for the LT6110 to use the internal sense resistor, an external 25mΩ sense resistor, or a 5.4mΩ PCB trace sense resistor. The DC2033A default configuration is for the LT6110 to use the internal sense resistor. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Wire Drop Compensation Connections ILOAD RWIRE (Ω) ILOAD VLOAD RIN CLOAD V+ +IN VIN RS –IN VREG LOAD RFA REGULATOR IIOUT LT6110 IOUT + – RFB FB RG V– IMON DC2033 F01 Figure 1. One Cable/Wire Compensation (One Wire to a Load Sharing the Regulator’s Ground) ILOAD RWIRE (Ω) ILOAD RIN +IN VIN V+ + RS –IN CLOAD VREG RFA REGULATOR IIOUT IOUT LT6110 RWIRE (Ω) + – LOAD – VLOAD RFB FB RG IMON V– DC2033 F02 Figure 2. Two Cable/Wire Compensation (One Wire to a Load and One Ground Return Wire) dc2033af 1 DEMO MANUAL DC2033A Performance Summary Specifications are at TA = 25°C PARAMETER MIN Supply Range (V+ to V–) TYP 2 MAX UNITS 50 V 100 300 µV IOUT Current Error (Does Not Include VOS or RIN Errors) I+IN = 10µA I+IN = 100µA I+IN = 1mA 0.6 0.4 1.5 1.6 1 2.5 % % % IMON Current Error (3 • I+IN) I+IN = 100µA 1.5 3 % Amplifier Input Offset Voltage, VOS IOUT Voltage Range 0.4 IOUT Current Error Change for IOUT Voltage 0.4V to 3.5V IMON Current Error Change for IMON Voltage 0V to 3.1V IOUT Signal Bandwidth I+IN = 100µA Supply Current V+ V 0.2 %/V 0.2 %/V 180 16 kHz 30 µA Quick Start Setup The Quick Start Setup of Figure 3, shows the basic connections required for getting familiar with a DC2033A. An ammeter is used to measure the load current to a 5Ω load or an active load. To confirm the operation of the LT6110, connect a wire jumper from VOUT1 to regulator. This jumper connects the power supply 5V to the ROUT 100Ω pull-up resistor. The voltmeter across ROUT is for monitoring the IIOUT current. A DC2033A is assembled with a 402Ω RIN1 resistor to provide quick testing convenience. The RIN1 resistor and the VSENSE voltage set the LT6110 output current (IIOUT). To begin, adjust the power supply for 1A load current. With 1A load current flowing through the internal 20mΩ RSENSE resistor and 100µV VOS, the IIOUT current is 50µA, (1A • 20mΩ + 100µV)/402Ω. The voltmeter should read 5mV (50µA • 100Ω) ± the RSENSE, VOS, RIN1, ROUT and IIOUT errors. Figure 4 shows the Quick Setup schematic and IIOUT equations. Figure 3. Quick Start Setup dc2033af 2 DEMO MANUAL DC2033A Quick Start Setup REGULATOR E1 5V POWER SUPPLY ILOAD 1A ILOAD 1A RJ3 0Ω C2 0.1µF GND E3 RJ1 0Ω RJ2 0Ω 5Ω LOAD E4 GND R1 1k RIN1 402Ω +IN V+ E1 TO E5 WIRE JUMPER E2 RS –IN RSENSE IIOUT ROUT 100Ω E5 VOUT1 IIOUT = VOUT1 − VOUT2 ROUT IIOUT = ILOAD • RSENSE + VOS RIN1 RJ10 0Ω E6 VOUT2 LT6110 IOUT IMON + – V– DC2033 F04 E7 IMON RMON 100Ω 3× IIOUT EB ROUT = 100 RIN1 = 402 TYPICAL VOS = 100µV RSENSE = 20mΩ, ±15% Figure 4. DC2033A Quick Setup Circuit and Equations Setting Up the DC2033A for Wire Compensation Testing The DC2033A default circuit uses the LT6110 internal 20mΩ sense resistor (RSENSE) and is configured with 0Ω RJ1, RJ2 and RJ3 are installed with 0Ω jumpers. The RJ1 and RJ2 are standard 0Ω jumpers and connect the LT6110 amplifier across the internal RSENSE. The RJ1 and RJ2 resistance is not a concern as the current flowing through them is very small (the resistance variation of standard 0Ω resistors is 20mΩ to 100mΩ). However, a standard 0Ω jumper must not be used in the path of the load current because the jumper's I • R drop adds an error term to a wire drop compensation design (for example the I • R drop of a 50mΩ jumper for 2A is 100mV). The RJ3 jumper is ultra-0Ω, with less than 1mΩ and rated for 30A at 70°C. The RJ3 jumper can be removed and re-installed as RJ6 or RJ9, to configure the DC2033A with an LT6110 and an external RSENSE (for an alternative to an ultra-0Ω jumper install two 0.25 inch length of 18AWG solid copper wires in parallel for up to 20A ILOAD). The RIN1 resistor and the VSENSE voltage set the LT6110 output current (IIOUT) for regulator output voltage control. The IIOUT current connects to the regulator feedback resistors and boosts the regulator's output voltage (VREG). The VREG voltage increases directly with the load current and cancels the wire's I • R drop (VDROP) to the remote load. A DC2033A has 0805 size pads for installing a switching regulator's feedback resistors (RFA, RFB and RG). A low quiescent current switching regulator has 10µA or less current flowing through the feedback divider and requires dc2033af 3 DEMO MANUAL DC2033A Quick Start Setup three feedback resistors for an LT6110 connection, as in Figure 1. In addition, a DC2033A includes pads for a feedback loop compensation capacitor, C4. VREG is the no-load current regulator output voltage. Quick Design Equations: V RIN1 = SENSE VSENSE = ILOAD•RSENSE IIOUT A Quick Design Guide. Variable Definitions: V RFA = DROP VDROP = ILOAD•(RSENSE +R WIRE ) IIOUT ILOAD is the maximum load current and IIOUT is the LT6110 output current, (design target is 100µA). RSENSE is the LT6110 internal or external current sense resistor and RWIRE is the copper wire resistance. (RWIRE includes the resistance of the load current carrying PCB traces and wire connectors minus the RSENSE resistance). VFB is the regulator's feedback reference voltage. IQ is the no-load quiescent current flowing through the resistor feedback divider, (IQ = VFB/RG), (refer to the regulator’s demo manual). –V V RFB = REG FB RG = IQ VFB IQ Quick Design Check: VREG = (RFA +RFB +RG )•IQ NOTE: For DC2033A REGULATOR input voltages higher than 36V, remove the RJ10 jumper sorting the 27V Zener, D1. Refer to the LT6110 data sheet for additional application circuits and information. dc2033af 4 DEMO MANUAL DC2033A ApplicationS DC2033A Application Options The DC2033A with a Regulator Demo Board The DC2033A is designed to be used with a regulator board and copper wire. On board jumper pads and turrets configure an LT6110 circuit using 0Ω jumpers and provide for wired connections to a regulator board. Figures 6, 7 and 8 show typical DC2033 application circuit options. A DC2033A board can be configured and connected to a regulator demo board for a complete cable/wire drop compensation system evaluation. Typically a regulator demo board includes a feedback resistor divider that sets the output voltage VREG. Remove the feedback resistors from the regulator board and connect the regulator’s feedback pin (FB or VREF) to the DC2033A VFB (E9). In addition, connect the VOUT and GND of the regulator board to the REGULATOR (E1) and to the GND (E3) of the DC2033A respectively. Figure 5 shows Linear Technology’s buck regulator demo board, DC1458A, connected to a DC2033A, using an external sense resistor, REXT. The DC1458A demo board includes the LT3972, 5V at 3.5A buck regulator. Figure 6 shows the complete cable/wire compensation schematic. Table 2. DC2033A Current Sense Resistor, RSENSE and Jumper Options RSENSE JUMPERS JUMPERS RESISTANCE (25°C) STANDARD 0Ω ULTRA-0Ω Internal 20mΩ at ILOAD = 1A, (16.5mΩ to 22.5mΩ LT6110 RSENSE 22mΩ at ILOAD = 3A, (18.5mΩ to 24.5mΩ External REXT External RPCB ILOADMAX RJ1, RJ2 RJ3 3A at 125°C 25mΩ at ILOAD = 1A, ±1% RJ4, RJ5 RJ6 6A at 70°C 5A at 90°C 5.4mΩ at ILOAD = 1A, ±15% RJ7, RJ8 RJ9 20A at 25°C 10A at 90°C 5.7mΩ at ILOAD = 10A, ±15% NOTE: The LT3972 R2 and R3 feedback resistors are removed from the DC1458A board and are on the DC2033A board (RFA, RFB and RG). The no-load LT3972 voltage is Figure 5. DC1458A and DC2033A Connections dc2033af 5 6 E4 EXTSS E2 GND E8 GND E1 VIN RUN SHDN EXTSS + JP1 1 2 3 4 C2 22µF D1 MBRA340T3 LT3972 BUCK REGULATOR DC1458A C7 0.22µF SYNC ON JP2 C8 100pF SYNC BURST MODE GND PGOOD VIN RUN/SS FB SW RT VC LT3972EMSE BOOST BD 1 2 3 C6 1000pF R5 15k R1 63.4k R3 R2 R4 100k C4 47µF E9 SYNC E3 GND E7 PGOOD C5 0.1µF E6 GND R2 AND R3 ARE REMOVED. E5 VOUT 5V AT 3.5A E9 VFB C4 47pF E3 GND E1 REGULATOR RJ4 0Ω IIOUT RJ10 0Ω E6 VOUT2 ROUT 100Ω E5 RG 100k VOUT1 RFB 523k RFA 9.53k E7 IMON RMON 100Ω V– + – 3× IIOUT LT6110 RSENSE RS REXT ILOAD 25mΩ 3.5A +IN V+ C2 0.1µF ILOAD 3.5A IMON IOUT RFA, RFB and RG RIN VALUES ARE FOR 866Ω COMPENSATION OF 10ft, 24AWG WIRE AND 5V AT 3.5A LOAD. LT6110 WIRE DROP COMPENSATOR DC2033A DC1458 TO DC2033 CONNECTIONS. EB –IN R1 1k RJ5 0Ω RJ6 0Ω DC2033 F06 E4 GND E2 LOAD Figure 6. An LT3972 5V at 3.5A Buck Regulator with LT6110 Circuit Compensating for the Drop of a 10ft, 24AWG Cable/Wire R6 100k C3 4.7µF C1 0.47µF L1 6.8µH LOAD 47µF VLOAD 5V 3.5A RWIRE 24AWG 10ft 0.25Ω DEMO MANUAL DC2033A ApplicationS dc2033af DEMO MANUAL DC2033A ApplicationS 5V and the feedback voltage, VFB is 0.79V. The values of the feedback resistors are selected using the Quick Design Guide with an IQ = 8µA. The specified quiescent current is 8µA. Resistors RFA, RFB and RG are 9.53k, 523k and 100k respectively. VREG = (9.53k + 523k + 100k) • 8µA = 5V (±1% and ±1.27% resistor and VFB tolerance respectively). RJ7 and RJ8. Figure 7 shows the DC2033A schematic with LT6110 and PCB RSENSE. The copper thickness of a DC2033A PCB trace is two ounces. A typical resistance for a 2oz square trace is 0.25mΩ at 25°C. The RPCB serpentine trace length is six 0.15 × 0.6 inch rectangular traces connected by 0.015 × 0.15 inch traces. The current path area of each rectangular trace is equivalent to three and one-half squares. The RPCB resistance is 5.4mΩ at 25°C, ±15%. RWIRE is the total resistance from the regulator output to the remote load (minus the RSENSE resistance). The DC2033A PCB Trace RSENSE A DC2033A has a serpentine PCB trace that can be used as an LT6110 external sense resistor for high load currents (5A to 20A). Remove RJ3 ultra-0Ω jumper and install as RJ9. Remove standard 0Ω jumpers RJ1 and RJ2 and install DC2033A E1 REGULATOR VIN ILOAD VREG RJ9 0Ω ILOAD RJ8 0Ω RJ7 0Ω E3 GND REGULATOR *RPCB 5.4mΩ ±15% C2 0.1µF FB +IN V+ RS E9 VFB RFB RG E5 VOUT1 RJ10 0Ω E6 VOUT2 CLOAD VLOAD LOAD *RPCB IIOUT ROUT 100Ω (WIRE RESISTANCES) –IN RSENSE RFA E4 GND RWIRE R1 1k RIN1 C4 E2 LOAD LT6110 IOUT IMON + – V– DC2033 F07 E7 IMON RMON 100Ω 3× IIOUT EB Figure 7. DC2033 Configured for RPCB (PCB Trace Sense Resistor) dc2033af 7 DEMO MANUAL DC2033A ApplicationS The RJ9 jumper in the load current path must be ultra-0Ω, 1mΩ or less (the jumper's I • R drop adds an error term to a wire drop compensation design). The RJ3 jumper is ultra-0Ω, less than 1mΩ and can be removed and installed as RJ9 (for an alternative to an ultra-0Ω jumper install two 0.25 inch length of 18AWG solid copper wires in parallel for an RJ9 jumper). Using the DC2033A with an LT6110 DFN Package The bottom layer of a DC2033A is designed for an LT6110 DFN IC. To use a DC2033A for evaluating with an LT6110 DFN IC with an internal RSENSE requires the following: Remove U1 (LT6110 SOT IC) and jumper RJ3 from the top of the board. Install a U2 (LT6110 DFN), RJ11 and RJ12 on the bottom of DC2033A. Figure 8 shows the schematic of a DC2033A with an LT6110 DFN package. The DC2033A PCB layout is optimized for an LT6110 SOT23 package. A DC2033A with a LT6110 DFN (U2) and an internal RSENSE, adds a 2% RSENSE error due to a PCB via from the top to the bottom PCB layer. In addition to using a DC2033A with a LT6110 DFN and an internal RSENSE, the DC2033A can be configured for an LT6110 DFN with an external REXT or RPCB current sense resistor (refer to the jumper table on the DC2033A schematic). The load current path RJ6, RJ9, RJ11 and RJ12 jumpers must be ultra-0Ω, less than 1mΩ, (for an alternative to an ultra-0Ω jumper install two 0.25 inch length of 18AWG solid copper wires in parallel for an RJ6, RJ9, RJ11 or RJ12 jumper). dc2033af 8 DEMO MANUAL DC2033A ApplicationS DC2033A E1 REGULATOR VIN E1 REGULATOR RJ11 0Ω VREG REGULATOR ILOAD RJ12 0Ω ILOAD C2 0.1µF E3 GND E3 GND RJ1 0Ω RJ2 0Ω RIN1 R1 1k FB +IN V+ RS E2 LOAD E4 GND RWIRE 0Ω CLOAD VLOAD LOAD –IN RSENSE IIOUT C4 E9 VFB RFA ROUT 100Ω RJ10 0Ω LT6110 IOUT + – RFB RG E5 VOUT1 E6 VOUT2 IMON V– DC2033 F08 E7 IMON RMON 100Ω 3× IIOUT EB Figure 8. DC2033 Configure with an LT6110 DFN Package and Internal RSENSE dc2033af 9 DEMO MANUAL DC2033A Parts List ITEM QTY REFERENCE PART DESCRIPTION 1 MANUFACTURER/PART NUMBER 0 C1, C4 CAP, X7R, 50V, 10%, 0603 OPT 2 1 C2 CAP, X7R, 0.1µF, 50V, 10%, 0603 3 0 C3 CAP, X7R, 50V,1206 OPT 4 1 D1 DIODE, ZENER 27V 200MW SOD-323 DIODES/ZETEX, BZT52C27S-7-F 5 4 E5, E6, E7, E9 TESTPOINT, TURRET, 0.063" MILL-MAX, 2308-2-00-80-00-00-07-0 6 5 E1 TO E4, E8 TESTPOINT, TURRET, 0.093" MILL-MAX, 2501-2-00-80-00-00-07-0 VISHAY, WSL2512R0250FEA18 TDK C1608X7R1H104K 7 1 REXT CURRENT SENSE RESISTOR 0.025Ω 1% 2512 8 0 RIN2, RG, RFA, RFB RES, CHIP, 1%, 1/8W, 0805 OPT 9 1 RIN1 RES, CHIP, 1%, 1/8W, 402Ω, 0805 VISHAY, CRCW0805402RFKEA 10 3 RJ1, RJ2, RJ10 RES, 0Ω JUMPER, 0805 VISHAY, CRCW08050000Z0EA 11 0 RJ4, RJ5, RJ7, RJ8 RES, 0Ω JUMPER, 0805 OPT 12 1 RJ3 RES, ULTRA-0Ω JUMPER, 2512 NACOMA/TEPRO RN5326 13 0 RJ6, RJ9, RJ11, RJ12 RES, ULTRA-0Ω JUMPER, 2512 OPT USE TWO 0.25in,18AWG SOLID COPPER WIRES IN PARALLEL 14 2 ROUT, RMON RES, CHIP, 1%, 1/8W, 100Ω, 0805 VISHAY, CRCW0805100RFKEA 15 0 RPCB RES PCB TRACE, 5.4mΩ, ±15% (PCB TRACE RESISTOR) 16 1 R1 RES, CHIP, 1%, 1/8W, 1k, 0805 VISHAY, CRCW08051K00FKEA 17 1 U1 IC, WIRE DROP COMPENSATOR, TSOT-23-8 LINEAR TECHNOLOGY, LT6110ITS8#PBF 18 0 U2 IC, WIRE DROP COMPENSATOR, 8 LEAD DFN, OPT 19 4 MH1, MH2, MH3, MH4 STANDOFF, SNAP ON KEYSTONE, 8831 dc2033af 10 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C D 5 4 4 3 3 5 2 1 TECHNOLOGY 1 2 A B C D DEMO MANUAL DC2033A Schematic Diagram dc2033af 11 DEMO MANUAL DC2033A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc2033af 12 Linear Technology Corporation LT 0413 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2013