DC1353A - Schematic

5
4
3
2
1
REVISION #
REVISION HISTORY
SD PC AD FD
PGOOD
E6
D
0
0 0 0
2
2
2
DESCRIPTION
DATE
APPROVED
1st Release
2
05/26/09
T. Gross
INTVcc
E1
R1
D
INTVcc
100K
C1
E7
R9
1
TRACK
0 Ohm
JP5
TRACK
3
R10
(Opt)
2.2uF
16V
U1
LTC3601EUD
2
13
SS
(SOFT-START)
1
15
16
INTVcc
C6
22uF
16V
1210
(Opt)
MODE/SYNC
1
2
3
4
(FORCED CONTINUOUS MODE) FCM 5
6
SYNC
7
6
C8
0.1uF
25V
PGOOD INTVCC BOOST
C9
2200pF
BURST MODE
SYNC
2
4
C
E8
D1
CMDSH-3TR
(Opt)
C3
22uF
16V
1210
14
TRACK
SW
SW
MODE/SYNC
VON
VIN
VIN
FB
ITH
RUN
RT
PGND
10
17
3
4
8
12
SGND
9
+
E4
C4
47uF
6.3V
1210
VISHAY
R3
115K
1%
C5
10pF
11
RITH
CITH
13K
220pF
C7
(Opt)
1210
C10
(Opt)
1210
VOUT
1.2V/1.8V/3.3V @ 1.5A
C
E5
GND
E9
GND
CC
R4
115K
1%
R5
57.6K
1%
R6
25.5K
1%
JP1
1.2V
JP2
1.8V
JP3
3.3V
R7
(Opt)
22pF
(Opt)
R11
324K
1%
E2
RON
0 Ohm
JP6
VIN
4V - 15V
L1
2.2uH
IHLP-2020BZ-ER-2R2M01
JP4
USER SELECT
*
C2
3.3uF
35V
E3
GND
B
B
RUN
ON
1
2
2
3
OFF
INTVcc
JP7
A
ITH
FREQ
1
R8
1M
*
1
1MHz
EXT
2
3
JP8
2MHz
(Int.)
INTVcc
3
INT
JP9
APPROVALS
C2 IS AN OPTIONAL CAPACITOR. IT IS INSERTED
ON THE DC1353A TO DAMPEN THE (POSSIBLE)
RINGING VOLTAGE DUE TO THE LONG INPUT LEADS.
ON A NORMAL, TYPICAL PCB, WITH SHORT TRACES,
THE CAPACITOR IS NOT NEEDED.
5
4
This circuit is proprietary to Linear Technology and supplied
for use with Linear Technology parts.
Customer Notice:Linear Technology has made a best effort to
design a circuit that meets customer-supplied specifications;
however, it remains the customers responsibility to verify proper
and reliable operation in the actual application. Component
substitution and printed circuit board layout may significantly
affect circuit performance or reliability. Contact Linear
Applications Engineering for assistance.
3
DRAWN: Rudy Bautista
ENGINEER: Tom Gross
LINEAR TECHNOLOGY CORPORATION
1630 McCARTHY BLVD
MILPITAS, CA. 95035
(408)432-1900
(408)434-0507 (FAX)
Title
LTC Confidential For Customer Use Only
LTC3601EUD
1.5A Monolithic Synchronous Buck Regulator
APPROVED:
SD
CHECKED:
Date:
A
www.linear.com
Friday, July 24, 2009
2
Document Number
Rev
Demo Circuit 1353A
C:\ORCADWIN\CAPTURE\1353A\1353A_REV2.DSN
1
Sheet
1
2
of
1
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