DC1352A - Demo Board

QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
LTC3857EGN-1/LTC3858EGN-1
DESCRIPTION
Demonstration circuit 1352A is a Low Quiescent
Current, Dual Output Synchronous Buck Converter featuring the LTC3857EGN-1/LTC3858EGN-1.
The circuit is single sided layout, while the package style for the LTC3857/8EGN-1 is a 28-lead
narrow plastic SSOP.
The main features of the board include rail tracking (LTC3857EGN-1 only), an internal 5V linear
regulator for bias, RUN pins for each output, a
PGOOD signal (CH1 only) and a Mode selector
that allow the converter to run in CCM, pulse skip
or Burst Mode operation. Synchronization to an
external clock is also possible.
Two versions of the board are available. DC1352A-A is for the LTC3857EGN-1, while the
DC1352A-B is for the LTC3858EGN-1. The
Table 1.
LTC3857EGN-1 offers lower quiescent current
and smaller burst mode ripple, while the
LTC3858EGN-1 offers latch-off protection and increased burst mode efficiency.
The wide input voltage range of 4.5V to 36V is
suitable for automotive or other battery fed application where low quiescent current is important.
The LT3857EGN-1 and LTC3858EGN-1 datasheets give a complete description of these parts,
operation and application information. The datasheets must be read in conjunction with this quick
start guide for demo circuit 1352A.
Design files for this circuit board are available.
Call the LTC factory.
Burst Mode is a trademark of Linear Technology Corporation
Performance Summary (TA = 25°C)
PARAMETER
CONDITION
VALUE
Minimum Input Voltage
4.5V#
Maximum Input Voltage
36V
Output Voltage VOUT1
VIN = 4.5V to 36V, IOUT1 = 0A to 5A
3.3V ±2%
Output Voltage VOUT2
VIN = 9V to 36V, IOUT2 = 0A to 3A
8.5V ±2%
Nominal Switching Frequency
350kHz
VIN = 24V
VIN = 36V
VOUT1 = 3.3V, IOUT1 = 5A
92.5%* Typical
90.4%* Typical
VOUT2 = 8.5V, IOUT1 = 3A
96.6%* Typical
95.4%* Typical
Efficiency, DC1352A-A/B
See Figures 3 to 6 for efficiency curves
* Measured at bulk output capacitor
#
Minimum input voltage required for 8.5Vout regulation is 9Vin
QUICK START PROCEDURE
Demonstration circuit 1352A is easy to set up to
evaluate the performance of the LTC3857EGN1/LTC3858EGN-1. Refer to Figure 1 for proper
measurement equipment setup and follow the
procedure below:
NOTE: When measuring the input or output voltage
ripple, care must be taken to avoid a long ground
lead on the oscilloscope probe. Measure the input
or output voltage ripple by probing directly across
the bulk Vin or Vout capacitor. See Figure 2 for
proper scope probe technique.
1. Place jumpers in the following positions:
1
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
JP2
Burst Mode
JP3
On
JP4
On
JP5
SS
JP6
SS
4. Check for the proper output voltages.
Vout1 = 3.234V to 3.366V,
Vout2 = 8.330V to 8.670V
NOTE: If there is no output, temporarily disconnect the load to make sure that the load is not
set too high.
5. Once the proper output voltages are estab-
2. With power off, connect the input power supply
lished, adjust the loads within the operating
range and observe the output voltage regulation, ripple voltage, efficiency and other parameters.
to Vin and GND.
3. Turn on the power at the input.
NOTE: Make sure that the input voltage does not
exceed 26V.
6. Different operating modes can be evaluated by
changing position of jumper JP3.
Iout1
+
A
Vout1
Vout1
load
-
V
+
-
Iin
A
+
V
-
Vin
+
Vin supply
-
Vout2
load
+
-
V
+
Vout2
A
Iout2
Figure 1. Proper Measurement Equipment Setup
2
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
Figure 2. Measuring Input or Output Ripple Directly Across Bulk Capacitor
RAIL TRACKING
Demonstration circuit 1352 is setup for independent soft start without tracking. The soft start
ramp-rate is determined by the value of the SS
capacitors C1 and C23. This board can also be
operated in coincident tracking mode with either
Table 2.
output as master or both can slave an external
ramp Refer to Table 2 for tracking options and to
the data sheet for more details.
Output Tracking Options
TRACK/SS JUMPERS
CONFIGURATION
JP3
JP4
TERMINALS
TRACK1
TRACK2
Soft Start Without Tracking
Vout1
SS
Vout2
No connection / Don’t care
SS
No connection / Don’t care
Coincident Tracking:
Vout1 tracking External Ramp
TRACK
Vout2 tracking External Ramp
Connect external ramp
TRACK
Connect external ramp
Vout2 tracking Vout1
SS
TRACK
No connection / Don’t care
Connect to Vout1
Vout1 tracking Vout2
TRACK
SS
Connect to Vout2
No connection / Don’t care
3
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
INDUCTOR DCR SENSING AND RESISTOR SENSING
The DCR sense circuit uses the resistive voltage
drop across the inductor to estimate the current.
In contrast to the traditional sense resistor current feedback, the DCR sensing circuit offers
lower cost and higher efficiency, but results in
less accurate current limit due to the large variation of the inductor DC resistance. Furthermore,
this indirect current sensing method cannot
detect inductor saturation and requires the use
of ‘soft’ saturating inductors (such as powder
Table 3.
iron) resulting in increased core losses or ‘hard’
saturating inductors (such as ferrite) with sufficiency high current ratings resulting in increased
inductor size.
For modifying the demo board for DCR sensing,
please refer to Table 3. A full load efficiency improvement of between 0.25% – 0.75% is still
possible with optional DCR sensing, but since
the inductors are ferrite based, short circuit performance may be compromised.
DCR sensing component selection
REMOVE RSENSE NETWORK
DCR NETWORK
Vout1
R8, R9 = Open, R10 = Short
R28 = 1.37kΩ
R30 = 2.74kΩ
R29 = 0Ω
C6 = 0.47µF
Vout2
R20, R21 = Open, R17 = Short
R32 = 1.91kΩ
R31 = 1.54kΩ
R33 = 0Ω
C18 = 0.47µF
FREQUENCY SYNCHRONIZATION
Demonstration circuit 1352’s Mode selector allows the converter to run in CCM, pulse skip or
Burst Mode operation by changing position of
jumper JP2. For synchronizing to an external
clock source, remove jumper JP2 entirely and
apply the external clock signal to the
PLLIN/MODE pin. Please refer to datasheet for
details on external clock signal requirements.
4
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
LTC3857EGN-1
Figure 3. Typical Efficiency vs. Load Current for A-A board – 24Vin, 3.3Vout and 8.5Vout
LTC3857EGN-1
Figure 4. Typical Efficiency vs. Load Current for A-A board – 36Vin, 3.3Vout and 8.5Vout
5
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
LTC3858EGN-1
Figure 5. Typical Efficiency vs. Load Current for A-B board – 24Vin, 3.3Vout and 8.5Vout
LTC3858EGN-1
Figure 6. Typical Efficiency vs. Load Current for A-B board – 36Vin, 3.3Vout and 8.5Vout
6
[1]
VIN
LTC3857EGN-1
LTC3858EGN-1
-B
0
R22
-A
C22
4.7uF
10V
EXTVCC
2.2uF
C19
U1
E15
E3
E2
INTVCC
66.5K
OPT
R35
VIN
1%
R37
[1]
12.7K
OPT
R37
VOUT2
C28
OPT
3
1
2
OFF
3
ON
1
2
JP4
OFF
R34
OPT
BURST M ODE
PULSE SKIP
CCM
R4
1%
VOUT2
C18
1000pF
C6
OPT
C26
R9
0
OPT
C29
R19
976K
1%
3300pF
0
R24
97.6K 1%
R23
R21
0
SNS2+
R25
10K
1%
3
T RACK
JP6
T RACK2
R20
0
1000pF
9
8
7
6
5
4
3
2
1
C27
TRACK/SS2
ITH2
VFB2
SNS2+
1
0.1uF
C23
SS
OPT
14
13
12
11
SNS2-
RUN2
RUN1
SGND
TG2
SW2
BOOST2
BG2
INTVCC
EXTVCC
PGND
VIN
BG1
BOOST1
SW1
TG1
PGOOD1
15
16
17
18
19
20
21
22
23
24
25
26
27
28
3
JP5
T RACK1
1
SS
C16
R15
C10
D3
TG2 SHT 2
4
Q3
BSZ097N04LS
0.1uF
C12
0
INTVCC
4
R14
INTVCC
INTVCC
CMDSH-4E
10V
C11 4.7uF
D2
CMDSH-4E
TG1 SHT 2
R1
200K
0.1uF
SW2 SHT 2
0.1uF
2.2
*
2.2
0.1uF
C1
EXTVCC
R13
T RACK
R3
11.5K
TRACK/SS1
[1]
U1
35.7K
R2
PLLIN/MODE
FREQ
SNS1-
SNS1+
VFB1
ITH1
OPT
R26
SNS2- 10
[2] FOR REGULATION VIN > 9V
C21 OPT
1%
R16 15K C15
* (14V MAX)
R18
102K
1%
R35
[1]
0
SNS1-
C14 47pF
R8
0
R7
0
R6
VOUT1
SNS1+
182K 1%
R5
C2 10pF
VOUT2
R38
OPT
INTVCC
4700pF
C4
57.6K
C3 22pF
R11 8.2K
ON
R36
OPT
6
4
2
RUN2
JP3
JP2
M ODE
RUN1
E9
E4
5
3
1
E10
ASSY
TRACK2
* EXTVCC
INTVCC
SGND
PLLIN / MODE
100K
R27
INTVCC
TRACK1
PGOOD1
2
E1
2
BG2 SHT 2
Q4
BSZ097N04LS
4
VIN
4
BG1
SHT 2
Q2
BSZ097N04LS
C13
+ 47uF
50V
VIN
SW1 SHT 2
BSZ097N04LS
Q1
VIN
5
6
7
8
1
2
3
5
6
7
8
1
2
3
5
6
7
8
1
2
3
1
2
3
5
6
7
8
INTVCC
OPT
R30
CDEP105-7R2M
L2 7.2uH
R32
OPT
OPT
R31
SNS1+
SNS1-
0.008
R17
SNS2-
SNS2+
R33
OPT
OPTIONAL DCR
SENSING
0.005
R10
R29
OPT
OPTIONAL DCR
SENSING
R28
OPT
CDEP105-3R2M
L1 3.2uH
10uF
16V
C20
VOUT2
VIN
100uF
6.3V
C5
VOUT1
VOUT1
GND
VIN
VIN
GND
GND
GND
J5
GND
E14
8.5V / 3A
[2]
GND
VOUT2
VOUT2
E13
E6
J4
4.5V - 36V
J3
E5
E12
J2
3.3V / 5A
J1
COUT4
+ OPT
J6
4.7uF
50V
4.7uF
50V
COUT2
+ 68uF
10V
C7
+ COUT3
OPT
C17
+ COUT1
220uF
4V
VOUT1
E11
NOTE: WHEN DCR SENSING IS IMPLEMENTED, SHORT R10 AND R17,
DO NOT STUFF R8,R9,R20 AND R21
OPTIONAL DCR SENSING:
LOW QUIESCENT CURRENT, DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1352A
7
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