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Datasheet
Operational Amplifiers
Ultra Low Supply Current
CMOS Operational Amplifiers
BU7271G
BU7271SG
General Description
Key Specifications
 Operating Supply Voltage (single supply):
+1.8V to +5.5V
 Supply Current:
8.6µA(Typ)
 Temperature Range:
BU7271G
-40°C to +85°C
BU7271SG
-40°C to +105°C
 Input Offset Current:
1pA (Typ)
 Input Bias Current:
1pA (Typ)
The BU7271G is low voltage operation input/output full
swing ultra-low supply current CMOS operational
amplifiers. The BU7271SG has an extended operating
temperature range. They have feature of low supply
current and low input bias current. There are suitable
for battery-powered equipments and sensor amplifiers.
Features




Ultra Low Supply Current
Low Operating Supply Voltage
Wide Operating Temperature Range
Low Input Bias Current
Packages
SSOP5
W(Typ) x D(Typ) x H(Max)
2.90mm x 2.80mm x 1.25mm
Applications




Sensor Amplifier
Consumer Equipment
Battery-powered Equipment
Portable Equipment
Simplified Schematic
VDD
Vbias
IN+
Class
AB control
OUT
IN-
Vbias
VSS
Figure 1. Simplified Schematic
○Product structure:Silicon monolithic integrated circuit
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BU7271G
Datasheet
BU7271SG
Pin Configuration
BU7271G, BU7271SG: SSOP5
Pin No.
IN+
5
1
VSS
2
IN-
3
Pin Name
1
IN+
+
2
VSS
-
3
IN-
4
VDD
OUT
4
OUT
5
VDD
Package
SSOP5
BU7271G
BU7271SG
Ordering Information
B
U
7
2
7
1
x
x
-
Package
G: SSOP5
Part Number
BU7271G
BU7271SG
T R
Packaging and forming specification
TR: Embossed tape and reel
Line-up
Topr
Package
Orderable Part Number
-40°C to +85°C
SSOP5
Reel of 3000
BU7271G-TR
-40°C to +105°C
SSOP5
Reel of 3000
BU7271SG-TR
Absolute Maximum Ratings (TA=25°C)
Parameter
Ratings
Symbol
Supply Voltage
BU7271G
BU7271SG
VDD - VSS
Unit
+7
V
(Note 1,2)
W
VID
VDD - VSS
V
VICM
(VSS-0.3) to (VDD+0.3)
V
II
±10
mA
Operating Supply Voltage
Vopr
+1.8 to +5.5
V
Operating Temperature
Topr
Storage Temperature
Tstg
- 55 to +125
°C
Maximum
Junction Temperature
TJmax
+125
°C
Power Dissipation
Differential Input Voltage
PD
(Note 3)
Input Common-mode
Voltage Range
Input Current (Note 4)
SSOP5
0.54
- 40 to +85
- 40 to +105
°C
(Note 1) To use at temperature above TA=25C reduce 5.4mW/°C.
(Note 2) Mounted on a FR4 glass epoxy PCB70mm×70mm×1.6mm (copper foil area less than 3%).
(Note 3) The voltage difference between inverting input and non-inverting input is the differential input voltage.
Then input terminal voltage is set to more than VSS.
(Note 4) An excessive input current will flow when input voltages of more than VDD+0.6V or less than VSS-0.6V are applied.
The input current can be set to less than the rated current by adding a limiting resistor.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open
circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case
the IC is operated over the absolute maximum ratings.
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BU7271G
Datasheet
BU7271SG
Electrical Characteristics
○BU7271G, BU7271SG(Unless otherwise specified VDD=+3V, VSS=0V, TA=25°C)
Limit
Temperature
Parameter
Symbol
Range
Min
Typ
Max
Unit
Conditions
Input Offset Voltage (Note 5)
VIO
25°C
-
1
8
mV
Input Offset Current (Note 5)
IIO
25°C
-
1
-
pA
-
Input Bias Current (Note 5)
IB
25°C
-
1
-
pA
-
Supply Current (Note 6)
IDD
Maximum Output Voltage(High)
25°C
-
8.6
17
Full range
-
-
25
VOH
25°C
VDD-0.1
-
Maximum Output Voltage(Low)
VOL
25°C
-
Large Signal Voltage Gain
AV
25°C
VICM
Common-mode Rejection Ratio
VDD=1.8V to 5.5V
μA
RL=∞, AV=0dB
IN+=1.5V
-
V
RL=10kΩ
-
VSS+0.1
V
RL=10kΩ
70
100
-
dB
RL=10kΩ
25°C
0
-
3
V
VSS to VDD
CMRR
25°C
45
60
-
dB
-
Power Supply Rejection Ratio
PSRR
25°C
60
80
-
dB
-
Output Source Current (Note 7)
ISOURCE
25°C
2
4
-
mA
OUT=VDD-0.4V
Output Sink Current (Note 7)
ISINK
25°C
4
8
-
mA
OUT=VSS+0.4V
Slew Rate
SR
25°C
-
50
-
V/ms
CL=25pF
GBW
25°C
-
90
-
kHz
CL=25pF, AV=40dB
θ
25°C
-
60
-
deg
CL=25pF, AV=40dB
Input Common-mode
Voltage Range
Gain Bandwidth
Phase Margin
(Note 5) Absolute value
(Note 6) Full range BU7271: TA=-40°C to +85°C BU7271S: TA=-40°C to +105°C
(Note 7) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
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BU7271G
Datasheet
BU7271SG
Description of Electrical Characteristics
Described below are descriptions of the relevant electrical terms used in this datasheet. Items and symbols used are also
shown. Note that item name and symbol and their meaning may differ from those on another manufacturer’s document or
general document.
1. Absolute maximum ratings
Absolute maximum rating items indicate the condition which must not be exceeded. Application of voltage in excess of absolute
maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics.
(1) Supply Voltage (VDD/VSS)
Indicates the maximum voltage that can be applied between the VDD terminal and VSS terminal without
deterioration or destruction of characteristics of internal circuit.
(2) Differential Input Voltage (VID)
Indicates the maximum voltage that can be applied between non-inverting and inverting terminals without damaging
the IC.
(3) Input Common-mode Voltage Range (VICM)
Indicates the maximum voltage that can be applied to the non-inverting and inverting terminals without deterioration
or destruction of electrical characteristics. Input common-mode voltage range of the maximum ratings does not assure
normal operation of IC. For normal operation, use the IC within the input common-mode voltage range characteristics.
(4) Power Dissipation (PD)
Indicates the power that can be consumed by the IC when mounted on a specific board at the ambient temperature 25°C
(normal temperature). As for package product, PD is determined by the temperature that can be permitted by the IC in
the package (maximum junction temperature) and the thermal resistance of the package.
2. Electrical characteristics
(1) Input Offset Voltage (VIO)
Indicates the voltage difference between non-inverting terminal and inverting terminals. It can be translated into the
input voltage difference required for setting the output voltage at 0 V.
(2) Input Offset Current (IIO)
Indicates the difference of input bias current between the non-inverting and inverting terminals.
(3) Input Bias Current (IB)
Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias currents at
the non-inverting and inverting terminals.
(4) Supply Current (IDD)
Indicates the current that flows within the IC under specified no-load conditions.
(5) Maximum Output Voltage(High) / Maximum Output Voltage(Low) (VOH/VOL)
Indicates the voltage range of the output under specified load condition. It is typically divided into maximum output
voltage High and low. Maximum output voltage high indicates the upper limit of output voltage. Maximum output
voltage low indicates the lower limit.
(6) Large Signal Voltage Gain (AV)
Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting terminal
and inverting terminal. It is normally the amplifying rate (gain) with reference to DC voltage.
Av = (Output voltage) / (Differential Input voltage)
(7) Input Common-mode Voltage Range (VICM)
Indicates the input voltage range where IC normally operates.
(8) Common-mode Rejection Ratio (CMRR)
Indicates the ratio of fluctuation of input offset voltage when the input common mode voltage is changed. It is
normally the fluctuation of DC.
CMRR = (Change of Input common-mode voltage)/(Input offset fluctuation)
(9) Power Supply Rejection Ratio (PSRR)
Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed.
It is normally the fluctuation of DC.
PSRR= (Change of power supply voltage)/(Input offset fluctuation)
(10) Output Source Current/ Output Sink Current (ISOURCE / ISINK)
The maximum current that can be output from the IC under specific output conditions. The output source current
indicates the current flowing out from the IC, and the output sink current indicates the current flowing into the IC.
(11) Slew Rate (SR)
Indicates the ratio of the change in output voltage with time when a step input signal is applied.
(12) Gain Bandwidth (GBW)
The product of the open-loop voltage gain and the frequency at which the voltage gain decreases 6dB/octave.
(13) Phase Margin (θ)
Indicates the margin of phase from 180 degree phase lag at unity gain frequency.
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BU7271G
Datasheet
BU7271SG
Typical Performance Curves
0.8
0.8
0.6
0.6
Power Dissipation [W]
Power Dissipation [W]
○BU7271G, BU7271SG
BU7271G
0.4
BU7271SG
0.4
0.2
0.2
0.0
0.0
85
0
25
50
75
100
Ambient Temperature [°C]
105
0
125
Figure 2.
Power Dissipation vs Ambient Temperature
(Derating Curve)
25
50
75
100
Ambient Temperature [°C]
Figure 3.
Power Dissipation vs Ambient Temperature
(Derating Curve)
16
16
14
14
5.5V
105°C
12
12
85°C
Supply Current [μA]
Supply Current [μA]
125
10
8
25°C
6
-40°C
3.0V
10
8
1.8V
6
4
4
2
2
0
0
1
2
3
4
Supply Voltage [V]
5
6
-50
-25
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 5.
Supply Current vs Ambient Temperature
Figure 4.
Supply Current vs Supply Voltage
(*)The above characteristics are measurements of typical sample, they are not guaranteed.
BU7271G: -40C to +85C BU7271SG: -40C to +105C
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BU7271G
Datasheet
BU7271SG
Typical Performance Curves - continued
○BU7271G, BU7271SG
6
Maximum Output Voltage (High) [V]
Maximum Output Voltage (High) [V]
6
5
4
105°C
85°C
25°C
3
-40°C
2
1
4
3.0V
3
1.8V
2
1
0
0
1
2
3
4
Supply Voltage [V]
5
-50
6
Figure 6.
Maximum Output Voltage (High) vs Supply Voltage
(RL=10kΩ)
-25
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 7.
Maximum Output Voltage (High) vs Ambient Temperature
(RL=10kΩ)
20
Maximum Output Voltage (Low) [mV]
20
Maximum Output Voltage (Low) [mV]
5.5V
5
15
10
105°C
85°C
5
-40°C
2
10
5.5V
3.0V
5
1.8V
25°C
0
-50
0
1
15
3
4
Supply Voltage [V]
5
6
Figure 8.
Maximum Output Voltage (Low) vs Supply Voltage
(RL=10kΩ)
-25
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 9.
Maximum Output Voltage (Low) vs Ambient Temperature
(RL=10kΩ)
(*)The above characteristics are measurements of typical sample, they are not guaranteed.
BU7271G: -40C to +85C BU7271SG: -40C to +105C
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BU7271G
Datasheet
BU7271SG
Typical Performance Curves - continued
○BU7271G, BU7271SG
20
20
25°C
15
Output Source Current [mA]
Output Source Current [mA]
-40°C
15
85°C
10
10
105°C
5
5.5V
3.0V
5
1.8V
0
0.0
0.5
1.0
1.5
2.0
Output Voltage [V]
2.5
0
-50
3.0
Figure 10.
Output Source Current vs Output Voltage
(VDD=3 V)
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 11.
Output Source Current vs Ambient Temperature
(OUT=VDD-0.4V)
40
40
35
-40°C
30
Output Sink Current [mA]
Output Sink Current [mA]
-25
25°C
25
20
85°C
105°C
15
10
30
20
5.5V
3.0V
10
1.8V
5
0
0.0
0.5
1.0
1.5
2.0
Output Voltage [V]
2.5
0
-50
3.0
-25
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 13.
Output Sink Current vs Ambient Temperature
(OUT=VSS+0.4V)
Figure 12.
Output Sink Current vs Output Voltage
(VDD=3V)
(*)The above characteristics are measurements of typical sample, they are not guaranteed.
BU7271G: -40C to +85C BU7271SG: -40C to +105C
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BU7271G
Datasheet
BU7271SG
Typical Performance Curves - continued
○BU7271G, BU7271SG
7.5
7.5
5.0
5.0
2.5
-40°C
Input Offset Voltage [mV]
10.0
Input Offset Voltage [mV]
10.0
25°C
0.0
85°C
105°C
-2.5
-5.0
2.5
5.5V
0.0
1.8V
3.0V
-2.5
-5.0
-7.5
-7.5
-10.0
-10.0
1
2
3
4
Supply Voltage [V]
5
-50
6
-25
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 15.
Input Offset Voltage vs Ambient Temperature
(VICM=VDD, EK=-VDD/2)
Figure 14.
Input Offset Voltage vs Supply Voltage
(VICM=VDD, EK=-VDD/2)
10.0
160
Large Signal Voltage Gain [dB]
Input Offset Voltage [mV]
7.5
5.0
2.5
-40°C
25°C
0.0
105°C
85°C
-2.5
-5.0
140
85°C
105°C
120
40°C
25°C
100
80
-7.5
60
-10.0
-1
0
1
2
Input Voltage [V]
3
1
4
Figure 16.
Input Offset Voltage vs Input Voltage
(VDD=3V)
2
3
4
Supply Voltage [V]
5
6
Figure 17.
Large Signal Voltage Gain vs Supply Voltage
(*)The above characteristics are measurements of typical sample, they are not guaranteed.
BU7271G: -40C to +85C BU7271SG: -40C to +105C
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BU7271G
Datasheet
BU7271SG
Typical Performance Curves - continued
○BU7271G, BU7271SG
120
Common Mode Rejection Ratio [dB]
Large Signal Voltage Gain [dB]
160
140
5.5V
120
3.0V
1.8V
100
80
85°C
80
-40°C
25°C
60
40
20
0
60
-50
-25
0
25
50
75
Ambient Temperature [°C]
100
1
125
Figure 18.
Large Signal Voltage Gain vs Ambient Temperature
2
3
4
Supply Voltage [V]
5
6
Figure 19.
Common Mode Rejection Ratio vs Supply Voltage
140
120
5.5V
100
Power Supply Rejection Ratio [dB]
Common Mode Rejection Ratio [dB]
105°C
100
3.0V
80
1.8V
60
40
20
120
100
80
60
40
20
0
-50
-25
0
25
50
75
Ambient Temperature [°C]
100
0
-50
125
-25
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 21.
Power Supply Rejection Ratio vs Ambient Temperature
Figure 20.
Common Mode Rejection Ratio vs Ambient Temperature
(*)The above characteristics are measurements of typical sample, they are not guaranteed.
BU7271G: -40C to +85C BU7271SG: -40C to +105C
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BU7271G
Datasheet
BU7271SG
Typical Performance Curves - continued
○BU7271G, BU7271SG
80
80
70
70
5.5V
5.5V
60
Slew Rate H-L [V/ms]
Slew Rate L-H [V/ms]
60
50
3.0V
40
1.8V
30
3.0V
50
1.8V
40
30
20
20
10
10
0
0
-50
-25
0
25
50
75
Ambient Temperature [°C]
100
125
-50
0
25
50
75
Ambient Temperature [°C]
100
125
Figure 23.
Slew Rate H-L vs Ambient Temperature
Figure 22.
Slew Rate L-H vs Ambient Temperature
100
-25
200
PHASE
80
60
100
GAIN
40
Phase [deg]
Voltage Gain [dB]
150
50
20
0
0
103
104
105 1.E+06
106
1
10
102
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
Frequency [Hz]
Figure 24.
Voltage Gain・Phase vs Frequency
(*)The above characteristics are measurements of typical sample, they are not guaranteed.
BU7271G: -40C to +85C BU7271SG: -40C to +105C
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BU7271G
Datasheet
BU7271SG
Application Information
NULL method condition for Test circuit1
VDD, VSS, EK, VICM Unit:V
Parameter
Input Offset Voltage
VF
SW1
SW2
SW3
VDD
VSS
EK
VICM
Calculation
VF1
ON
ON
OFF
3
0
-1.5
3
1
ON
ON
ON
3
0
1.5
2
ON
ON
OFF
3
0
-1.5
VF6
ON
ON
OFF
1.8
0
-0.9
0
VF7
ON
ON
OFF
5.5
0
-0.9
0
VF2
Large Signal Voltage Gain
VF3
VF4
Common-mode Rejection Ratio
(Input Common-mode Voltage Range)
VF5
Power Supply Rejection Ratio
- Calculation 1. Input Offset Voltage (VIO)
VIO =
|VF1|
1 + RF/RS
-0.5
-2.5
0
3
3
4
[V]
EK × (1+RF/RS)
|VF3 - VF2|
[dB]
2. Large Signal Voltage Gain (AV)
Av = 20Log
3. Common-mode Rejection Ration (CMRR)
CMRR = 20Log
VICM × (1+RF/RS)
|VF5 - VF4|
4. Power supply rejection ratio (PSRR)
PSRR = 20Log
VDD × (1+ RF/RS)
|VF7 - VF6|
[dB]
[dB]
0.1μF
RF=50kΩ
SW1
RS=50Ω
500kΩ
VDD
15V
EK
RI=1MΩ
0.01μF
Vo
500kΩ
0.015μF 0.015μF
DUT
SW3
RS=50Ω
1000pF
RI=1MΩ
NULL
RL
VICM
50kΩ
SW2
V VF
VRL
-15V
VSS
Figure 25. Test Circuit 1
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BU7271G
Datasheet
BU7271SG
Switch Condition for Test circuit2
SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 SW10 SW11 SW12
SW No.
Supply Current
OFF OFF
ON
OFF
ON
OFF OFF OFF OFF OFF OFF OFF
Maximum Output Voltage (RL=10kΩ)
OFF
ON
OFF OFF
ON
OFF OFF
Output Current
OFF
ON
OFF OFF
ON
OFF OFF OFF OFF
Slew Rate
OFF OFF
Unity Gain Frequency
ON
ON
OFF OFF OFF
OFF OFF
ON
ON
ON
ON
OFF OFF
ON
ON
OFF
OFF OFF
OFF
ON
OFF OFF
ON
OFF OFF OFF
ON
OFF OFF
ON
SW3
R2 100kΩ
SW4
●
VDD=3V
-
SW1
SW2
+
SW5
SW6
SW7
SW8
SW9
RL
CL
SW10
SW11 SW12
R1
1kΩ
VSS
IN-
IN+
Vo
Figure 26. Test Circuit 2
Input Voltage
Output Voltage
SR = ΔV / Δ t
3.0V
3.0 V
ΔV
3.0V P-P
Δt
0V
Input Wave
t
0V
t
Output Wave
Figure 27. Slew Rate Input and Output Wave
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BU7271G
Datasheet
BU7271SG
Examples of Circuit
○Voltage Follower
Voltage gain is 0dB.
VDD
Using this circuit, the output voltage (OUT) is configured
to be equal to the input voltage (IN). This circuit also
stabilizes the output voltage (OUT) due to high input
impedance and low output impedance. Computation for
output voltage (OUT) is shown below.
OUT
IN
OUT=IN
VSS
Figure 28. Voltage Follower Circuit
○Inverting Amplifier
R2
VDD
R1
IN
OUT
For inverting amplifier, input voltage (IN) is amplified by
a voltage gain and depends on the ratio of R1 and R2.
The out-of-phase output voltage is shown in the next
expression
OUT=-(R2/R1)・IN
This circuit has input impedance equal to R1.
VSS
Figure 29. Inverting Amplifier Circuit
○Non-inverting Amplifier
R1
R2
For non-inverting amplifier, input voltage (IN) is amplified
by a voltage gain, which depends on the ratio of R1 and
R2. The output voltage (OUT) is in-phase with the input
voltage (IN) and is shown in the next expression.
VDD
OUT=(1 + R2/R1)・IN
OUT
Effectively, this circuit has high input impedance since its
input side is the same as that of the operational
amplifier.
IN
VSS
Figure 30. Non-inverting Amplifier Circuit
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Power Dissipation
Power dissipation (total loss) indicates the power that the IC can consume at TA=25°C (normal temperature). As the IC
consumes power, it heats up, causing its temperature to be higher than the ambient temperature. The allowable
temperature that the IC can accept is limited. This depends on the circuit configuration, manufacturing process, and
consumable power.
Power dissipation is determined by the allowable temperature within the IC (maximum junction temperature) and the
thermal resistance of the package used (heat dissipation capability). Maximum junction temperature is typically equal to the
maximum storage temperature. The heat generated through the consumption of power by the IC radiates from the mold
resin or lead frame of the package. Thermal resistance, represented by the symbol θJA°C/W, indicates this heat dissipation
capability. Similarly, the temperature of an IC inside its package can be estimated by thermal resistance.
Figure 31(a) shows the model of the thermal resistance of the package. The equation below shows how to compute for the
Thermal resistance (θJA), given the ambient temperature (TA), maximum junction temperature (TJmax), and power dissipation
(PD).
θJA = (TJmax-TA) / PD
°C/W
The Derating curve in Figure 31(b) indicates the power that the IC can consume with reference to ambient temperature.
Power consumption of the IC begins to attenuate at certain temperatures. This gradient is determined by Thermal
resistance (θJA), which depends on the chip size, power consumption, package, ambient temperature, package condition,
wind velocity, etc. This may also vary even when the same of package is used. Thermal reduction curve indicates a
reference value measured at a specified condition. Figure 31. (c) and (d) shows the derating curve for BU7271G and
BU7271SG.
Power dissipation of LSI [W]
PDmax
θJA=(TJmax-TA)/PD C/W
Power dissipation of IC
P2
Ambient temperature TA[ C ]
θJA2 <θJA1
P1
θJA2
TJmax
θJA1
0
Chip surface temperature TJ [C]
25
0.8
0.6
0.6
Power Dissipation [W]
Power Dissipation [W]
0.8
BU7271G
0.4
0.2
100
125
BU7271SG
0.4
0.2
0.0
85
0
75
(b) Derating curve
(a) Thermal resistance
0.0
50
Ambient temperature TA[C]
25
50
75
100
Ambient Temperature [°C]
105
0
125
25
50
75
100
Ambient Temperature [°C]
(c) BU7271G
125
(d) BU7271SG
5.4
mW/°C
When using the unit above TA=25°C, subtract the value above per Celsius degree. Permissible dissipation is the value
when FR4 glass epoxy board 70mm×70mm×1.6mm (copper foil area less than 3%) is mounted
Figure 31. Thermal Resistance and Derating Curve
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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Operational Notes – continued
12.
Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when
no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins
have voltages within the values specified in the electrical characteristics of this IC.
13.
Input Voltage
Applying VDD+0.3V to the input terminal is possible without causing deterioration of the electrical characteristics or
destruction, regardless of the supply voltage. However, this does not ensure normal circuit operation. Please note that
the circuit operates normally only when the input voltage is within the common mode input voltage range of the
electric characteristics.
14.
Power Supply(single/dual)
The operational amplifiers operate when the voltage supplied is between VDD and VSS. Therefore, the single supply
operational amplifiers can be used as dual supply operational amplifiers as well.
15.
Output Capacitor
If a large capacitor is connected between the output pin and VSS pin, current from the charged capacitor will flow into
the output pin and may destroy the IC when the VDD pin is shorted to ground or pulled down to 0V. Use a capacitor
smaller than 0.1µF between output pin and VSS pin.
16.
Oscillation by Output Capacitor
Please pay attention to the oscillation by output capacitor and in designing an application of negative feedback loop
circuit with these ICs.
17.
Latch up
Be careful of input voltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up and
protect the IC from abnormaly noise.
18.
Crossover Distortion
Inverting amplifier generetes crossover distortion when feedback resistance value is small.
To suppress the crossover distortion, connect a resistor between the output terminal and VSS.
Feedback Resistor
VDD
Pull-down Resistor
VSS
Figure 32. To Suppress the Crosover Distortion
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Physical Dimension, Tape and Reel Information
Package Name
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SSOP5
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Datasheet
BU7271SG
Marking Diagram
SSOP5(TOP VIEW)
Part Number Marking
LOT Number
Package Type
Product Name
BU7271G
Marking
D2
SSOP5
BU7271SG
E7
Land Pattern Data
PKG
Land pitch
e
Land space
0.95
2.4
SSOP5
MIE
All dimensions in mm
Land length
Land width
≧ℓ 2
b2
1.0
0.6
SSOP5
e
ℓ2
MIE
e
b2
Revision History
Date
Revision
19.Sep.2013
001
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
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accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
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[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
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Our Products are designed and manufactured for use under standard conditions and not under any special or
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[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
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residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
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5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
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Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
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Other Precaution
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3.
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4.
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General Precaution
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ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
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