DC1635A - Demo Manual

DEMO MANUAL DC1635A
LTC4412/LTC4414:
Dual Low Loss High Voltage
PowerPath Controllers
DESCRIPTION
Demonstration circuit 1635A features the LTC®4412HVIS6
and LTC4414EMS8, low loss PowerPath™ controllers. Each
controller is capable of automatically switching between
primary and auxiliary power sources for a single output.
There are two electrically isolated circuits, one for each IC,
for independent evaluation. The LTC4412 circuit is intended
for lower current loads, while the LTC4414 circuit is capable
of driving larger PMOS devices for higher current loads.
The primary power paths can be controlled with external
logic applied to the CTL pins. PowerPath status can be
monitored using the STAT pins. Evaluation of higher current
or more complex sourcing systems can be accomplished
by installing additional ICs, as well as paralleling the inputs
and/or outputs using the optional supplied pads. Multiple
standard MOSFET package options are also available on
each circuit for evaluation convenience.
The input supply voltage ranges are from 2.5V to 36V for
LTC4412 and 5V to 36V for LTC4414. As initially configured
with the default MOSFET, the LTC4412 circuit maximum
input voltage is 18V. The LTC4412 and LTC4414 circuit
current limits are 2A and 8A respectively.
Design files for this circuit board are available at
http://www.linear.com/demo/DC1635A
PERFORMANCE SUMMARY
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Specifications are at TA = 25°C
PARAMETER
CONDITIONS
Minimum LTC4412 Input Voltage
VIN1
VALUE
2.5
UNIT
V
Maximum LTC4412 Input Voltage
VIN1 and VAUX1
18
V
LTC4412 Maximum Current
MOSFET Limited
2
A
Minimum LTC4414 Input Voltage
VIN2 and VAUX2
5
V
Maximum LTC4414 Input Voltage
VIN2 and VAUX2
36
V
LTC4414 Maximum Current
MOSFET Limited
8
A
dc1635afc
1
DEMO MANUAL DC1635A
QUICK START PROCEDURE
Demonstration circuit 1635A is easy to set up to evaluate
the performance of LTC4412 and LTC4414. Refer to Figure
1 for proper measurement equipment setup of both circuits
and follow the procedures below.
LTC4412 Circuit
1. With all power off, connect auxiliary (VAUX1) and primary
(VIN1) power supplies capable of 2A each, the system
load and meters as shown in Figure 1.
2.Preset the system load to 0A and the input supplies to
0V, 0A current limit.
3. Connect the system load to the output terminals, VOUT1
and GND1.
4.Turn on the supplies, setting the current limit up to 2A.
Adjust the voltages to the desired value, up to 18V. The
higher voltage of the two supplies should appear at the
output.
5.Turn the load on and adjust as necessary.
6. Adjust the supplies and observe how the output switches
over to follow the higher voltage of the two sources.
LTC4414 Circuit
1. With all power off, connect auxiliary (VAUX2) and primary
(VIN2) power supplies capable of 8A each, the system
load, and meters as shown in Figure 1.
2.Preset the system load to 0A and the input supplies to
0V, 0A current limit.
3. Connect the system load to the output terminals, VOUT2
and GND2.
4.Turn on the supplies, setting the current limit up to 8A.
Adjust the voltages to the desired value, up to 36V. The
higher voltage of the two supplies should appear at the
output.
5.Turn the load on and adjust as necessary.
6. Adjust the supplies and observe how the output switches
over to follow the higher voltage of the two sources.
Optional
7. For improved current handling, install additional MOSFETs, select from different package footprints, or shunt
the two circuits at VIN, VOUT and GND.
8. For source-load back-to-back isolation, remove jumpers
JMP1 and JMP2, and/or JMP3 and JMP4, then install
additional MOSFETs back-to-back as shown in Figure 2.
9.For external control of the primary source power path,
remove the 0Ω jumper on the CTL1 or CTL2 pin, R2 or
R5 respectively. Apply the logic-control signal on CTL1
or CTL2 as necessary.
2
dc1635afc
DEMO MANUAL DC1635A
QUICK START PROCEDURE
V
+–
+
A
AUXILIARY
SUPPLY 1
–
–
–
LTC4412
CIRCUIT
V
–
+
SYSTEM
LOAD 1
PRIMARY
SUPPLY 1
A
A
+
+
A
A
V
+
–
+
+
SYSTEM
LOAD 2
PRIMARY
SUPPLY 2
LTC4414
CIRCUIT
–
–
+
A
AUXILIARY
SUPPLY 2
–
DC1635 F01
+–
V
Figure 1. Test Setup of DC1635A
dc1635afc
3
DEMO MANUAL DC1635A
QUICK START PROCEDURE
CIRCUIT A
CIRCUIT B
JMP1
0Ω
VAUX1
VAUX2
Q1A
SiA921EDJ
JMP2
0Ω
VIN1
JMP3
0Ω
Q1B
SiA921EDJ
COUT1
0.1µF
VOUT1
Q2
Si7463DP
JMP4
0Ω
VIN2
Q3
Si7463DP
U1
LTC4412HV
CIN1
0.1µF
R2
0Ω
VOUT2
U2
LTC4414HV
SENSE
VIN
COUT2
0.1µF
GND
GATE
CTL
STAT
CIN2
0.1µF
R1
680k
R5
0Ω
STAT1
SENSE
VIN
GND
GATE
CTL
STAT
R4
100k
STAT2
DC1635 F02a
Figure 2a. Standard Configurations with Automatic Switchover Between Sources
DUAL PKG
DUAL PKG
VAUX2
VAUX1
JMP5
0Ω
Q1A
SiA921EDJ
Q6A
SiA921EDJ
VIN1
JMP6
0Ω
Q1B
SiA921EDJ
COUT1
0.1µF
Q6B
SiA921EDJ
VOUT1
CTL1
VIN
Q3
Si7463DP
GATE
CTL
STAT
COUT2
0.1µF
Q15
Si7463DP
JMP8
0Ω
VOUT2
U2
LTC4414HV
SENSE
GND
Q14
Si7463DP
VIN2
U1
LTC4412HV
CIN1
0.1µF
JMP7
0Ω
Q2
Si7463DP
CIN2
0.1µF
R1
680k
STAT1
CTL2
VIN
SENSE
GND
GATE
CTL
STAT
R4
100k
DC1635 F02b
STAT2
Figure 2b. Optional, Fully-Isolated Configurations with External Logic Control
Diodes shown are body diodes of their respective MOSFETs. Do not install extra diodes or the operation of the
power paths may be compromised.
4
dc1635afc
DEMO MANUAL DC1635A
QUICK START PROCEDURE
0Ω
VIN1
COUT1
0.1µF
Q8
Si7463DP
JMP5
0Ω
VOUT1
U1
LTC4412HV
CIN1
0.1µF
CTL1
VIN
SENSE
GND
GATE
CTL
STAT
R1
680k
DC1635 F02c
STAT1
Figure 2c. Optional, High Side Switch with Logic Control and Status Output
(Requires 0Ω Jumper Across Drain-Source Pins of Q7)
FROM WALL
ADAPTER
SCHOTTKY JMP1
0Ω
VAUX1
JMP2
0Ω
VIN1
Q5
Si7463DP
BAT1
+
Q5
Si7463DP
LOAD
R2
0Ω
X1
GND1 AND GND2
SHARED
VIN
GND
CTL
GATE
STAT
JMP4
0Ω
Q3
Si7463DP
+
VCC1
SENSE
VIN2
CIN1
0.1µF
R3
560k
STAT1
X2
VOUT1 AND VOUT2
SHARED
R6
0Ω
GND2
VIN
BAT1
GATE
CTL
STAT
SENSE
GATE
CTL
X2
GND1 AND
GND2 SHARED
STAT
GND1
CTL1
X1
VIN1 AND VIN2
SHARED
Q3
Si7463DP
COUT2
0.1µF
R3
560k
VCC1
STAT1
JMP4
0Ω
VIN2
VOUT2
+
BAT2
U2
LTC4414HV
VCC2
SENSE
GND
VIN
GND
U2
LTC4414HV
CIN2
0.1µF
+
U3
LTC4414HV
U3
LTC4414HV
CIN1
0.1µF
BAT2
COUT1
0.1µF
JMP2
0Ω
VIN1
FROM
CHARGER
VOUT1
CIN2
0.1µF
R6
560k
DC1635 F02d
STAT2
Figure 2d. Optional, High Current Dual Battery Load Sharing
with Automatic Switchover and Status Output
CTL2
GND2
VIN
SENSE
GND
GATE
CTL
STAT
R6
560k
VCC2
STAT2
DC1635 F02e
Figure 2e. Optional, Dual Battery Charging with Logic Select
and Status Output
dc1635afc
5
A
B
C
D
CTL2
GND2
GND2
5V - 36V @ 8A
VIN2
VIN2
GND2
GND2
5V - 36V @ 8A
VAUX2
VAUX2
CTL1
GND1
GND1
2.5V - 18V @ 2A
VIN1
VIN1
GND1
GND1
3V - 18V @ 2A
VAUX1
J2
5
E18
E8
CIN1
0.1uF
50V
0805
0
R6
3
7
4
CTL22
VIN2
CTL1 3
2
1
NC
CTL
GND
VIN
U2
CTL
GND
VIN
U1
NC
STAT
GATE
SENSE
LTC4414EMS8
STAT
GATE
SENSE
LTC4412HVIS6
5
1
8
6
4
5
6
STAT2
GATE2
VOUT2
STAT1
GATE1
VOUT1
4
1. ALL RESISTORS ARE IN OHMS, 0603.
ALL CAPACITORS ARE IN MICROFARADS, 0603.
8
7
6
5
8
7
6
5
DUAL PKG
NOTE: UNLESS OTHERWISE SPECIFIED
CIN2
0.1uF
50V
0805
VIN2
VAUX2
R5
0
VIN1
VAUX1
VAUX2
CTL1
CTL2
J8
J7
E7
E6
J6
J5
E5
E13
E4
J4
J3
E3
E2
J1
E1
4
SiA921EDJ
Q1B
SiA921EDJ
Q2 Si7463ADP
3
2
1
ISOLATED
8
3
7
6
Q1A
4
1
JMP4
*
560K
(OPT)
R4
*
560K
(OPT)
R2
*
*
STAT1
GATE1
JMP2
JMP1
CUSTOMER NOTICE
S2B
S2B
S2A
JMP3
S1B
S1B
S1A
S1A
R1
680K
S2A
R3
100K
3
3
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
E17
E16
STAT2
GATE2
E12
J12
J11
E11
E15
E14
E10
J10
J9
E9
2
2
SCALE = NONE
JOSH Y.
AK
APPROVALS
VCC2
COUT2
0.1uF
50V
0805
VCC1
COUT1
0.1uF
50V
0805
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
Q3 Si7463ADP
3
2
1
4
4
5
2
6
5
VAUX1
2
JOSH Y.
APPROVED
DATE
TOP LAYER CIRCUITS FOR U1 AND U2 ARE ELECTRICALLY
ISOLATED FROM EACH OTHER. THEY DO NOT SHARE GND,
VIN, VAUX, OR VOUT. JUMPERS CAN BE USED TO
PARALLEL THE TWO CIRCUITS AS NECESSARY.
03-17-16
DATE:
1
DEMO CIRCUIT 1635A
SHEET 1
LTC4412HVIS6 & LTC4414EMS8
Thursday, March 17, 2016
IC NO.
DUAL LOW LOSS 36V POWERPATH CONTROLLERS
N/A
SIZE
TECHNOLOGY
2
OF 3
REV.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
# IF THE CTL PIN OF THE LTC4412 AND/OR LTC4414 IS NOT
USED, IT IS RECOMENDED THAT CTL BE CONNECTED TO
GND IN THE FINAL DESIGN.
TITLE: SCHEMATIC
VCC2
STAT2
GND2
GND2
VOUT2
*CLARIFICATION: SHOWN HERE AS CONNECTED FOR TOP
5V - 36V @ 8A LAYER CIRCUIT, BUT STUFFED ON BOTTOM LAYER.
VOUT2
VOUT2
VCC1
STAT1
GND1
GND1
DESCRIPTION
2ND PROTOTYPE
NOTE FOR THIS PAGE:
REV
2.5V - 18V @ 2A
VOUT1
VOUT1
VOUT1
ECO
1
REVISION HISTORY
A
B
C
D
DEMO MANUAL DC1635A
SCHEMATIC DIAGRAMS
dc1635afc
A
B
C
D
5
CTL2
VIN2
VAUX2
OPTIONAL CIRCUIT
CTL1
VIN1
VAUX1
2
1
4
2
3
7
4
CTL2 3
VIN2
VAUX2
CTL1
VIN1
VAUX1
4
CTL
GND
VIN
U4
STAT
GATE
SENSE
LTC4412HVIS6 (OPT)
DUAL PKG
NC
STAT
GATE
SENSE
LTC4414EMS8 (OPT)
ISOLATED
NC
CTL
GND
VIN
U3
4
5
6
5
1
8
6
STJ1
Si7463ADP (OPT)
8
7
6
5
OPT (SiA921EDJ)
8
4
3
Q13B
OPT (SiA921EDJ)
7
1
6
Q13A
GTJ1
3
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
2
SCALE = NONE
JOSH Y.
AK
DATE:
N/A
SIZE
TECHNOLOGY
1
DEMO CIRCUIT 1635A
SHEET 2
LTC4412HVIS6 & LTC4414EMS8
Thursday, March 17, 2016
IC NO.
2
OF 3
REV.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
1
DUAL LOW LOSS 36V POWERPATH CONTROLLERS
TITLE: SCHEMATIC
STAT2
GATE2
VOUT2
GTJ2
STJ2
DUAL PKG
STAT1
GATE1
VOUT1
GTJ1
STJ1
2
APPROVALS
Q8
Si7463ADP (OPT)
S1B
8
7
S1B 3
2
6
1
5
3
2
1
Q5
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
STAT2
GATE2
S2B
S2B
S1A
S1A
CUSTOMER NOTICE
OPT (SiA921EDJ)
4
Q12B
S2A
S2A
3
2
1
Q7
Si7463ADP (OPT)
3
2
1
Si7463ADP (OPT)
Q4
OPT (SiA921EDJ)
1
Q12A
VOUT2
8
3
7
6
STAT1
GATE1
VOUT1
8
7
6
5
8
7
6
5
3
4
4
4
4
5
2
5
2
5
OPTIONAL CIRCUIT
A
B
C
D
DEMO MANUAL DC1635A
SCHEMATIC DIAGRAMS
dc1635afc
7
A
B
C
JMP5
0
STJ1
SiA921EDJ
Q6A
7
6
VOUT1
DUAL PKG
GATE2
S2B
STAT2
S2A
0
5
JMP8
3
2
1
0
Q15
Si7463ADP
JMP7
3
2
1
Q14
Si7463ADP
STJ2
GTJ2
8
7
6
5
8
7
6
5
VOUT2
VIN2
VAUX2
OPTIONAL CIRCUIT
STAT1
S1A
1
2
D
4
4
Q16B
Si7905DN
3
1
8
3
STJ2
Q17A
Si7905DN
DUAL PKG
SiA921EDJ
S2B
6
5
8
7
GATE1
VIN1
STAT1
VAUX1
6
5
8
7
3
1
STJ1
GTJ1
6
5
8
7
GTJ1
STJ1
VOUT1
1
2
SCALE = NONE
JOSH Y.
AK
APPROVALS
DATE:
N/A
SIZE
1
DEMO CIRCUIT 1635A
Thursday, March 17, 2016
IC NO.
SHEET 3
LTC4412HVIS6 & LTC4414EMS8
2
REV.
OF 3
DUAL LOW LOSS 36V POWERPATH CONTROLLERS
TITLE: SCHEMATIC
TECHNOLOGY
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
THERE ARE MORE GUIDELINES SPECIFICALLY FOR CERTAIN CIRCUITS. PLEASE SEE THE QUICK
START GUIDE FOR MORE APPLICATIONS AND INFORMATION.
1. NEVER INSTALL U1 (TOP LAYER) AND U3 (BOTTOM LAYER) AT THE SAME TIME. INSTALL ONE
OR THE OTHER, BUT NOT BOTH.
2. NEVER INSTALL U2 (TOP LAYER) AND U4 (BOTTOM LAYER) AT THE SAME TIME. SAME AS 1.
3. JMP1-4 ARE MEANT FOR SIMPLE DIODE-OR OPERATION. THEY MUST BE REMOVED FOR
PROPER BACK-TO-BACK ISOLATION.
THE DEMO BOARD AS SHIPPED SHOWS THE MOST COMMON FUNCTIONS FOR TWO
ELECTRICALLY ISOLATED CIRCUITS. THIS DEMO BOARD WAS DESIGNED TO SHOW CASE THE
MAXIMUM NUMBER OF EVALUATION OPTIONS THAT CORRESPOND TO THE CIRCUITS IN THE
DATA SHEETS BOTH ICs. HOWEVER, THERE ARE SOME IMPORTANT RULES TO ALWAYS
FOLOW:
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
3
3
S1B
S1A
Q19B
Si7905DN
1
DUAL PKG
Q19A
Si7905DN
Q18B
Si7905DN
Q18A
Si7905DN
DUAL PKG
2
NOTE FOR ALL CIRCUITS:
VIN1
VAUX1
CUSTOMER NOTICE
GTJ2
VOUT2
STJ2
VOUT1
3
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
GTJ2
Q17B
Si7905DN
1 S2B
3 S2A
GTJ1
4
Q16A
Si7905DN
GATE2
8
7
STAT2
6
5
DUAL PKG
0
S2A
JMP6
ISOLATED
GATE1
S1B
S1B
Q6B
4
2
OPTIONAL CIRCUIT
4
4
5
2
4
2
4
2
8
4
5
A
B
C
D
DEMO MANUAL DC1635A
SCHEMATIC DIAGRAMS
dc1635afc
DEMO MANUAL DC1635A
PARTS LIST
ITEM
QTY
REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
Required Circuit Components
1
4
COUT1, CIN1, COUT2, CIN2
CAP., X7R, 0.1µF, 50V, 10% 0805
AVX, 08055C104KAT2A
2
1
Q1
DUAL P-CHAN., 20V/4.5A
VISHAY, SiA921EDJ-T1-GE3
3
2
Q2, Q3
MOSFET P-CHAN., 40V/10A
VISHAY, Si7463DP-T1-GE3
4
1
R1
RES., CHIP, 690k, 1%, 0603
VISHAY, CRCW0603690KFKEA
5
1
R3
RES., CHIP, 100k, 1%, 0603
VISHAY, CRCW0603100KFKEA
6
2
R5, R6
RES., CHIP, 0Ω, 0603
VISHAY, CRCW06030000Z0EA
7
1
U1
I.C., LTC4412HVIS6
LINEAR TECH., LTC4412HVIS6#PBF
8
1
U2
I.C., LTC4414EMS8
LINEAR TECH., LTC4414EMS8#PBF
Additional Circuit Components
1
0
Q6, Q12, Q13
OPT
VISHAY, SiA921EDJ-T1-GE3
2
0
Q4, Q5, Q7, Q8, Q14, Q15
OPT
VISHAY, Si7463DP-T1-GE3
3
0
Q16, Q17, Q18, Q19
OPT
VISHAY, Si7905DN-T1-E3
4
4
JMP1, JMP2, JMP3, JMP4
JUMPER, 1206
TEPRO, RN6087
5
2
R2, R4
RES., CHIP, 560k, 1%, 0603
VISHAY, CRCW0603560KFKEA
6
0
JMP5, JMP6, JMP7, JMP8
RES., 0603 OPT
7
0
U3
I.C., LTC4414EMS8 OPT
LINEAR TECH., LTC4414EMS8#PBF
8
0
U4
I.C., LTC4412HVIS6 OPT
LINEAR TECH., LTC4412HVIS6#PBF
E1, E2, E3, E4, E5, E6, E7, E8, E9, E10
TEST POINT, TURRET, 0.095"
MILL-MAX, 2501-2-00-80-00-00-07-0
Hardware-For Demo Board Only
1
18
E11, E12, E13, E14, E15, E16, E17, E18
TEST POINT, TURRET, 0.095"
MILL-MAX, 2501-2-00-80-00-00-07-0
2
12
J1, J2, J3, J4, J5, J6, J7, J8, J10, J11, J12
BANANA JACK
KEYSTONE, 575-4
3
4
(STAND OFF)
STAND OFF, NYLON 0.25"
KEYSTONE, 8831 (SNAP ON)
dc1635afc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
9
DEMO MANUAL DC1635A
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation
10 Linear Technology Corporation
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1630 McCarthy Blvd., Milpitas, CA 95035-7417
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www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2011
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