DC1185B - Schematic

1
2
3
4
INTVCC
REV
DESCRIPTION
DATE
PROTO
APPROVED
03/21/07
MODE
R4
1
PS BM CCM
4
E5
JP3
VIN+
3
2
0
8
2
NOTE: SET RSENSE FILTER TIME CONSTANT < 0.6nH/RSENSE FOR 2010 PACKAGE.
R1
SYNC
7
J1
A
VIN
VIN
C1
CIN1
180uF
16V
OPT
INTVCC
6.5V-14V
+
J2
GND
2
VIN
1
A
6
ECO
10.0K
E1
5
REVISION HISTORY
This circuit is proprietary to Linear Technology and supplied
for use with Linear Technology parts.
Customer Notice: Linear Technology has made a best effort to
design a circuit that meets customer-supplied specifications;
however, it remains the customer's responsibility to verify proper
and reliable operation in the actual application, Component
substitution and printed circuit board layout may significantly
affect circuit performance or reliability. Contact Linear
Applications Engineering for assistance.
0.1uF
TRK/SS2
TRK/SS1
21
2
ITH1
BG1
20
VFB1
3
VFB1
VIN
19
[1]
100pF
R33
20.0K
VFB2
4
VFB2
INTVCC
18
ITH2
5
ITH2
TRK/SS2
6
TRK/SS2
100pF
C44
R35
RUN2
1nF
9
[1]
VIN
0.1uF
RUN2
10
ILIM
11
EXTVCC
12
PGOOD
R38
RUN2
OPT
1
2
3
JP2
C48
R41
OPT
OPT
BG2
17
PGND
16
BOOST2
15
TG2
14
SW2
13
C
0.1uF
R9
4
D1
0
INTVCC
OPT
E2
GND
C49
R43
OPT
[1]
E3
COUT1
{1}
+ COUT2
330uF
2.5V
+ COUT3
330uF
2.5V
E12
R18
C17
0.1uF
0
8 S2+
SENSE2-
7
J4
GND
VIN
C11
VIN
4.7uF
D2
R25
SENSE2+
2.2
CMDSH-3
Q3
[1]
C21
C15
4
0.1uF
CIN3
CIN5
10uF
OPT
Q7
OPT
4
E13
VL2-
VO2+
L2 [1]
1nF
S2-
B
VO1-
CMDSH-3
VINF
INTVCC
VOUT1
[1]
C32
4.7uF
6.3V
RS2
VSW2
Q4
[1]
R40
100
Q8
OPT
[1]
COUT4
{1}
2010
D3
OPT
4
J5
VOUT2
VOUT2
COUT5 COUT6
+ 330uF + 330uF
2.5V
2.5V
[1]
C36
4.7uF
6.3V
E14
VO2C
J6
INTVCC
EXTVCC
C50
ITH1
100K
E4
PGOOD
VSW1
OPTIONAL JUMPERS FOR
SINGLE OUTPUT/DUAL PHASE
OPERATION
R46
1uF
VINF
PGOOD
INTVCC
VFB1
R60
OPT
TRK/SS1
STUFF R60 WITH 0 OHMS FOR
4.5V<VIN<5.5V
R49
OPT
R50
OPT
R52
OPT
R55
RUN1
NOTE:
FSW = 500Hz For Vesion A
FSW = 400Hz For Vesion b
VERSION
VOUT1
VOUT2
GND
S1+
R47
ITH2
OPT
NOTE:
WHEN DCR SENSING IS
IMPLEMENTED, SHORT RSENSE1
AND RSENSE2. DO NOT STUFF
R30 OR R40
VFB2
S1-
VSW2
TRK/SS2
R61
OPT
S2-
R62
OPT
L1, 2
2.0V/10A
1.8V/10A
0.003
TOKO FDU0650-R56M=P3
-B
1.5V/15A
1.2V/15A
0.002
VITEC 59PR9875 0.4uH
Q1, 3
Q2, 4
VISHAY Si4420BDY
RENESAS RJK0305DPB
VISHAY Si4630DY
RENESAS RJK0301DPB
VOUT1
VOUT2
R27
R43
ITH1 & ITH2
FSW
R31, R35
R10
DRAWN MEI
CHECKED
COUT1/COUT4
30.1K
25.5K
8.66K
3.16K
17.8K
10.0K
5.9K
2.55K
3
4
5
TECHNOLOGY
TITLE
ENGINEER
47uF
DESIGNER
on PCB
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
D
SCH, LTC3850EUF, DUAL PHASE/DUAL OUTPUT
SYNCHRONOUS BUCK CONVERTER
APPROVED
SIZE
CAGE CODE
DWG NO
REV
2
DC1185A
100uF
Thursday, July 19, 2007
2
DATE
10/31/06
Tooling Holes
VL2-
CONTRACT NO.
RS1, RS2
X2
R53
RUN2
APPROVALS
X1
1
Represents
S2+
OPT
1
VL1-
OPT
R51
OPT
-A
1
R45
OPT
OPTIONAL DCR SENSING
TOP FEED BACK R
[1]
J3
VOUT1
R44
OPT
EXTVCC
D
[1]
2010
D4
OPT
4
4
INTVCC
Q6
OPT
1
Q2
[1]
5
6
7
8
C20
R39
100
R42
1
2
3
1
2
3
VSW1
1nF
1
2
3
ON
OFF
22
ITH1
C47
OPT
TG1
BOOST1
RUN1
1
RS1
2
26
TRK/SS1
20.0K
OPT
R37
23
R32
C43
0
SW1
C42
R34
R36
SENSE1+
FREQ
R31
VOUT1
E10
MODE
25
VO1+
L1 [1]
1
C2
24
E11
VL1-
4
2
R2
OPT
1nF
27 S1+
OPT
5
6
7
8
0
C41
28
10uF
1
2
3
RUN1
R3
SENSE1-
CIN4
Q5
OPT
1
2
3
E9
4
C14
CIN2
5
6
7
8
TRK/SS1
S1-
LTC3850EUF
29
B
Q1
[1]
1
2
3
U1
R10
[1]
R30
100
5
6
7
8
R29
100
C12
1nF
5
6
7
8
R8
0
OPT
5
6
7
8
R28
OPT
VIN-
1
2
3
C38
E6
VIN
5
6
7
8
3
JP1
10.0K
[1]
SGND
OFF
OPT
OPT
1
2
3
1
2
R7
R27
5
6
7
8
RUN1
ON
R26
C37
6
FILENAME: 1185A-2.DSN
SCALE: NONE
7
SHEET
1
8
OF
1
Similar pages