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1
2
3
4
A
A
V_BACKUP
V_BACKUP
CRP_SRAM_WE B3
CRP_SRAM_CE1 G3
A3
CRP_SRAM_OE G2
C3
E1
VCC
CRP_SRAM_WE
CRP_SRAM_CE1
CRP_SRAM_OE
GND
CRP_SRAM_A[0..18]
WE
CE1
CE2
OE
NC
E6
C
D1
CRP_SRAM_IO[0..7]
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
VCC
[x]FROM uCONTROLLER
B6
C6
F6
G6
B1
C1
F1
G1
GND
CRP_SRAM_IO0
CRP_SRAM_IO1
CRP_SRAM_IO2
CRP_SRAM_IO3
CRP_SRAM_IO4
CRP_SRAM_IO5
CRP_SRAM_IO6
CRP_SRAM_IO7
B
D6
C320
0.1uF
CY62148EV30, CY62138FV30 and
CY62138EV30 are pin compatible.
CY62148EV30 IS 4 MBIT.
CE2 is not avalible in CY62148EV30
GND
C321
0.47uF
GND
U22
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A1
A2
B2
A4
B4
C4
A5
B5
A6
H1
H2
H3
H4
H5
H6
G5
G4
F4
F3
CRP_SRAM_A0
CRP_SRAM_A1
CRP_SRAM_A2
CRP_SRAM_A3
CRP_SRAM_A4
CRP_SRAM_A5
CRP_SRAM_A6
CRP_SRAM_A7
CRP_SRAM_A8
CRP_SRAM_A9
CRP_SRAM_A10
CRP_SRAM_A11
CRP_SRAM_A12
CRP_SRAM_A13
CRP_SRAM_A14
CRP_SRAM_A15
CRP_SRAM_A16
CRP_SRAM_A17
CRP_SRAM_A18
B
C
CY62148EV30LL
GND
Title
D
Size
D
Number
Revision
A
Date:
File:
1
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10/22/2013
Sheet1.SchDoc
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