DC1997A - Schematic

5
4
3
2
1
REVISION HISTORY
ECO
__
PGOOD2
E1
RUN2
DESCRIPTION
2
PRODUCTION
APPROVED
DATE
12-19-12
RUN2
E2
EXTREF2-
S1+
VOS1+
R29
2.2
INTVCC
26
C9
25
1uF
C16
C8
4.7uF
16V
0805
8
2
7
R23
0
J2
E7
VIN
4.5V - 14V
GND
VIN-
VOUT2
COUT6
100uF
6.3V
1206
2512
VIN+
COUT7 + COUT8 + COUT9
COUT10
+ 330uF
330uF
OPT
100uF
2.5V
2.5V
6.3V
7343-D15T 7343-D15T 7343-D15T
1206
C22
10uF
6.3V
0805
J3
J4
VOUT2
1.2V / 20A
GND
C
VIN
R31
2.2
CIN1
22uF
16V
1210
1
2
SW1 TG1
J1
1
R28
OPT
S2-
23
22
CIN6
+ 180uF
16V
16SVP180MX
DCR SENSE FILTER /
DIVIDER FOR PHASE 2
C10
0.1uF
24
6
5
EXTVCC
27
R25
0
RS2
0.001
0.47uH
CIN2
22uF
16V
1210
21
S1+
R33
20
C14
0.1uF
OPT
9
D1
CMDSH-4
R34
OPT
L1
0.47uH
0
COUT1
100uF
6.3V
1206
2512
S1-
BG1
S1-
COUT2
100uF
6.3V
1206
+ COUT3
OPT
7343-D15T
+ COUT4
+ COUT5
330uF
330uF
2.5V
2.5V
7343-D15T 7343-D15T
C21
10uF
6.3V
0805
J5
J6
DCR SENSE FILTER /
DIVIDER FOR PHASE 1
19
Q1
BSC0911ND
VOUT1
RS1
0.001
R37
OPT
8
R35
PGOOD1
0.01uF
BG2
28
+ CIN5
OPT
CAP-SVP-F8
R26
OPT
29
Q2
BSC0911ND
CIN8
OPT
1210
S2+
L2
9
7
TG1
3
4
VOUTSENSE1+
SW2
30
3
33
34
32
BOOST2
PGOOD2
35
DTR2
RUN2
36
37
SW1
R43
OPT
0
SENSE2-
38
BG1
TRACK/SS1
13
E12
DRVCC1
ITH1
C13
R36
OPT
R38
TRK/SS1
VIN
18
12
VOUT2
PGND
VOUTSENSE1-
4
11
C12
470pF
INTVCC
31
CIN7
OPT
1210
CIN4
22uF
16V
1210
R22
OPT
PHASE
15K
EXTVCC
PHASMD
10
47pF
DRVCC2
MODE/PLLIN
RUN1
1
R32
3
TRACK/SS2
RT
9
C11
BG2
SGND
8
FSW = 300kHz
ITH2
CLKOUT
7
R30 133K
SW2
D2
CMDSH-4
4
6
TG2
VRNG/(EXTVREF2) *
DTR1
E11
E4
CIN3
22uF
16V
1210
6
4
VDFB2+
17
*
5
2
C4
0.1uF
VO2_SNS-
E6
VIN
R21
0
16
4
3
E9
JP3 INTVCC
PHASMD
RUN2
OPT
5
2
*
OPT
RUN1
R15
VO2_SNS+
E3
DTR2
PHASE
1
C6 *
C7
120 DEG
90 DEG
60 DEG
INTVCC
DTR1
R9
TG2
*
SENSE1-
R20
OPT
C5 47pF
R27
CLKOUT
R13
R62
SENSE1+
*
VDFB2-
INTVCC EXTREF2+
3
C
*
SENSE2+
*
2
PLLIN
C3 S21nF
S2+
15
1
U1
SEE TABLE
R24
FCM
SYNC
DCM
R8
100K
OPT
R16
OPT
R19
10K
R12
DTR2
C2
R5
0
DTR2
INTVCC
JP2
MODE
R11
10K
14
R18
OPT
0
INTVCC
OPT
VOS1+
OPT
VDFB2+
*
INTVCC
OPTIONAL COMPONENTS FOR SINGLE OUTPUT,
DUAL PHASE OPERATION
R7
10
R10
R14
39
R17
E5
D
R6
10
R4 *
C1
OPT
R3
OPT
TRK/SS2
10K
*
PGND
1
2
R2
R61
R1
OPT
BOOST1
VIN
JP1
RUN2
ON
OFF
3
D
REV
R41
0
R45
VOUT1
1.5V / 20A
GND
R42
0
INTVCC
ON
OFF
R47
OPT
2
R49
OPT
3
B
C15
OPT
VIN
1
JP4
RUN1
C17
OPT
RUN1
R48
10
R50
0
GND
VO1_SNS+
E13
OPT R46
10
VO1_SNS-
E14
B
R39
OPT
DTR1
E15
E16
NOTE:
TIE SGND PIN TO PGND PAD UNDERNEATH IC.
EXTVCC
EXTVCC
100K
1nF
R63
R44
10K
INTVCC
RUN1
PGOOD1
R40
15K
E17
C18
1uF
E18
A
NOTES: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE 0603.
ALL CAPACITORS ARE 0603.
2. INSTALL SHUNTS ON JUMPERS AS SHOWN.
*
A
ASSEMBLY
U1
DC1997A--A
LTC3838EUHF-1
DC1997A--B
U2
LTC3838EUHF-2
OPT
R24
0
C19
C23
R14
R61
E19
E20
JP5
JP6
R51
0
OPT OPT OPT OPT OPT
OPT
OPT OPT OPT OPT OPT OPT 10k
LT6650HS5 100k OPT
0
R62
0
C20
1uF 4.7uF STUFF STUFF
10k
R53
R54
20k 10k
0.1% 0.1%
R59
0
R60
6.65k
0.1%
R52
R4
R12
R27
C6
10k
11k
330pF 0.01uF
20k
OPT OPT 5.23k
POT
* PIN 2 = VRNG FOR LTC3838-1, EXTVREF2 FOR LTC3838-2
680pF
C7
C24
D3
OPT
OPT
4.7nF 0.01uF
BZT52C5V6S
CUSTOMER NOTICE
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
TECHNOLOGY
LT
M. SHRIVER
TITLE: SCHEMATIC
FAST TRANSIENT DUAL OUTPUT STEP-DOWN DC-DC CONVERTER
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
4
3
2
IC NO.
N/A
SCALE = NONE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
REV.
LTC3838EUHF-1/-2
2
DEMO CIRCUIT 1997A
DEC 19, 2012
SHEET 1
1
OF 2
5
4
3
2
1
D
D
OPTIONAL MOSFETS
EXTERNAL REFERENCE FOR DC1997A-B ASSY, OPTIONAL ON DC1997A-A ASSY
VIN
VIN
FB
Q10
OPT
*
0.01uF
1
*
GND
2
NOTE:
FOR ACCURATE EFFICIENCY MEASUREMENTS AT LIGHT
LOAD IN DCM, REMOVE R51, PUT JP6 IN EXT POSITION
AND CONNECT REFERENCE VOLTAGE BETWEEN E19 AND E20.
Q4
OPT
4
CIN9
OPT
1210
ON BD REF
FIXED
1.2V
ADJ
0.8V to 1.5V
*
*
*
EXTREF2C
LOAD STEP
5mV / A
5% DUTY CYCLE MAX
ISTEP1+
ISTEP1-
E25
E27
5
4
3
2
Q11
FDD8874
1
E21
R55
10K
3
Q6
OPT
R57
0.005
2010
VOUT1
J8
2
2
5
4
3
2
5
4
E20
R59
0
PULSE1
LOAD STEP
5mV / A
5% DUTY CYCLE MAX
GND
E23
OPTIONAL COUT
1
VOUT2
1
2
3
Q5
OPT
VOUT2
1.2V
0.8V to 1.5V
EXTREF2-
VOUT2
1
J7
5
C23
1uF
LOAD STEP CIRCUIT #2
VOUT1
VOUT1
1
2
3
6.65k
0.1%
0603
R52 *
20k
2
BOURNS 3313J-1-203E
ROTATIONAL LIFE = 100 CYCLES
TURN CW TO INCREASE VEXTREF
LOAD STEP CIRCUIT #1
SW1
4
EXTREF2+
CIN10
OPT
1210
1
2
3
1
2
3
4
BG1
R60 *
ISTEP2+
ISTEP2-
E26
E28
Q12
FDD8874
+ COUT11 + COUT12
OPT
OPT
7343-D15T 7343-D15T
1
R56
10K
3
Q3
OPT
5
5
C
TG1
*
E19
1
2
3
4
1
2
3
C19
1uF
VOUT
C24 *
* EXT
1
C20 *
4.7uF
16V
0805
5
1
REF
3
5
5
Q9
OPT
4
4
R53 *
20k ON BD REF
0603
0.1%
ADJ
2
FIXED
JP5
R54 *
10k
0603
0.1%
JP6
3
1
D3 *
BZT52C5V6S
BG2
*
3
1
2
3
10k
1%
SW2
ON BD
U2
LT6650HS5
R51 *
2
VIN
CIN11 CIN12
OPT
OPT
1210 1210
1
4
1
2
3
4
Q8
OPT
2
Q7
OPT
5
5
EXTREF2+
TG2
R58
0.005
2010
E22
E24
PULSE2
VOUT2
GND
+ COUT13 + COUT14
OPT
OPT
7343-D15T 7343-D15T
B
B
A
A
CUSTOMER NOTICE
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
TECHNOLOGY
LT
M. SHRIVER
TITLE: SCHEMATIC
FAST TRANSIENT DUAL OUTPUT STEP-DOWN DC-DC CONVERTER
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
4
3
2
IC NO.
N/A
SCALE = NONE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
LTC3838EUHF-1/-2
DEMO CIRCUIT1997A
DATE: DEC 19, 2012
SHEET 2
1
REV.
2
OF 2
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