5 4 3 2 1 REVISION HISTORY ECO V+ 7 3 - C23 4 VREFB 2 VC22 OPT. 1206 C24 100pF VCC 37 38 * * 46 45 ROFSA ROFSA V+ + 7 ROFSB ROFSB U11B C27 R19 OPT * - V2 4 U9 3 - OPT. 1206 1206 U11A U14 C41 0.1uF 8 * 1206 - 3 1206 + 3 VV- 4 4 9 V- * V+ - V- R27 R29 * OUTA TP12 GND * * TP13 V- * C35 * 1206 R30 B * -5V -5V + R28 U13 - 2 * C34 OPT U12 6 R26 * V+ + 1 3 JP16 FBA V+ * 1 * -5V R25 +5V 3 V+ GND B * * * U11C +5V EXT 2 VOSADJA C33 * * C32 R24 V- TP14 1 JP12 R23 R22 5 VOSADJA C40 0.1uF 1206 R21 * 2 V- * * C 6 2 TP10 C29 V+ + OUTB TP9 GND C28 * * 100pF V+ 2 6 4 GND * VOSADJA 2 EXT GND V- R20 -5V 43 - VR18 7 EXT 2 * 1 44 V+ R10 * 47 48 2 1 REFA REFA RCOMA 3 RINA RINA VOSADJA * +5V 1206 VOSADJB + U8 + 4 * C26 5 3 C30 4 C39 0.1uF * 1206 5 35 36 34 RCOMB REFB REFB 31 32 33 VREFA 3 2 3 C37 0.1uF C38 0.1uF 42 * R9 * +5V C36 0.1uF 41 - C31 TP11 JP11 TP15 1206 7 C25 R8 R7 1 1 IOUT1A GEADJA VOSADJB JP13 R6 DNC JP9 VOSADJB RINB RINB GEADJB 16 VDD 10K R17 R15 R14 R16 10K 10K R12 R13 21 JP8 15 3 S0 S1 S2 M-SPAN 5 6 MSPAN 1 3 23 24 25 22 JP6 JP7 6 40 39 3 RFBA RFBA GEADJA 1 2 C CLR LDAC RFLAG 4 S2 3 2 S1 1 JP5 VOSADJB IOUT2BF IOUT2BS IOUT2AF IOUT2AS 2 2 3 U1 * 19 26 20 D JP15 FBB V+ RFBB RFBB IOUT1B 28 29 9 8 1 CS/LD SCK SDI SRO GND GND GND GND GND GND S0 3 11 13 12 14 GND 1 JP4 * 7 10 17 18 27 30 RFLAG# 3 2 LDAC# 1 JP3 10K 3 10K 1 2 CLR# 10K 2 1 0 10K R11 VCC CS# SCK MOSI MISO 02-03-11 V- 3 D DATE MARK T. 7 EXT GND APPROVED PRODUCTION 6 2 TP8 1 JP1 DESCRIPTION 2 V+ + GEADJB REV __ U7 * * ASSY -BIT U1 U7, U14 U8, U12 U9,U13 U11 -A 18 LTC2758ACLX LT1012ACS8 LT1360CS8 LTC2054HVCS5 LTC6244HVCDD -B 16 LTC2752ACLX LT1468CS8 LT1468CS8 OPT OPT S2 S1 S0 SPAN 0 0 0 0 5 0 0 1 0 10 0 1 0 -5 5 ASSY R6 R7 R8 R9 R10 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 0 1 1 -10 10 -A 1K OPT 10K 10K OPT 1K OPT 4.02K 10 OPT 10K 4.02K 10 OPT 1K 1 0 0 -2.5 2.5 OPT OPT 0 OPT OPT 1K OPT OPT 0 1K OPT 10K OPT 1K OPT 0 OPT OPT 0 OPT 1 0 1 -2.5 7.5 ASSY C24 C25 C26 C28 C30 C32 C33 C35 -A 100pF 1uF 1uF OPT 100pF 1uF 1uF OPT -B OPT OPT OPT 33pF OPT OPT OPT 33pF -B OPT CUSTOMER NOTICE A APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. NOTE: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTORS ARE 0603. ALL CAPACITORS ARE 0603. 2. INSTALL SHUNTS AS SHOWN. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 4 3 TECHNOLOGY JW MARK T. 2 VREFA VREFB VREFB CS# SCK MOSI MISO CS# SCK MOSI MISO 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only TITLE: SCHEMATIC DUAL, SPI, IOUT, 18/16-BIT DAC SIZE N/A SCALE = NONE VREFA DATE: IC NO. LTC2758/2ACLX DEMO CIRCUIT 1684A 2/3/2011 REV. 2 SHEET 1 1 OF 2 A 5 4 3 2 1 MISO MOSI SCK VREFA C7 SCL SDA WP A2 A1 A0 VIN C3 10uF 1206 GND VOUT GND TRIM TP6 6 5 C2 10uF 1206 VREFB 5V EXT 2 4 JP2 VREFB 6 5 7 3 2 1 1 V+ U4 24LC025-I /ST TP3 C5 10uF 1206 2 1 AMPV- C12 10uF 1206 C13 10uF 1206 C14 10uF 1206 C15 10uF 1206 IN +5V OUT SHDN GND BYP 5 4 C10 C16 10uF 1206 C17 10uF 1206 C18 10uF 1206 C19 10uF 1206 4 TP5 2 SD C21 GND BYP IN OUT 3 5 0.01uF U6 LT1964ES5-5 T2 R32 10.0K R34 R33 TP7 10.0K 10.0K CUSTOMER NOTICE THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 4 3 B -5V APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. A C20 10uF 1206 1 V- R31 C11 10uF 1206 0.01uF 2 B 10.0K +5V 2 3 TP4 C6 10uF 1206 D2 BAT54C 1 AMPV+ 3 D3 BAT54C TP16 TP2 REF REG C U5 LT1761ES5-5 GND T1 VCC VCC 1 JP10 VCC 3 8 4 VSS VCC C4 0.1uF VREFB 1 2 R4 4.99K GND U3 OPT. R5 4.99K R3 4.99K 5V EXT 2 6 3 OUTS 7 8 4 SD# GND 2 R1 88.7K OUTF 3 ADJ VIN GND C1 10uF 1206 GND JP14 VREFA 1 2 R2 10.0K 10 9 11 12 14 13 8 3 C 12V 1 BAT54C CS# SCK MOSI MISO GND GND GND EEVCC EESDA EESCL EEGND AUX 6 4 7 5 5 OUT 3 2 VREFA 3 CS SCK/SCL MOSI/SDA MISO 1 2 BYP IN 2 V+ 5V 1 D1 1 5 V+ J1 HD2X7-079-MOLEX D U2 LTC6655CHMS8-5 0.1uF 3 4 U10 LT1761ES5-BYP TP1 3 CS# D TECHNOLOGY JW MARK T. TITLE: SCHEMATIC DUAL, SPI, IOUT, 18/16-BIT DAC SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC2758/2ACLX DEMO CIRCUIT 1684A 2/3/2011 REV. 2 SHEET 2 1 OF 2 A