DC1733A - Schematic

5
4
8
TXEN2
E18
TXEN2-J
GND 1
2
3
4
5
6
5V 7
TXD1
E19
TXD1-J
E20
TXD2-J
R16 1K
GND 1
2
3
4
5
6
D
2
3
4
5
6
5V 7
8
JP10
TXD1
5
7
R26 1K
6
8
PAR OPEN
1
3 JP5
TXD1-2
JP11
TXD2
LDO
TXD1
FB_LDO
TXD2
LDO_IN
5V
SC2
SW
R9
10K
R25
100K
4
E1
SC1
E2
SC1
1
SC2
2
28
C1
C5
100nF
R13
0
TXEN1-J
FB_OUT
EXPOSED
SC2
PAD
1
RST
RT
CPOR
L+
ILIM
Q2
ILIM
GND
RES
5V
RXD1
18
17
C8
16
15
CQ1
SR
R23
10.2K
38.3K
SYNC
EN/UVLO
15
3
3
OPEN
DC1733A-A
DC1733A-B
LT3669EUFD
LT3669EUFD-2
4
C6
470pF
50V
S1
5 S2
M12-MALE-5PIN
10
J2
L+
2
JP7
EN/UVLO
D1
D2
4
CQ1
CON-OSTTV041150
R18
100K
SMCJ36A
D4
SMCJ36A
R28
EN/UVLO
E16
1K
1. ALL RESISTORS ARE 0402
ALL CAPACITORS ARE 0402.
I BUCK
C8
0.1A
0.1A
10uF
C9
0.1uF
0.15A
0.3A
22uF
0.22uF
D6
1630 McCarthy Blvd.
Milpitas, CA 95035
OPEN
DFLS160
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
Phone: (408)432-1900 www.linear.com
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
TECHNOLOGY Fax: (408)434-0507
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
LTC Confidential-For Customer Use Only
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
TITLE: SCHEMATIC
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
INDUSTRIAL TRANSCEIVER WITH INTEGRATED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
STEP-DOWN REGULATOR AND LDO
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
L1
82uH, CDRH4D22HPNP-820MC
33uH, CDRH50D28RNP-330MC
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
D3
CUSTOMER NOTICE
I LDO
3
2
R17
1M
1
12
B
L+
Q2
L-/GND
1
NOTE: UNLESS OTHERWISE SPECIFIED
HEADER 2X8 2MM
*
E10
2
SYNC
16
E12
1
AGND
GND
29
5V
14
E11
CQ1
50V
1206
C12
4.7uF
JP3
CQ1-2
C14
OPT
R14
100K
3.3V
E9
L-/GND
J1
C11
470pF
50V
13
VERSION TABEL
ASSY TYPE
U1
D5
OPT
23
RST
12
A
GND
L+
7.5V - 40V Q2
C10
OPT
1206
R24
9
C
E21
11
3
11
24
E4
SC1
10
SYNC
SYNC
E15
GND
13
22
*
GND
E8
8
SC2
V BUCK
5V / I BUCK
E6
R22
53.6K
RES
9
5V
21
SR
25
JP4
L1
*
PAR
2
E14
C16
0.1uF
6.3V
0603
*
*
GND
LDOIN
6.3V
0805
*
C9
*
14
WAKE
7
DIO
2
C13
0.1uF VOUT
6.3V
0603
1
GND
6
R20
4.42K
20
5V JP2
1
TXD1-J
26
3
R12
42.2K
2
27
10pF
JP1
J3
TXEN2-J
DA
SC1
DIO
RST
TXD2-J
RXD1
5V R11 100K
E3
19
3.3V / I LDO
E5
C15
0.1uF
6.3V
0603
C7
1uF
6.3V
0603
D6
RXD1
RST
5
TXEN2
BST
E13
4
TXEN1
5V
R10
100K
3
*
BD
RXD1
B
V LDO
R19
14K
R27 1K
5V
2
3.3V
WAKE
C
1
R21
10K
E7
U1
8
GND 1
5V
WAKE
8
5V 7
TXD2
PAR OPEN
1
3
JP6
TXEN1-2
JP9
TXEN2
3
5V 7
D
R15 1K
1
6
3
4
5
2
3
3
TXEN1-J
1
JP8
TXEN1
WAKE
E17
2
2
2
TXEN1
GND 1
2
5V
3
4
3
2
N/A
DATE:
IC NO.
REV.
LT3669EUFD/LT3669EUFD-2
DEMO CIRCUIT 1733A
Tuesday, May 06, 2014
SHEET
1
3
1
OF
1
A
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