HV9120 DATA SHEET (05/02/2016) DOWNLOAD

HV9120/HV9123
High-Voltage, Current-Mode, PWM Controller
Features
Description
•
•
•
•
HV9120 and HV9123 are Switch-Mode Power Supply
(SMPS) controllers suitable for the control of a variety
of converter topologies, including flyback and forward
converter.
10 to 450V input voltage range
<1.3 mA supply current
>1 MHz clock
49% maximum duty version
Applications
•
•
•
•
•
Off-line high frequency power supplies
Universal input power supplies
High density power supplies
Very high efficiency power supplies
Extra wide load range power supplies
Using an internal, high-voltage regulator, HV9120 and
HV9123 can derive a bias supply for starting-up and
powering a converter from a variety of power sources,
such as a 12V battery or the rectified AC (230 VAC)
line.
HV9120/HV9123 controllers include all essentials for a
power-converter design, such as a bandgap reference,
an error amplifier, a ramp generator, a high-speed
PWM comparator, and a gate driver. A shutdown latch
provides on/off control. Device power consumption is
less than 6 mW when shutdown.
HV9120 offers 50% maximum duty and HV9123 offers
nearly 100% duty.
Package Types
1
16
1
16
4
16-lead SOIC
16-lead PDIP
See Table 3-1 for pin information
 2016 Microchip Technology Inc.
DS20005519A-page 1
HV9120/HV9123
Block Diagram HV9120
DS20005519A-page 2
 2016 Microchip Technology Inc.
HV9120/HV9123
Block Diagram HV9123
 2016 Microchip Technology Inc.
DS20005519A-page 3
HV9120/HV9123
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Input voltage, VIN .................................................................................................................................................... 450V
Device supply voltage, VDD .................................................................................................................................... 15.5V
Logic input voltage ........................................................................................................................... -0.3V to VDD + 0.3V
Linear input voltage .......................................................................................................................... -0.3V to VDD + 0.3V
High-voltage regulator input current (continuous), IIN .......................................................................................... 2.5 mA
Operating temperature range ................................................................................................................ -40°C to +125°C
Storage temperature range ................................................................................................................... -65°C to +150°C
Power dissipation: 16-Lead SOIC ...................................................................................................................... 900 mW
16-Lead PDIP .................................................................................................................... 1000 mW
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: VDD = 10V, VIN = 48V, VDISC= 0V, RBIAS = 390 kΩ, ROSC = 330 kΩ, TA= 25°C, unless otherwise noted.
Parameter
Symbol
Min
Typ
Max
Units
VREF
3.92
3.84
4.00
4.00
4.08
4.16
V
Output impedance
Short circuit current
Change in VREF with temperature
Oscillator
Oscillator frequency
Initial accuracy
ZOUT
ISHORT
∆VREF
15
-
30
125
0.25
45
250
-
fMAX
fOSC
VDD regulation
Temperature coefficient
PWM
Maximum duty cycle HV9120
HV9123
Dead time
HV9123
Minimum duty cycle
Pulse width where pulse drops
out
Current Limit
Maximum input signal
Delay to output
-
1.0
80
160
-
3.0
100
200
170
120
240
15
-
49.0
95
-
49.4
97
225
-
49.6
99
0
%
(Note 1)
ns
%
-
80
125
ns
HV9123 only (Note 1)
–
(Note 1)
1.0
-
1.2
80
1.4
120
V
ns
Reference
Output voltage
DS20005519A-page 4
DMAX
DMIN
VLIM
tD
Conditions
RL= 10 MΩ
RL= 10 MΩ,
TA= -40°C to +125°C
kΩ
(Note 1)
μA
VREF= GND
mV/°C TA= -40°C to +125°C (Note 1)
MHz
kHz
ROSC= 0Ω
ROSC= 330 kΩ (Note 2)
ROSC= 150 kΩ (Note 2)
%
9.5V< VDD<13.5V
ppm/°C TA= -40°C to +125°C (Note 1)
VFB= 0V
VCS= 1.5V, VCOMP≤ 2.0V
(Note 1)
 2016 Microchip Technology Inc.
HV9120/HV9123
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: VDD = 10V, VIN = 48V, VDISC= 0V, RBIAS = 390 kΩ, ROSC = 330 kΩ, TA= 25°C, unless otherwise noted.
Parameter
Symbol
Error Amplifier
Feedback voltage
VFB
Input bias current
IIN
Input offset voltage
VOS
Open loop voltage gain
AVOL
Unity gain bandwidth
GB
Output source current
ISOURCE
Output sink current
ISINK
High-voltage Regulator and Start-up
Input voltage
VIN
Input leakage current
IIN
Regulator turn-off threshold
VTH
voltage
Undervoltage lockout
VLOCK
Supply
Supply current
IDD
Quiescent supply current
IQ
Nominal bias current
IBIAS
Operating range
VDD
Shutdown Logic
Shutdown delay
tSD
NSD pulse width
tSW
RST pulse width
tRW
Latching pulse width
tLW
Input low voltage
VIL
Input high voltage
VIH
Input current, input high voltage
IIH
Input current, input low voltage
IIL
Output
Output high voltage
VOH
Output low voltage
Output resistance
VOL
Pull up
Pull down
Pull up
ROUT
Pull down
Rise time
Fall time
tR
tF
Min
Typ
Max
Units
Conditions
3.92
4.00
4.08
25
500
nulled during trim
60
80
1.0
1.3
-1.4
-2.0
0.12
0.15
-
V
nA
dB
MHz
mA
mA
FB shorted to COMP
VFB= 4.0V
–
(Note 1)
(Note 1)
VFB= 3.4V
VFB= 4.5V
10
8.0
8.7
450
10
9.4
V
μA
V
IIN< 10 µA; VCC> 9.4V
VDD> 9.4V
IIN= 10 µA
7.0
8.1
8.9
V
–
9.0
0.75
0.55
20
-
1.3
13.5
mA
mA
μA
V
CL< 75 pF
VNSD = 0V
–
–
50
50
25
7.0
-
50
1.0
-25
100
2.0
5.0
-35
ns
ns
ns
ns
V
V
μA
μA
CL= 500 pF, VCS= 0V (Note 1)
(Note 1)
(Note 1)
VNSD, VRST =0V(Note 1)
–
–
VIN= VDD
VIN= 0V
-
-
V
IOUT= 10 mA
VDD0.25
VDD0.3
-
-
-
-
0.2
-
-
0.3
-
15
8.0
20
25
20
30
-
10
30
20
30
75
75
V
Ω
IOUT= 10 mA,
TA= -40°C to 125°C
IOUT= -10 mA
IOUT= -10 mA,
TA= -40°C to 125°C
IOUT= ±10 mA
Ω
IOUT= ±10 mA,
TA= -40°C to 125°C
ns
ns
CL= 500 pF (Note 1)
CL= 500 pF(Note 1)
Note 1: Design guidance only; Not 100% tested in production.
2: Stray capacitance on OSC in pin must be ≤ 5 pF.
 2016 Microchip Technology Inc.
DS20005519A-page 5
HV9120/HV9123
TEMPERATURE SPECIFICATIONS
Parameter
Symbol
Min
Typ
Max
Units Conditions
Temperature Ranges
Operating Temperature
-40
Storage Temperature
-65
125
°C
–
150
°C
Package Thermal Resistances
Thermal Resistance, SOIC
θja
–
83
–
°C/W
Thermal Resistance, PDIP
θja
–
51
–
°C/W
1.1
Truth Table
TRUTH TABLE
SHUTDOWN
RESET
OUTPUT
H
H
H
H→L
L
H
Off, not latched
L
L
Off, latched
L→H
L
Off, latched, no change
DS20005519A-page 6
Normal operation
Normal operation, no change
 2016 Microchip Technology Inc.
HV9120/HV9123
2.0
TYPICAL PERFORMANCE CURVES
Output Switching Frequency
vs. Oscillator Resistance
Error Amplifier Output Impedance (Z0)
106
1M
105
104
fOUT (Hz)
Z0 (Ω)
10
HV9123
3
102
HV9120
100k
10
1.0
0.1
100
1K
10K
100K
1M
10k
10k
10M
100k
Frequency (Hz)
PSRR - Error Amplifier and Reference
0
1M
ROSC (Ω)
80
-10
70
-20
60
-30
50
Error Amplifier Open Loop Gain/Phase
180
-40
-50
60
40
0
20
-60
-60
10
-70
0
-80
10
100
1K
10K
100K
-120
-180
-10
100
1M
Phase (OC)
Gain (dB)
PSRR (dB)
120
1K
10K
100K
1M
Frequency (Hz)
Frequency (Hz)
RDISCHARGE vs. tOFF (HV9123 only)
104
VDD = 10V
ROSC = 100k
tOFF (nsec)
Bias Current (μA)
100
VDD = 10V
10
10
3
ROSC = 10k
ROSC = 1.0k
1.0
105
106
107
Bias Resistance (Ω)
FIGURE 2-1:
102
10-1
10
101
102
103
104
105
106
RDISCHARGE (Ω)
Typical Performance Curves
 2016 Microchip Technology Inc.
DS20005519A-page 7
HV9120/HV9123
3.0
PIN DESCRIPTION
The locations of the pins are listed in Features.
TABLE 3-1:
PIN DESCRIPTION
Pin #
Symbol HV9120
Symbol HV9123
1
VIN
VIN
High-voltage, VDD regulator input
2
NC
NC
No connect
3
NC
NC
No connect
4
CS
CS
Current-sense input
5
GATE
GATE
Gate-drive output
6
GND
GND
Ground
7
VDD
VDD
High-voltage, VDD regulator output
8
OSCO
OSCO
9
OSCI
OSCI
Oscillator Input
10
NC
DISC
Oscillator discharge, current set
11
VREF
VREF
4V Reference output
Reference voltage level can be overridden by an externally-applied voltage source.
12
NSD
NSD
Active low input to set shutdown latch
13
RST
RST
Active high input to reset shutdown
latch
14
COMP
COMP
15
FB
FB
Feedback-voltage input
16
BIAS
BIAS
Internal bias, current set
DS20005519A-page 8
Description
Oscillator output
Error-amplified output
 2016 Microchip Technology Inc.
HV9120/HV9123
4.0
TEST CIRCUITS
The test circuits for characterizing error-amplifier output impedance, ZOUT, and error-amplifier, power-supply rejection
ration, PSRR, are shown in Figure 4-1.
+10V
(VDD)
Error Amp ZOUT
0.1V swept 10Hz - 1.0MHz
PSRR
1.0V swept 100Hz - 2.2MHz
60.4k
(FB)
100k 1%
10.0V
100k 1%
–
+
Reference
V1
GND
(-VIN)
Tektronix
P6021
(1 turn
secondary)
0.1μF
FIGURE 4-1:
4.0V
40.2k
V2
–
V1
+
Reference
V2
0.1μF
Test Circuits
 2016 Microchip Technology Inc.
DS20005519A-page 9
HV9120/HV9123
5.0
DETAILED DESCRIPTION
5.1
High-Voltage Regulator
The high-voltage regulator included in HV9120 and
HV9123 consists of a high-voltage, n-channel, depletion-mode DMOS transistor, driven by an error amplifier, providing a current path between the VIN terminal
and the VDD terminal. The maximum current, about 20
mA, occurs when VDD = 0, with current reducing as VDD
rises. This path shuts off when VDD rises to somewhere
between 7.8 and 9.4V. So, if VDD is held at 10 or 12V
by an external source, no current other than leakage is
drawn through the high voltage transistor. This minimizes dissipation.
Use an external capacitor between VDD and GND to
store energy used by the chip in the time between shutoff of the high voltage path and the VDD supply’s output
rising enough to take over powering the chip. This
capacitor should have a value of 100X or more the
effective gate capacitance of the MOSFET being
driven, as well as very good high-frequency characteristics. See the equation below. Ceramic caps work well.
Electrolytic capacitors are generally not suitable.
C VDD  100   gate charge of FET at 10V 
The device uses a resistor divider string to monitor VDD
for both the under voltage lockout circuit and the shutoff
circuit of the high voltage FET. Setting the under voltage sense point about 0.6V lower on the string than the
FET shutoff point guarantees that the under voltage
lockout releases before the FET shuts off.
5.2
Bias Circuit
HV9120 and HV9123 require an external bias resistor,
connected between the BIAS pin and GND, to set currents in a series of current mirrors used by the analog
sections of the chip. The nominal external bias current
requirement is 15 to 20 µA, which can be set by a 390
kΩ to 510 kΩ resistor if VDD = 10V, or a 510 kΩ to 680
kΩ resistor if VDD = 12V. A precision resistor is not
required, ±5% meets the device requirements.
5.3
Clock Oscillator
The clock oscillator of the HV9120 and HV9123 consists of a ring of CMOS inverters, timing capacitors, and
a capacitor-discharge FET. A single external resistor
between the OSCI and OSCO sets the oscillator frequency (see Figure 2-1, Output Switching Frequency
vs Oscillator Resistance).
HV9120 includes a frequency-dividing flip-flop that
allows the part to operate with a 50% duty limit. Accordingly, the effective switching frequency of the power
DS20005519A-page 10
converter is half the oscillator frequency (see Figure 21, Output Switching Frequency vs Oscillator Resistance).
An internal, discharge FET resets the oscillator ramp at
the end of the oscillator cycle. The FET is internally
connected to GND in HV9120 (50% max duty version).
Whereas, the FET is externally connected to GND, by
way of a resistor, in the HV9123 (100% duty version).
The resistor programs the oscillator dead time at the
end of the oscillator period in HV9123 applications.
The oscillator turns off during shutdown to reduce supply current by about 150 μA.
5.4
Reference
The reference of the HV9120 and HV9123 consists of
a band-gap reference, followed by a buffer amplifier,
which scales the voltage up to 4.0V. The scaling resistors of the buffer amplifier are trimmed during manufacture so that the output of the error amplifier, when
connected in a gain of -1 configuration, is as close to
4.0V as possible. This nulls out the input offset of the
error amplifier. As a consequence, even though the
observed reference voltage of a specific part may not
be exactly 4.0V, the feedback voltage required for
proper regulation will be 4.0V.
An approximately 50 kΩ resistor is located internally
between the output of the reference buffer amplifier
and the circuitry it feeds–reference output pin and noninverting input to the error amplifier. This allows overriding the internal reference with a low impedance voltage
source ≤6.0V. Using an external reference reinstates
the input offset voltage of the error amplifier. Overriding
the reference should seldom be necessary.
The reference of the HV9120 and HV9123 is a high
impedance node, and usually there will be significant
electrical noise nearby. Therefore, a bypass capacitor
between the reference pin and GND is strongly recommended. The reference buffer amplifier is compensated to be stable with a capacitive load of 0.01 to
0.1 µF.
5.5
Error Amplifier
The error amplifier in HV9120 and HV9123 is a lowpower, differential-input, operational amplifier. A PMOS
input stage is used, so the common mode range
includes ground and the input impedance is high.
5.6
Current Sense Comparators
HV9120 and HV9123 use a dual-comparator system
with independent comparators for modulation and current limiting. This allows the designer greater latitude in
compensation design, as there are no clamps, except
ESD protection, on the compensation pin.
 2016 Microchip Technology Inc.
HV9120/HV9123
5.7
Remote Shutdown
5.8
The NSD and RST pins control the shutdown latch.
These pins have internal, current-source pull-ups so
they can be driven from open drain logic. When not
used they should be left open, or connected to VDD.
The output buffer of HV9120 and HV9123 is of standard CMOS construction–P-channel pull-up and Nchannel pull-down. Thus, the body-drain diodes of the
output stage can be used for spike clipping. External
Schottky diode clamping of the output is not required.
VDD
1.5V
CS
0
Output Buffer
50%
NSD
tR ≤ 10ns
tF ≤ 10ns
50%
0
tD
VDD
tSD
VDD
GATE
90%
GATE
0
0
VDD
NSD
0
90%
tSW
50%
50%
tR, tF ≤ 10ns
tLW
VDD
RST
0
FIGURE 5-1:
50%
50%
50%
tRW
Shutdown Timing Waveforms
 2016 Microchip Technology Inc.
DS20005519A-page 11
HV9120/HV9123
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
16-lead SOIC
XXXXXXXXXXX
XXXXXXXXX e3
YYWWNNN
16-lead PDIP
XXXXXXXXXXXXXX
XXXXXXXXXXXX e3
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005519A-page 12
Example
HV9120NG
1611343 e3
Example
HV9120P
e3
1611343
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
 2016 Microchip Technology Inc.
HV9120/HV9123
16-Lead SOIC (Narrow Body) Package Outline (NG)
9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch
D
16
θ1
E1 E
Note 1
(Index Area
D/2 x E1/2)
L2
1
L
Top View
View B
View
B
A
h
A A2
h
Seating
Plane
e
A1
Seating
Plane
θ
L1
Gauge
Plane
Note 1
b
Side View
View A-A
A
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
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DPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURUDSULQWHGLQGLFDWRU
Symbol
MIN
Dimension
NOM
(mm)
MAX
A
A1
A2
b
D
1.35*
0.10
1.25
0.31
9.80*
1.75
0.25
1.65*
0.51
9.90
E
E1
e
5.80* 3.80*
6.00
3.90
10.00* 6.20* 4.00*
1.27
BSC
h
L
0.25
0.40
0.50
1.27
L1
L2
1.04 0.25
REF BSC
ș
ș
0O
5O
-
-
8
O
15O
JEDEC Registration MS-012, Variation AC, Issue E, Sept. 2005.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings are not to scale.
 2016 Microchip Technology Inc.
DS20005519A-page 13
HV9120/HV9123
16-Lead PDIP (.300in Row Spacing) Package Outline (P)
.790x.250in body, .210in height (max), .100in pitch
D
16
Note 1
(Index Area)
E1
E
b1
1
D1
D1
b
Top View
View B
View B
A
A
Seating
Plane
A2
A1
L
eA
eB
e
A
Side View
View A - A
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
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DSULQWHGLQGLFDWRU
Symbol
Dimension
(inches)
A
A1
A2
b
b1
D
D1
E
E1
MIN
.130*
.015
.115
.014
.045
.745†
.005
.290†
.240
NOM
-
-
.130
.018
.060
.790
-
.310
.250
.195
†
.070
†
.050*
.325
.280
MAX
.210
.035*
.023
.810
e
.100
BSC
eA
.300
BSC
eB
L
.300*
.115
-
.130
.430
.150
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Drawings not to scale.
DS20005519A-page 14
 2016 Microchip Technology Inc.
HV9120/HV9123
APPENDIX A:
REVISION HISTORY
Revision A (May 2016)
• Updated file to Microchip format.
• Merged Supertex Doc #s DSFP-HV9120 and
DSFP-HV9123 to Microchip DS20005519A.
• Revised Electrical Characteristics to accommodate the merged products.
• Updated Pin names to reflect new naming convention.
• Significant text changes to Detailed Description
• Minor text changes throughout.
 2016 Microchip Technology Inc.
DS20005519A-page 15
HV9120/HV9123
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
-
XX
Device
X
-
Package Environmental
Options
Device:
HV9120
X
Media
Type
= High Voltage Current‐Mode PWM Examples:
a)
HV9120NG-G
b)
HV9123NG-G
c)
HV9123NG-G-M901
14-Lead SOIC
package, 53/Tube
14-Lead SOIC
package, 53/Tube
14-Lead SOIC
package, 2600/Reel
Controller, 10 to 450V input voltage range,
49% duty cycle
HV9123 = High Voltage Current‐Mode PWM Controller, 9 to 80V input voltage range,
99% duty cycle
Package:
NG
P
= 16-lead SOIC
= 16-lead PDIP
Environmental
G
= Lead (Pb)-free/ROHS-compliant package
Media Type:
(blank)
= 45/Tube for NG package
24/Tube for P package
= 2600/Reel for NG package
= 2600/Reel for NG package
M901
M934
Note:
For media types M901 and M934, the base quantity for tap and reel was standardized at 2600/reel. Both
options will result in delivery of the same number of parts/reel.
DS20005519A-page 16
 2016 Microchip Technology Inc.
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INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC,
SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O,
Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0537-5
QUALITYMANAGEMENTSYSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
 2016 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS20005519A-page 17
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
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Technical Support:
http://www.microchip.com/
support
Web Address:
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Suites 3707-14, 37th Floor
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Tel: 49-89-627-144-0
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Tel: 66-2-694-1351
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07/14/15
DS20005519A-page 18
 2016 Microchip Technology Inc.