AD6644/AD6645 Evaluation Board Schematics PDF

6
5
4
3
2
1
+3P3VD
DO NOT INSTALL
+5VA
DC COUPLED ENCODE OPTION (SEE NOTE 3)
C6
0.01U
5
+V
1
BUFLAT
+5VA
+5VA
2
1
D
7
D
Q
D
C5
0.01U
Q
4
R13
66.5
R11
66.5
VCC
+3P3VD
U7
6
3
VEE
VBB
1
(SEE NOTE 4)
5
16
2
2
15
3
3
14
4
4
13
5
5
12
6
6
11
7
CR1
7
10
8
2
8
R12
100
R14
100
C34
0.1U
C33
0.1U
OPTIONAL
J4
C4
0.1U
3
2
1
1
49.9
3
5
T2
R35
ENC
4
6
1
ADT4-1WT
4:1
IMPEDANCE RATIO
9
9
ENC
10
100
C29
D0
Q0
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
GND
20
VCC
OUT_EN
RN1
1
MC100LVEL16
ENC
HEADER40
3
8
NC
2
J2
NC7SZ32
GND
U8
R1
100
4
U6
RN2
19
1
16
B13
18
2
15
B12
17
3
14
B11
16
4
13
B10
15
5
12
B09
14
6
11
B08
13
7
10
B07
12
8
11
CLOCK
9
B06
B05
BUFLAT 100
B04
0.1U
VREF
+5VA
Y1
GND
+3P3V
0.1U
+3P3V_XTL
8
OUT
C32
F5
+3P3VD
2
43
42
41
40
D4
44
D5
45
D6
46
D7
47
GND
DVCC
48
DVCC
1
52
49
D8
U1
50
D9
C15
0.1U
51
D10
+3P3V
+3P3V
R10
500
C3
0.1U
J3
5
GND
NC7SZ32
R9
500
DO NOT INSTALL
5
OPT_LAT
4
U4
2
4
INSTALL JUMPER
+V
1
6
E1
BUFLAT
3
7
DR_OUT
+5VA
+5VA
DC COUPLED AIN OPTION
(SEE NOTE 2)
C27
8
9
10
11
0.0
DO NOT INSTALL
16
2
2
15
3
3
14
4
4
13
5
5
12
6
6
11
7
B
12
13
R4
7
10
8
38
GND
D2
VREF
D1
2
8
9
9
36
GND
10
100
D0
Q0
D1
Q1
D2
Q2
D3
Q3
D5
Q5
D6
Q6
Q7
GND
B02
RN4
Q4
D7
37
ENC
DMID
ENC
GND
OVR
AVCC
DNC
GND
AVCC
AIN
GND
AIN
AVCC
GND
GND
8
V+
AIN
21
22
23
5
R6
25.5
7
C8
0.1U
24
21
22
19
20
17
18
15
16
13
14
11
12
9
10
7
8
B00
17
3
14
5
6
16
4
13
3
4
15
5
12
1
2
14
6
11
13
7
12
8
C
10
9
E2
11
CLOCK
BUFLAT 100
30
E6
+3P3VD
2
F2
C24
C25
C26
0.1U
0.1U
0.1U
0.1U
+3P3V
+3P3VIN
28
C23
+5VA
29
+5VA
C1
C9
C10
C11
C12
C13
C14
10U
0.1U
0.1U
0.01U
0.01U
0.01U
0.01U
C17
C18
C19
C20
C21
0.01U
0.01U
0.01U
0.01U
0.01U
B
27
J1
1
25
26
F1
+5V
+5VA
C2
3
AIN
26
23
15
F4
1
2
2
28
25
16
31
2
1
27
2
32
AVCC
GND
C2
GND
AVCC
GND
C1
AVCC
GND
AVCC
GND
GND
19
30
C7
0.1U
+3P3VIN
4
5
10U
C16
0.1U
-5V
+3P3V_XTL
6
+5VA
499
1
R3
18
32
29
1
AIN
1
3
J5
17
24
31
D
+3P3V
+5VA
NC
16
20
+5VA
AD8138ARM
U3
4
15
+5VA
VOCM
14
+5VA
499
VAL
2
V−
R7
25.5
+5VA
R8
AVCC
VREF
6
34
18
1
-5V
36
33
74LCX574
PREF
DVCC
AD6644/AD6645
35
19
33
AVCC
38
OVR
1
34
GND
40
37
B01
D0
35
499
1
B03
20
VCC
D4
39
D3
3
OPT_CLK
1
2
D11
1
66.66MHz (AD6644)
80MHz (AD6645)
D12
GND
OUT_EN
RN3
2
C22
0.1U
10
GND'OUT'
7
1
12
OE' VCC'
5
C
F3
14
D13
3
VCC
DR_OUT
OE
+3P3VD
U2
1
DRY
1
74LCX574
39
C31
R15
178
(SEE NOTE 1)
0.0
C28
C39
C38
0.01U
0.1U
10U
2
R2
C40
10U
1
R5 499
60.4
2
(SEE NOTE 1)
DO NOT INSTALL
L1
A
1
4.7NH
T3
3
6
NOTES:
5
1. R2 IS INSTALLED FOR INPUT MATCHING ON THE PRIMARY OF T3. R15 IS NOT INSTALLED.
R15 IS INSTALLED FOR INPUT MATCHING ON THE SECONDARY OF T3, R2 IS NOT INSTALLED.
4
ADT4-1WT
4:1
IMPEDANCE RATIO
C30
0.1U
A
2. AC COUPLED AIN IS STANDARD, R3, R4, R5, R8 & U3 ARE NOT INSTALLED.
IF DC COUPLED AIN IS REQUIRED, C30, R15 & T3 ARE NOT INSTALLED.
Analog Devices
DRS-HSC
3. AC COUPLED ENCODE IS STANDARD. C5, C6, C33, C34, R1, R11−R14 & U8 ARE NOT INSTALLED.
IF PECL ENCODE IS REQUIRED, CR1 & T3 ARE NOT INSTALLED.
7910 Triad Center Dr.
Greensboro, NC 27409
AD6644ST/AD6645SQ PCB Evaluation Board Schematic
Filename:
Date:
6
5
4
3
2
6645EE01D
9-27-2005_13:27
Rev:
D
Sheet
1
JBB
1
of
JCP
1
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