High-Performance Data-Acquisition System Enhances Images for Digital X-Ray and MRI Today, manufacturers of digital X-ray detectors typically use indirect conversion. Amorphous silicon flat-panel detectors or photodiode arrays with more than one million pixels capture the photon energy, multiplexing the outputs into one or two dozen ADCs. This technology offers effective X-ray photon absorption and a high signal-to-noise ratio to obtain dynamic high-resolution images in real time with a 50% lower X-ray dose. The sampling rate of each pixel is low, from a few hertz for bones and teeth, to a maximum of 120 Hz for capturing images of a baby’s heart, which is the fastest organ in the body. By Maithil Pachchigar Introduction Digital X-ray (DXR), magnetic resonance imaging (MRI), and other medical devices require small, high-performance, lowpower data-acquisition systems to meet the demands of doctors, patients, and manufacturers in a competitive marketplace. This article showcases a high-precision, low-power signal chain that solves the challenges of multichannel applications—such as digital X-ray—that multiplex large and small signal measurements from multiple channels, as well as oversampled applications—such as MRI—that require low noise, high dynamic range, and wide bandwidth. The combination of high throughput rate, low noise, high linearity, low power dissipation, and small size makes the AD7960 18-bit, 5-MSPS PulSAR® differential ADC ideal for these high-performance imaging applications as well as other precision data-acquisition systems. Digital X-Ray When X-rays were first discovered in 1895, they were detected using film or scintillation screens. Since their discovery, X-ray technology has been used for medical diagnostics in fields including oncology, dentistry, and veterinary medicine, as well as in a host of other industrial imaging applications. Digital X-ray replaces film detectors with solid-state sensors, including flat-panel and line-scan detectors. Flat panel detectors use two technologies: direct conversion and indirect conversion. With direct conversion, a selenium array forms capacitive elements that directly convert the high-frequency X-ray photons into an electronic current. With indirect conversion, a cesium iodide scintillator first converts the X-ray photons into visible light, and a silicon photodiode array then converts the visible light into an electronic current. Each photodiode represents a pixel. A low-noise analog front end transforms the small current from each pixel into a large voltage, which is then converted into digital data that can be processed by the image processors. A typical DXR system, shown in Figure 1, multiplexes many channels at high sampling rates into a single ADC without sacrificing accuracy. X-RAY SOURCE PATIENT X-RAY DETECTOR The performance of a digital radiography detector is measured by its image quality, so accurate acquisition and precise processing of the X-ray beam is essential. Digital radiography’s increased dynamic range, fast acquisition speed and frame rate, and uniformity using special image processing techniques allows it to display an enhanced image. Medical imaging systems must provide enhanced images for accurate diagnoses and shorter scanning times for decreased patient exposure to X-ray dosages. High-end radiography systems (dynamic acquisition) are typically used in surgical centers and operating rooms, whereas basic systems are used for emergencies, in small hospitals, or in doctors’ offices. Industrial imaging systems must be rugged, as they have long lifetimes and are subject to high radiation dosages in harsh environments. Security or baggage inspection applications can use low X-ray dosages, as the X-ray source remains on for long periods of time. MRI Gradient Control MRI systems, shown in Figure 2, are best suited for brain imaging, or for orthopedic, angiographic, and vascular studies, as the scan provides high contrast on soft tissue without exposing it to ionizing radiation. MRI operates in the 1-MHz to 100-MHz RF frequency band, whereas computed tomography (CT) and DXR operate in the 1016 -Hz to 1018 -Hz frequency range, subjecting patients to ionizing radiation that can damage living tissue. MAGNET HV DIENT COIL GRA AMP DIGITAL CONTROL RF COIL –HV AMP ADC Figure 2. MRI system. FRONT END AMP ADC FPGA IMAGE SENSOR AMP DAC Figure 1. Digital X-ray signal chain. Analog Dialogue 47-10, October (2013) www.analog.com/analogdialogue 1 Control systems for MRI specify tight tolerances, thus requiring high-performance components. In MRI systems, a large coil is used to create the main magnetic field of 1.5 T to 3 T. A high voltage—up to 1000 V—is applied to the coil to develop the required current of up to 1000 A. MRI systems use gradient control to linearly vary the main magnetic field by changing the current in special coils. These gradient coils are modulated rapidly and precisely, altering the main magnetic field to target very small locations within the body. The gradient control energizes a thin cross section of the body tissue using RF energy to generate the x-, y-, and z-axis images. MRI demands fast response time, with its gradient precisely controlled to within 1 mA (1 ppm). MRI system manufacturers can control the gradient in either analog or digital domains. The design of MRI systems involves significant development time, a huge bill-of-material cost, and large risks associated with its overall hardware and software complexity. High-Performance Data-Acquisition Signal Chain Figure 3 shows a high-precision, low-noise, 18-bit data-acquisition signal chain that features ±0.8-LSB integral nonlinearity (INL), ±0.5-LSB differential nonlinearity (DNL), and 99-dB signal-tonoise ratio (SNR). Figure 4 shows its typical FFT and linearity performance using a 5‑V reference. The total power consumption of the signal chain is about 345 mW, about 50% lower than competitive solutions. +VS +7V ADR4550 0.1𝛍F +5V AD8031 0.1𝛍F 0.1𝛍F 10𝛍F +5V –VS 0.1𝛍F +1.8V 0.1𝛍F +1.8V 0.1𝛍F +VS REF VDD1 VDD2 VIO CNV± 100𝛀 –VS IN+ D± 100𝛀 DCO± 100𝛀 AD7960 IN– +VS GND 20𝛀 0V TO 5V ADA4899-1 CLK± VCM 56pF 100𝛀 DIGITAL HOST LVDS TRANSMIT AND RECEIVE ADA4899-1 REFIN 56pF DIGITAL INTERFACE SIGNALS 20𝛀 0V TO 5V 2.5V 0.1𝛍F –VS +VS VCM AD8031 0.1𝛍F BUFFERED VCM PIN OUTPUT GIVES THE REQUIRED 2.5V COMMON-MODE SUPPLY FOR ANALOG INPUTS. –VS Figure 3. Precision, fast-settling signal chain using AD7960, ADA4899, AD8031, and ADR4550. 1.00 0 REFERENCE = 5V INPUT FREQUENCY = 20kHz SNR = 99.8dB SINAD = 99.7dB THD = –115.9dB SFDR = 118.3dB –20 0.50 –60 0.25 INL (LSB) AMPLITUDE (dB) –40 0.75 –80 –100 –0.25 –120 –0.50 –140 –0.75 –160 –180 0 0 500 1000 1500 2000 2500 –1.00 0 50000 100000 150000 200000 250000 CODE FREQUENCY (kHz) Figure 4. AD7960 typical FFT and linearity performance. 2 Analog Dialogue 47-10, October (2013) This type of high-speed, multichannel, data-acquisition system could be used in CT, DXR, and other medical imaging applications that require higher sampling rates without sacrificing accuracy. Its 18-bit linearity and low noise provide enhanced image quality, and its 5‑MSPS throughput allows a shorter scanning period (more frames per second) and decreased exposure to the X-ray dosage for accurate physician diagnostics and a better patient experience. Multiplexing multiple channels creates higher-resolution images for full analysis of organs such as the heart, and achieves affordable diagnosis while minimizing power dissipation. Accuracy, cost, power dissipation, size, complexity, and reliability are of paramount importance for medical equipment manufacturers. and other oversampled applications—require a state-of-the-art ADC. The AD7960 18-bit, 5-MSPS PulSAR differential ADC, shown in Figure 5, uses a capacitive digital-to-analog converter (CAPDAC) to provide unprecedented noise and linearity without latency or pipeline delay. It provides the wide bandwidth, high accuracy (100 dB DR), and fast sampling (200 ns) required for medical imaging applications, and significantly reduces power dissipation and cost in multichannel applications. Available in a small (5 mm × 5 mm), easy-to-use 32‑lead LFCSP package, it is specified over the –40°C to +85°C industrial temperature range. The 16-bit AD7961 is pin-compatible with the AD7960, and can be used when 16-bit performance is sufficient. In CT scanners, the pixel current is captured continuously using one track-and-hold per channel, with outputs multiplexed to a high-speed ADC. A high throughput rate allows many pixels to be multiplexed to a single ADC, saving cost, space, and power. Low noise and good linearity provide a high-quality image. Highresolution infrared cameras could benefit from this solution. REFIN REF VCM VDD1 VDD2 VIO EN0 EN1 ÷2 IN+ Oversampling is the process of sampling the input signal at a much higher rate than the Nyquist frequency. Oversampling is used for spectroscopy, MRI, gas chromatography, blood analysis, and other medical instruments that require a wide dynamic range to accurately monitor and measure both small and large signals from multiple channels. High resolution and accuracy, low noise, fast refresh rates, and very low output drift can significantly simplify the design, reducing development cost and risk for MRI systems. CLOCK LOGIC EN3 CAP DAC IN– EN2 CNV+, CNV– SERIAL LVDS SAR AD7960 D+, D– DCO+, DCO– CLK+, CLK– GND Figure 5. AD7960 functional block diagram. One of the key requirements for MRI systems is measurement repeatability and stability over long periods of time in a hospital or doctor’s office. For enhanced image quality, these systems also demand tight linearity and high dynamic range (DR) from dc to tens of kilohertz. As a guideline, oversampling the ADC by a factor of four provides one additional bit of resolution, or a 6-dB increase in DR. The DR improvement due to oversampling is ΔDR = log2 (OSR) × 3 dB. In many cases, oversampling is implemented well in Σ-Δ ADCs, but these are limited when fast switching between channels and accurate dc measurements are required. Oversampling with a successive-approximation (SAR) ADC also improves antialiasing and reduces noise. The capacitive DAC, shown in Figure 6, consists of a differential 18-bit binary weighted capacitor array—which is also used as the sampling capacitor that acquires the analog input signal—a comparator, and control logic. When the acquisition phase is complete, the conversion control input (CNV±) goes high, the differential voltage between inputs IN+ and IN− is captured, and the conversion phase begins. Each element of the capacitor array is successively switched between GND and REF, charge is redistributed, the input is compared to the DAC value, and the bit is kept or dropped depending upon the result. The control logic generates the ADC output code at the completion of this process. The AD7960 returns to acquisition mode about 100 ns after the start of conversion. The acquisition time is approximately 50% of the total cycle time, making the AD7960 easy to drive and relaxing the required settling time of the ADC driver. State-of-the-Art ADC Architecture Precision high-speed data-acquisition systems used in CT, DXR, and other multichannel applications—or in spectroscopy, MRI, IN+ GND LSB MSB 131,072C 65,536C 4C 2C C SW+ SWITCHES CONTROL C CLK+, CLK– REF COMP CONTROL LOGIC GND 131,072C 65,536C MSB 4C 2C C D+, D– DATA TRANSFER OUTPUT CODE C SW– LSB CNV+, CNV– GND IN– DCO+, DCO– LVDS INTERFACE CONVERSION CONTROL Figure 6. AD7960 simplified internal schematic. Analog Dialogue 47-10, October (2013) 3 The AD7960 series operates from 1.8-V and 5-V supplies, dissipating only 39 mW at 5 MSPS when converting in self-clocked mode. The power dissipation scales linearly with sample rate, as shown in Figure 7. 45 40 POWER (mW) 35 30 25 share a common clock. This also reduces power dissipation, which is especially useful in multiplexed applications. The self-clocked mode simplifies the interface with the host processor, allowing simple timing with a header that synchronizes the data from each conversion. A header is required to allow the digital host to acquire the data output because there is no clock output synchronous to the data. The echoed-clock mode provides robust timing at the expense of an extra differential pair. The AD7960 achieves over 120-dB typical dynamic range at output data rates below 20 kSPS, as shown in Figure 8. 125 20 19.5 120 15 DYNAMIC RANGE (dB) 10 5 0 0 1 2 3 4 5 THROUGHPUT RATE (MSPS) Figure 7. AD7960 power consumption vs. throughput rate. The power dissipation at very slow sample rates is dominated by the LVDS static power. The AD7960 is twice as fast, dissipates 70% less power, and occupies a 50% smaller footprint than the industry’s next fastest 18-bit SAR ADC. The AD7960 allows three external reference options: 2.048 V, 4.096 V, and 5 V. An on-chip buffer doubles the 2.048-V reference voltage, so the conversions are referred to 4.096 V or 5 V. The digital interface uses low-voltage differential signaling (LVDS), offering self-clocked and echoed-clock modes to enable high-speed data transfer (up to 300 MHz) between the ADC and the host processor. The LVDS interface reduces the number of 10 log( digital signals and eases signal routing, as multiple devices can Table 1. AD7960 ADC Driver Selection Benchmark ADC Driver Specifications Bandwidth (f–3dB_amp) Slew Rate Settling Time SNR 115 110 105 5000 100 95 N ln 2 π t acq 90 16 64 256 1024 4096 OUTPUT DATA RATE (kHz) Figure 8. AD7960 dynamic range vs. output data rate. ADC Driver The acquisition time of the ADC determines the settling time requirements for the ADC driver. Table 1 shows some specifications that must be considered when selecting an ADC 2 driver. As always, the signal chain performance should be verified Vrms _ in ) on the bench to π ensure that the desired performance is achievable. (2(en _ amp ) 2 × f −3dB _ ADC × 2 )2 GeneralNFormula ln 2 Nπlnt acq 2 π t acq Single- ended input voltage 0.5t acq From data sheet 2 Vrms _ in 10 log( ) 2 V2rms _ in 10 log( (2(en _ amp ) × f −3dB _ ADC × π ) 2) π2 (2(en _ amp ) 2 × f −3dB _ ADC × ) 2 2 2 Minimum Requirements 40 MHz 100 V/µs 100 ns 105.5 dB Notes: N = 18, tacq = 100 ns, Vrms_in2 = 52/2 = 12.5 V , en_amp = 2 nV/√Hz, f–3dB_ ADC = 28 MHz. Single- ended input voltage Single- ended 0.5input t acq voltage 0.5t acq 4 Analog Dialogue 47-10, October (2013) The op amp’s data sheet usually provides the settling time specification as a combination of the time for linear settling and slewing; the formulas given are first-order approximations assuming 50% for linear settling and 50% for slewing (multiplexed application) using a 5-V single-ended input. The ADA4899-1 rail-to-rail amplifier features 600-MHz bandwidth, –117-dBc distortion @ 1 MHz, and 1-nV/√Hz noise, as shown in Figure 9. It settles to 0.1% within 50 ns when configured as a unity-gain buffer driving the inputs of the AD7960 with a 5-V differential signal. VOLTAGE NOISE (nV/ Hz) 10 features high precision (±0.02% max initial error), low drift (2 ppm/°C max), low noise (1 µV p-p), and low power (950 µA max). A second AD8031 buffers the ADC’s 2.5-V common-mode output voltage. Its low output impedance maintains a stable reference voltage independent of the ADC input voltage to minimize INL. Stable for large capacitive loads, the AD8031 can drive the decoupling capacitors required to minimize spikes caused by transient currents. It is ideal for a wide range of applications, from wideband battery-operated systems to high-speed, high-density systems that demand low power dissipation. Conclusion A high-precision, low-power signal chain using ADI’s proprietary technology offers unprecedented speed, noise, and linearity, solving the difficult challenges of high-performance multiplexed and oversampled data-acquisition systems used for DXR and MRI gradient control. The high-performance signal chain components are available in small footprint packages, saving space and reducing cost in multichannel applications. 1 Author 0.1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 9. ADA4899 noise spectral density. Reference and Buffers The low-noise, low-power AD8031 rail-to-rail amplifier buffers the 5-V output from the ADR4550 voltage reference, which Analog Dialogue 47-10, October (2013) Maithil Pachchigar [[email protected]] is an applications engineer in ADI’s Precision Converters business unit in Wilmington, MA. He joined ADI in 2010 and supports the precision ADC product portfolio and customers in the industrial, instrumentation, medical, and energy segments. Having worked in the semiconductor industry since 2005, Maithil has published several technical articles. He received an MSEE from San Jose State University in 2006 and an MBA from Silicon Valley University in 2010. 5