2-Phase Stepper-Motor Driver
TLE 4728 G
Bipolar-IC
Overview
Features
• 2 × 0.7 amp. full bridge outputs
• Integrated driver, control logic and current control
(chopper)
• Fast free-wheeling diodes
• Max. supply voltage 45 V
• Output stages are free of crossover current
• Offset-phase turn-ON of output stages
• All outputs short-circuit proof
• Error-flag for overload, open load, overtemperature
• SMD package P-DSO-24-3
Type
Ordering Code
Package
TLE 4728 G
Q67006-A9077
P-DSO-24-9
Description
TLE 4728 G is a bipolar, monolithic IC for driving bipolar stepper motors, DC motors and
other inductive loads that operate by constant current. The control logic and power
output stages for two bipolar windings are integrated on a single chip which permits
switched current control of motors with 0.7 A per phase at operating voltages up to 16 V.
The direction and value of current are programmable for each phase via separate control
inputs. A common oscillator generates the timing for the current control and turn-on with
phase offset of the two output stages. The two output stages in full-bridge configuration
include fast integrated free wheeling diodes and are free of crossover current. The
device can be driven directly by a microprocessor in several modes by programming
phase direction and current control of each bridge independently.
With the two error outputs the TLE 4728 G signals malfunction of the device. Setting the
control inputs high resets the error flag and by reactivating the bridges one by one the
location of the error can be found.
Data Sheet
1
2004-03-01
TLE 4728 G
TLE 4728 G
Ι 10
Ι 11
Phase 1
OSC
GND
GND
GND
GND
Q11
R1
+ VS
Q12
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Ι 20
Ι 21
Phase 2
Error 1
GND
GND
GND
GND
Q21
R2
Error 2
Q22
IEP01211
Figure 1
Data Sheet
Pin Configuration (top view)
2
2004-03-01
TLE 4728 G
Pin Definitions and Functions
Pin No.
Function
1, 2, 23, 24
Digital control inputs IX0, IX1 for the magnitude of the current of the
particular phase.
Iset = 450 mA with Rsense = 1 Ω
IX1 IX0
Phase Current
Example of Motor
Status
H
H
0
No current1)
H
L
0.155 × Iset
Hold
L
H
Iset
Normal mode
L
L
1.55 × Iset
Accelerate
1)
3
“No current” in both bridges inhibits the circuit and current consumption will sink
below 3 mA
Input phase 1; controls the current through phase winding 1. On
H-potential the phase current flows from Q11 to Q12, on L-potential in
the reverse direction.
5 ... 8, 17 ... 20 Ground; all pins are connected at leadframe internally.
4
Oscillator; works at approx. 25 kHz if this pin is wired to ground across
2.2 nF.
10
Resistor R1 for sensing the current in phase 1.
9, 12
Push-pull outputs Q11, Q12 for phase 1 with integrated free-wheeling
diodes.
11
Supply voltage; block to ground, as close as possible to the IC, with a
stable electrolytic capacitor of at least 47 µF in parallel with a ceramic
capacitor of 100 nF.
14
Error 2 output; signals with “low” the errors: short circuit to ground of
one or more outputs or overtemperature.
13, 16
Push-pull outputs Q22, Q21 for phase 2 with integrated free-wheeling
diodes.
15
Resistor R2 for sensing the current in phase 2.
Data Sheet
3
2004-03-01
TLE 4728 G
Pin Definitions and Functions (cont’d)
Pin No.
Function
21
Error 1 output; signals with “low” the errors: open load or short circuit
to + VS of one or more outputs or short circuit of the load or
overtemperature.
22
Input phase 2; controls the current flow through phase winding 2. On
H-potential the phase current flows from Q21 to Q22, on L-potential in
the reverse direction.
Figure 2
Data Sheet
Block Diagram
4
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TLE 4728 G
Absolute Maximum Ratings
Tj = – 40 to 150 °C
Parameter
Supply voltage
Error outputs
Output current
Ground current
Logic inputs
Oscillator voltage
R1, R2 input voltage
Junction temperature
Storage temperature
Symbol
Limit Values
VS
VErr
IErr
IQ
IGND
VIXX
VOSC
VRX
Tj
Tj
Tstg
Thermal resistances
Junction-ambient
Rth ja
Junction-ambient
Rth ja
(soldered on a 35 µm thick
20 cm2 PC board copper
area)
Junction-case
Rth jc
Unit Remarks
min.
max.
– 0.3
45
V
–
– 0.3
–
45
3
V
mA
–
–
–1
1
A
–
–2
–
A
–
– 15
15
V
IXX; Phase 1, 2
– 0.3
6
V
–
– 0.3
5
V
–
–
–
125
150
°C
°C
–
Max. 10,000 h
– 50
125
°C
–
–
–
75
50
K/W –
K/W –
–
15
K/W Measured on pin 5
Note: Stresses above those listed here may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Data Sheet
5
2004-03-01
TLE 4728 G
Operating Range
Parameter
Symbol
Supply voltage
Case temperature
Output current
Logic inputs
Error outputs
Limit Values
Unit Remarks
min.
max.
VS
TC
5
16
V
–
– 40
110
°C
Measured on pin 5
Pdiss = 2 W
IQ
VIXX
VErr
IErr
– 800
800
mA
–
–5
6
V
IXX; Phase 1, 2
–
0
25
1
V
mA
–
–
Note: In the operating range, the functions given in the circuit description are fulfilled.
For details see next four pages.
These parameters are not 100% tested in production, but guaranteed by design.
Characteristics
VS = 6 to 16 V; Tj = – 40 to 130 °C
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
IS
IS
0.8
20
1.7
30
2.7
50
mA
mA
IXX = H
IXX = L;
IQ1, 2 = 0 A
IOSC
VOSCL
VOSCH
fOSC
90
0.8
1.7
18
120
1.3
2.3
24
135
1.9
2.9
30
µA
V
V
kHz
–
–
–
Current Consumption
From + VS
From + VS
Oscillator
Output charging current
Charging threshold
Discharging threshold
Frequency
Data Sheet
6
COSC = 2.2 nF
2004-03-01
TLE 4728 G
Characteristics (cont’d)
VS = 6 to 16 V; Tj = – 40 to 130 °C
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
IQ
–2
0
2
mA
IX0 = H; IX1 = H
Vch
Vcs
Vca
40
410
630
70
450
700
100
510
800
mV
mV
mV
IX0 = L; IX1 = H
IX0 = H; IX1 = L
IX0 = L; IX1 = L
VI
VIHy
IIL
IIL
IIH
1.2
–
– 10
– 100
–1
1.7
50
–1
– 20
0
2.2
–
1
–5
10
V
mV
µA
µA
µA
–
–
VI = 1.2 V
VI = 0 V
VI = 5 V
VErrSat
IErrL
50
–
200
–
500
10
mV
µA
IErr = 1 mA
VErr = 25 V
Tjsd
Tjpa
∆Tj
140
120
10
150
130
20
160
140
30
°C
°C
K
IQ1, 2 = 0 A
VErr = L
∆Tj = Tjsd – Tjpa
Phase Current (VS = 9 … 16 V)
Mode “no current”
Voltage threshold of current
Comparator at Rsense in mode:
Hold
Setpoint
Accelerate
Logic Inputs (IX1; IX0; Phase X)
Threshold
Hysteresis
L-input current
L-input current
H-input current
Error Outputs
Saturation voltage
Leakage current
Thermal Protection
Shutdown
Prealarm
Delta
Data Sheet
7
2004-03-01
TLE 4728 G
Characteristics (cont’d)
VS = 6 to 16 V; Tj = – 40 to 130 °C
Parameter
Symbol
Limit Values
min.
Unit Test Condition
typ.
max.
0.3
0.5
1000
0.9
1
0.5
0.8
1500
1.2
1.3
V
V
µA
V
V
IQ = – 0.45 A
IQ = – 0.7 A
VS = VQ = 40 V
IQ = 0.45 A
IQ = 0.7 A
IQ = 0.45 A;
Power Outputs
Diode Transistor Sink Pair
(D13, T13; D14, T14; D23, T23; D24, T24)
Saturation voltage
Saturation voltage
Reverse current
Forward voltage
Forward voltage
VsatI
VsatI
IRI
VFI
VFI
0.1
0.2
500
0.6
0.7
Diode Transistor Source Pair
(T11, D11; T12, D12; T21, D21; T22, D22)
Saturation voltage
Saturation voltage
VsatuC
VsatuD
0.6
0.1
1
0.3
1.2
0.6
V
V
Saturation voltage
Saturation voltage
VsatuC
VsatuD
0.7
0.2
1.2
0.5
1.5
0.8
V
V
Reverse current
Forward voltage
Forward voltage
Diode leakage current
IRu
VFu
VFu
ISL
400
0.7
0.8
0
800
1
1.1
3
1200
1.3
1.4
10
µA
V
V
mA
tPI
tIP
tPEsc
tPEol
tIEsc
tRP
tRI
–
–
–
–
–
–
–
5
12
45
15
30
3
1
15
–
80
30
60
10
5
µs
µs
µs
µs
µs
µs
µs
charge
IQ = 0.45 A;
discharge
IQ = 0.7 A; charge
IQ = 0.7 A;
discharge
VS = 40 V,
VQ = 0 V
IQ = – 0.45 A
IQ = – 0.7 A
IF = – 0.7 A
Error Output Timing
Time Phase X to IXX
Time IXX to Phase X
Delay Phase X to Error 2
Delay Phase X to Error 1
Delay IXX to Error 2
Reset delay after Phase X
Reset delay after IXX
Data Sheet
8
–
–
–
–
–
–
–
2004-03-01
TLE 4728 G
Diagrams
Timing between IXX and Phase X to prevent setting the error flag
Operating conditions:
+ VS = 14 V, Tj = 25 °C, Ierr = 1 mA, load = 3.3 mH, 1 Ω
a) If tPI < typ. 5 µs, an error “open load” will be set.
Ι XX
Phase X
t PI
IET01888
Figure 3
b) If tIP < typ. 12 µs, an error “open load” will be set.
Ι XX
Phase X
t IP
IET01889
Figure 4
Data Sheet
9
2004-03-01
TLE 4728 G
This time strongly depends on + VS and inductivity of the load, see diagram below.
Time tIP versus Load Inductivity
Propagation Delay of the Error Flag
Operating conditions:
+ VS = 14 V, Tj = 25 °C, Ierr = 1 mA, load = 3.3 mH, 1 Ω
a) IXX = L, error condition: short circuit to GND.
Phase X
Error 2
t PEsc
IET01883
typ. tPEsc: 45 µs
Figure 5
Data Sheet
10
2004-03-01
TLE 4728 G
b) IXX = L, error condition: open load (equivalent: short circuit to + VS).
Phase X
Error 1
t PEol
IET01884
typ. tPEol: 15 µs
Figure 6
c) Phase X = H or L, const.; error condition: short circuit to GND.
Ι XX
Error 2
t IEsc
IET01885
typ. tIEsc: 30 µs
tIEsc is also measured under the condition: begin of short circuit to GND till
error flag set.
Figure 7
Data Sheet
11
2004-03-01
TLE 4728 G
d) IXX = L, reset of error flag when error condition is not true.
Phase x
Error X
t RP
IET01886
typ. tRP: 3 µs
Figure 8
e) Phase X = H or L, const.; reset of error flag when error condition is not true.
Ι XX
Error X
t RI
IET01887
typ. tRI: 1 µs
Figure 9
Data Sheet
12
2004-03-01
TLE 4728 G
Quiescent Current IS versus Supply Voltage
VS; bridges not chopping; Tj = 25 °C
IED01827
60
ΙS
Quiesc. Current IS versus Junct. Temp. Tj;
bridges not chopping, VS = 14 V
mA
Ι QX =
50
0.70 A
ΙS
Ι QX = 0.70 A
mA
50
0.50 A
0.45 A
40
IED01828
60
40
0.07 A
0.07 A
30
30
20
20
10
10
0
5
10
15
V
0
-50
20
0
50
VS
150
Tj
Oscillator Frequency fOsc versus
Junction Temperature Tj
Output Current IQX versus Junction
Temperature Tj
IED01829
30
C
IED01830
800
mA
700
kHz
f Osc
Ι QX
Ι X1 = H, Ι X0 = H
600
25
500
Ι X1 = H, Ι X0 = L
400
VS = 14 V
C OSC = 2.2 nF
300
20
V S = 14 V
R X = 1Ω
200
100
15
-50
Data Sheet
0
50
0
-50
100 C 150
Tj
13
0
50
100 C 150
Tj
2004-03-01
TLE 4728 G
Output Saturation Voltages Vsat
versus Output Current IQ
Forward Current IF of Free-Wheeling Diodes
versus Forward Voltages VF
IED01831
2.0
V sat
ΙF
V S = 14 V
T j = 25 C
V
A
V Fl
0.8
1.5
V Fu
T j = 25 ˚C
0.6
V satuC
1.0
IED01218
1.0
0.4
V satl
V satuD
0.5
0.2
0
0
0
0.2
0.4
0.6 A 0.8
0
0.5
1.0
V
ΙQ
VF
Typical Power Dissipation Ptot versus
Output Current IQ (non stepping)
Permissible Power Dissipation Ptot versus
Case Temp. TC (measured at pin 5)
IED01832
4
P tot
C OSC
TC
3
IED01833
16
P tot
L phase x = 10 mH
R phase x = 2 Ω
W
1.5
W
= 2.2 nF
= 25 C
12
10
both phases active
8
2
V S = 14 V
Tjmax =
150 C
6
120 C
4
1
2
0
0
0.2
0.4
0
-25
0.6 A 0.8
ΙQ
Data Sheet
14
0
25
75
125 C 175
TC
2004-03-01
TLE 4728 G
Input Characteristics of IXX, Phase X
i Ι xx
Output Leakage Current
IED01834
40
µA
20
IED01835
1.2
Ι xx
ΙR
mA
0.8
0
V S = 40 V
Phase X
-20
0.4
V S = 16 V
-40
Tj =
-60
0
40 C
25 C
150 C
-80
-0.4
-100
-120
-6
Data Sheet
-0.8
-4
-2
0
2
0
4 V 6
V Ι xx
15
10
20
30 V
VQ
40
2004-03-01
TLE 4728 G
+12 V
100 µF
100 nF
1
11
VS
Ι 10
2
Ι 11
3
Q11
Phase 1
21 Error 1
14 Error 2
Microcontroller
24
Q12
TLE 4728G
Q21
Ι 20
23
Q22
Ι 21
22
Phase 2
OSC
4
15
2.2 nF
12
16
M
13
Stepper
Motor
GND
5, 6, 7, 8,
17, 18, 19, 20
10
R1
1Ω
R2
1Ω
9
IES01223
Figure 10 Application Circuit
100 µF
VS
100 nF
ΙS
+V S
ΙΙ
Ι Err
VΙ
V satu
Ι XX, Phase X
V Fu
Ι Rl
TLE 4728 G
Output
Error X
Ι Ru
ΙQ
V satl
Osc
V Err
GND
Ι OSC
V OSC
R sense
Ι SL Ι GND
2.2 nF
V Fl
Ι Rsense
VC
1Ω
IES01836
Figure 11 Test Circuit
Data Sheet
16
2004-03-01
TLE 4728 G
Normal Mode
Accelerate Mode
Ι 10
Ι 11
Phase 1
H
L
t
H
L
t
H
L
t
i acc
i set
Ι Q1
t
i set
i acc
i acc
i set
Ι Q2
t
i set
i acc
Phase 2
Ι 20
Ι 21
t
H
L
t
H
L
t
H
L
IED01776
Figure 12 Full Step Operation
Data Sheet
17
2004-03-01
TLE 4728 G
Normal Mode
Accelerate Mode
Ι 10
H
L
Ι 11
H
L
Phase 1
H
L
t
t
t
i acc
i set
Ι Q1
t
- i set
- i acc
i acc
i set
Ι Q2
t
- i set
- i acc
Phase 2
Ι 20
Ι 21
H
L
t
H
L
t
H
L
t
IED01777
Figure 13 Half Step Operation
Data Sheet
18
2004-03-01
TLE 4728 G
V Osc
V Osc
V Osc
t
Ι Rsense 1
0
t
Ι Rsense 2
0
t
V Q12
+V S
V FU
V satl
V ca
0
t
V Q11
+V S
V satu D
V satu C
V Q22
+V S
0
V Q21
+VS
t
Ι Q1
i acc
Ι Q2
t
i acc
t
Operating conditions:
VS
= 14 V
L phase x = 10 mH
R phase x = 4 Ω
Phase = H
Ι XX = L
IED01778
Figure 14 Current Control in Chop-Mode
Data Sheet
19
2004-03-01
TLE 4728 G
V Osc
2.3 V
1.3 V
0V
Oscillator
High Imped.
Phase change-over
t
Phase 1 H
L
t
Ι Rsense 1
0
t
V Q11
+ VS
High
Impedance
t
V Q12
+ VS
High
Impedance
t
Ι set
fast current
decay
Ι Phase 1
slow current decay
t
T1
- Ι set
Operating conditions:
VS
= 14 V
L phase 1 = 1 mH
R phase 1 = 4 Ω
Ι 11 = H for t < T 1
Ι 11 = L for t > T 1
Ι 10 = Ι 2X = H
slow current decay
IED01779
Figure 15 Phase Reversal and Inhibit
Data Sheet
20
2004-03-01
TLE 4728 G
Calculation of Power Dissipation
The total power dissipation Ptot is made up of
saturation losses Psat
(transistor saturation voltage and diode forward
voltages),
quiescent losses Pq
(quiescent current times supply voltage) and
switching losses Ps
(turn-ON / turn-OFF operations).
The following equations give the power dissipation for chopper operation without phase
reversal. This is the worst case, because full current flows for the entire time and
switching losses occur in addition.
Ptot = 2 × Psat + Pq + 2 × Ps
where
Psat ≅ IN { VsatI × d + VFu (1 – d ) + VsatuC × d + VsatuD ( 1 – d ) }
Pq = Iq × VS
V i D × t DON ( i D + i R ) × t ON I N
P q ≅ ------S --------------------- + ---------------------------------- + ----- ( t DOFF + t OFF )
2
2
4
T
IN
Iq
iD
iR
tp
tON
tOFF
tDON
tDOFF
T
d
Vsatl
VsatuC
VsatuD
VFu
VS
= nominal current (mean value)
= quiescent current
= reverse current during turn-on delay
= peak reverse current
= conducting time of chopper transistor
= turn-ON time
= turn-OFF time
= turn-ON delay
= turn-OFF delay
= cycle duration
= duty cycle tp / T
= saturation voltage of sink transistor (TX3, TX4)
= saturation voltage of source transistor (TX1, TX2) during charge cycle
= saturation voltage of source transistor (TX1, TX2) during discharge cycle
= forward voltage of free-wheeling diode (DX1, DX2)
= supply voltage
Data Sheet
21
2004-03-01
TLE 4728 G
+VS
Tx2
Dx1
L
Tx1
Dx2
Tx4
Dx3
Tx3
Dx4
VC
R sense
IET01209
Figure 16
Voltage and
Current at
Chopper
Transistor
Turn-ON
Turn-OFF
iR
ΙN
iD
VS + VFu
VS + VFu
Vsatl
t D ON
t D OFF
t ON
tp
t OFF
t
IET01210
Figure 17 Voltage and Current on Chopper Transistor
Data Sheet
22
2004-03-01
TLE 4728 G
Application Hints
The TLE 4728 G is intended to drive both phases of a stepper motor. Special care has
been taken to provide high efficiency, robustness and to minimize external components.
Power Supply
The TLE 4728 G will work with supply voltages ranging from 5 V to 16 V at pin VS. Surges
exceeding 16 V at VS wont harm the circuit up to 45 V, but whole function is not
guaranteed. As soon as the voltage drops below approximately 16 V the TLE 4728 G
works promptly again.
As the circuit operates with chopper regulation of the current, interference generation
problems can arise in some applications. Therefore the power supply should be
decoupled by a 0.1 µF ceramic capacitor located near the package. Unstabilized
supplies may even afford higher capacities.
Current Sensing
The current in the windings of the stepper motor is sensed by the voltage drop across
Rsense. Depending on the selected current internal comparators will turn off the sink
transistor as soon as the voltage drop reaches certain thresholds (typical 0 V, 0.07 V,
0.45 V and 0.7 V). These thresholds are not affected by variations of VS. Consequently
unstabilized supplies will not affect the performance of the regulation. For precise current
level it must be considered, that internal bounding wire (typ. 60 mΩ) is a part of Rsense.
Due to chopper control fast current rises (up to 10 A/µs) will occur at the sensing
resistors. To prevent malfunction of the current sensing mechanism Rsense should be
pure ohmic. The resistors should be wired to GND as directly as possible. Capacitive
loads such as long cables (with high wire to wire capacity) to the motor should be
avoided for the same reason.
Synchronizing Several Choppers
In some applications synchrone chopping of several stepper motor drivers may be
desirable to reduce acoustic interference. This can be done by forcing the oscillator of
the TLE 4728 G by a pulse generator overdriving the oscillator loading currents
(approximately ± 120 µA). In these applications low level should be between 0 V and
0.8 V while high level should between 3 V and 5 V.
Optimizing Noise Immunity
Unused inputs should always be wired to proper voltage levels in order to obtain highest
possible noise immunity.
To prevent crossconduction of the output stages the TLE 4728 G uses a special break
before make timing of the power transistors. This timing circuit can be triggered by short
glitches (some hundred nanoseconds) at the phase inputs causing the output stage to
become high resistive during some microseconds. This will lead to a fast current decay
Data Sheet
23
2004-03-01
TLE 4728 G
during that time. To achieve maximum current accuracy such glitches at the phase
inputs should be avoided by proper control signals.
To lower EMI a ceramic capacitor of max. 3 nF is advisable from each output to GND.
Thermal Shut Down
To protect the circuit against thermal destruction, thermal shut down has been
implemented.
Error Monitoring
The error outputs signal corresponding to the logic table the errors described below.
Logic Table
Kind of Error
Error Output
Error 1
Error 2
a) No error
H
H
b) Short circuit to GND
H
L
c) Open load 1)
L
H
d) b) and c) simultaneously
H
L
e) Temperature pre-alarm
L
L
1)
Also possible: short circuit to + VS or short circuit of the load.
Overtemperature is implemented as pre-alarm; it appears approximately 20 K before
thermal shut down. To detect an open load, the recirculation of the inductive load is
watched. If there is no recirculation after a phase change-over, an internal error flipflop
is set. Because in most kinds of short circuits there won’t flow any current through the
motor, there will be no recirculation after a phase change-over, and the error flipflop for
open load will be set, too. Additionally an open load error is signaled after a phase
change-over during hold mode.
Only in the case of a short circuit to GND, the most probably kind of a short circuit in
automotive applications, the malfunction is signaled dominant (see d) in logic table) by a
separate error flag. Simultaneously the output current is disabled after 30 µs to prevent
disturbances.
A phase change-over or putting both current control inputs of the affected bridge on high
potential resets the error flipflop. Being a separate flipflop for every bridge, the error can
be located in easy way.
Data Sheet
24
2004-03-01
TLE 4728 G
Package Outlines
1.27
8˚ MAX.
7.6 -0.2 1)
+0.0
9
0.35 x 45˚
0.23
2.65 MAX.
2.45 -0.2
0.2 -0.1
P-DSO-24-9
(Plastic Dual Small Outline Package)
0.4 +0.8
0.1
0.35 +0.15 2)
0.2 24x
24
1
10.3 ±0.3
13
15.6 -0.4 1)
12
Index Marking
1)
2)
Does not include plastic or metal protrusion of 0.15 max. per side
Lead width can be 0.61 max. in dambar area
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device
Data Sheet
25
Dimensions in mm
2004-03-01