DN2470 DATA SHEET (10/07/2015) DOWNLOAD

DN2470
N-Channel, Depletion-Mode, Vertical DMOS FET
Features
Description
•
•
•
•
•
•
This low threshold, depletion-mode, normally-on, transistor utilizes an advanced vertical Diffusion Metal
Oxide Semiconductor (DMOS) structure and a well
proven silicon-gate manufacturing process. This combination produces a device with the power-handling
capabilities of bipolar transistors, plus the high-input
impedance and positive-temperature coefficient inherent in Metal-Oxide Semiconductor (MOS) devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary breakdown.
High-input impedance
Low-input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
•
•
•
•
•
•
•
Normally-on switches
Solid state relays
Converters
Linear amplifiers
Constant current sources
Battery operated systems
Telecom
 2015 Microchip Technology Inc.
Vertical DMOS Field-Effect Transistors (FETs) are ideally suited to a wide range of switching and amplifying
applications where a very low threshold voltage, high
breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
DS20005410A-page 1
DN2470
Package Type
DRAIN
SOURCE
GATE
TO-252 (D-PAK)
See Table 2-1 for pin information
DS20005410A-page 2
 2015 Microchip Technology Inc.
DN2470
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Drain-to-source voltage................................................................................................................................................................ BVDSX
Drain-to-gate voltage....................................................................................................................................................................BVDGX
Gate-to-source voltage................................................................................................................................................................... ±20V
Operating and storage temperature ............................................................................................................................. -55°C to +150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC AND AC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C
Parameter
Symbol
Min
Typ
Max
Units Conditions
DC Parameters (Note 1, unless otherwise stated)
Drain-to-source breakdown voltage
BVDSX
700
–
–
V
VGS = -5.0V, ID= 100µA
VGS(OFF)
-1.5
–
-3.5
V
VDS = 25V, ID= 10µA
∆VGS(OFF)
–
–
-4.5
IGSS
–
–
100
nA
VGS = ±20V, VDS= 0V
–
–
1.0
µA
VDS = BVDSX, VGS = -10V
–
–
1.0
mA
VDS = 0.8 BVDSX,
VGS = -10V, TA= 125°C ((Note 2)
IDSS
–
500
-
mA
VGS = 0V, VDS= 25V
RDS(ON)
–
–
42
Ω
VGS = 0V, ID= 100mA
∆RDS(ON)
–
–
1.1
%/°C
Forward transconductance
GFS
100
–
–
Input capacitance
CISS
–
–
540
Common source output capacitance
COSS
–
–
60
Reverse transfer capacitance
CRSS
–
–
25
Turn-on delay time
td(ON)
–
–
30
tr
–
–
45
td(OFF)
–
–
45
tf
–
–
60
VSD
–
–
trr
–
800
Gate-to-source off voltage
Change in VGS(OFF) with temperature
Gate body leakage current
Drain-to-source leakage current
Saturated drain-to-source current
Static drain-to-source on-state
resistance
Change in RDS(ON) with temperature
ID(OFF)
mV/°C VDS = 25V, ID= 10µA ((Note 2)
VGS= 0V, ID= 100mA (Note 2)
AC Parameters (Note 2)
Rise time
Turn-off delay time
Fall time
mmho VDS= 10V, ID= 100mA
pF
VGS= -10V, VDS= 25V,
f = 1.0 MHz
ns
VDD= 25V,
ID= 100mA,
RGEN= 25Ω,
1.8
V
VGS= -5.0V, ISD= 200mA (Note 1)
–
ns
VGS= -5.0V, ISD= 200mA (Note 2)
Diode Parameters
Diode forward voltage drop
Reverse recovery time
Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle.
2: Specification is obtained by characterization and is not 100% tested.
 2015 Microchip Technology Inc.
DS20005410A-page 3
DN2470
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C
Parameter
Symbol
Min
Typ
Max
Units Conditions
-55
–
150
°C
–
132
–
°C/W
Temperature Ranges
Operating and Storage temperature
Package Thermal Resistances
Thermal Resistance, TO-252 (D-PAK)
TABLE 1-1:
θja
THERMAL CHARACTERISTICS
Package
ID1
continuous
(mA)
ID
pulsed
(mA)
Power
Dissipation
@TA = 25°C (W)
IDR1
(mA)
IDRM
(mA)
TO-252 (D-PAK)
170
500
2.52
170
500
1.
2.
2.0
ID continuous is limited by max rated Tj
Mounted on FR4 board, 25mm x 25mm x 1.57 mm
PIN DESCRIPTION
The locations of the pins are listed in Package Type.
TABLE 2-1:
PIN DESCRIPTION
DS20005410A-page 4
Pin # TO-252
Function
1
GATE
3
SOURCE
2,4
DRAIN
 2015 Microchip Technology Inc.
DN2470
3.0
APPLICATION INFORMATION
Figure 3-1 shows the switching waveform and test circuit for DN2450.
0V
VDD
90%
INPUT
-10V
Pulse
Generator
10%
t(ON)
td(ON)
VDD
t(OFF)
tr
td(OFF)
0V
RGEN
10%
90%
FIGURE 3-1:
OUTPUT
tf
10%
OUTPUT
RL
INPUT
D.U.T.
90%
Switching Waveforms and Test Circuit
Product Summary
BVDSX/BVDGX
(V)
RDS(ON)
(max) (Ω)
IDSS
(typ) (mA)
700
42
500
 2015 Microchip Technology Inc.
DS20005410A-page 5
DN2470
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
TO-252 (D-PAK)
Example
XXXX
XXXXX e3
YYWWNNN
DN
2470 e3
1517343
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005410A-page 6
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
 2015 Microchip Technology Inc.
DN2470
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
 2015 Microchip Technology Inc.
DS20005410A-page 7
DN2470
APPENDIX A:
REVISION HISTORY
Revision A (October 2015)
• Updated file to new format. Released data sheet
in the Microchip system.
DS20005410A-page 8
 2015 Microchip Technology Inc.
DN2470
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
-
XX
X
-
Package Environmental
Options
X
Media
Type
Device:
DN2470 = N-Channel, Depletion-Mode,
vertical DMOS FET
Package:
K4
= TO-252 (D-PAK)
Environmental
G
= Lead (Pb)-free/ROHS-compliant package
Media Type:
(blank)
= 2000/Reel
 2015 Microchip Technology Inc.
Examples:
a)
DN2470K4-G
TO-252 package,
2000/reel
DS20005410A-page 9
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
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•
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•
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Information contained in this publication regarding device
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Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
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The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
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ViewSpan, WiperLock, Wireless DNA, and ZENA are
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SQTP is a service mark of Microchip Technology Incorporated
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Silicon Storage Technology is a registered trademark of
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GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-63277-870-3
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CERTIFIEDBYDNV
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DS20005410A-page 10
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DS20005410A-page 11
 2015 Microchip Technology Inc.
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