TC6215 N- and P-Channel Enhancement-Mode Dual MOSFET Features ► ► ► ► ► ► ► ► ► ► Back to back gate-source Zener diodes Guaranteed RDS(ON) at 4.0V gate drive Low threshold Low on-resistance Independent N- and P-channels Electrically isolated N- and P-channels Low input capacitance Fast switching speeds Free from secondary breakdowns Low input and output leakage Applications ► ► ► ► ► ► High voltage pulsers Amplifiers Buffers Piezoelectric transducer drivers General purpose line drivers Logic level interfaces General Description The Supertex TC6215 consists of high voltage, low threshold N-channel and P-channel MOSFETs in an 8-Lead SOIC (TG) package. Both MOSFETs have integrated back to back gate-source Zener diode clamps and guaranteed RDS(ON) ratings down to 4.0V gate drive allowing them to be driven directly with standard 5.0V CMOS logic. These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven silicongate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Package Option Device TC6215 BVDSS/BVDGS 8-Lead SOIC RDS(ON) (Max) 4.90x3.90mm body 1.75mm height (max) 1.27mm pitch N-Channel P-Channel N-Channel P-Channel (V) (V) (Ω) (Ω) TC6215TG-G 150 -150 4.0 7.0 -G indicates package is RoHS compliant (‘Green’) Absolute Maximum Ratings Pin Configuration Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature Soldering temperature* 300°C Distance of 1.6mm from case for 10 seconds. DP SN SP GN GP 8-Lead SOIC (TG) -55°C to + 150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * DP DN DN (top view) Product Marking YYWW C6215 LLLL YY = Year Sealed WW = Week Sealed L = Lot Number = “Green” Packaging Package may or may not include the following marks: Si or 8-Lead SOIC (TG) ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com TC6215 N-Channel Electrical Characteristics (T = 25°C unless otherwise specified) A Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage 150 - - V VGS = 0V, ID = 1.0mA VGS(th) Gate threshold voltage 1.0 - 2.0 V VGS = VDS, ID =1.0mA - - -4.5 mV/OC VGS = VDS, ID = 1.0mA ±14 - ±25 V IGS = ±1.0mA - - 5.0 µA VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125°C - 2.0 - - 3.8 - - - 4.0 - - 5.0 - - 4.0 - - 1.0 %/OC VGS = 5.0V, ID = 2.0A 560 - - mmho VDS = 10V, ID = 0.5A ΔVGS(th) Change in VGS(th) with temperature VZGS Gate-source back to back Zener voltage IDSS Zero gate voltage drain current ID(ON) On-state drain current RDS(ON) Static drain-to-source on-state resistance ΔRDS(ON) Change in RDS(ON) with temperature GFS Forward transconductance CISS Input capacitance - 120 - COSS Common source output capacitance - 33 - CRSS Reverse transfer capacitance - 11 - td(ON) Turn-on delay time - 2.5 - Rise time - 2.3 - Turn-off delay time - 17.2 - Fall time - 11.3 - Diode forward voltage drop - - Reverse recovery time - 90 tr td(OFF) tf VSD trr A Conditions VGS = 4.5V, VDS = 25V VGS = 10V, VDS = 25V VGS = 4.0V, ID = 0.5A Ω VGS = 5.0V, ID = 2.0A VGS = 10V, ID = 2.0A pF VGS = 0V, VDS = 25V, f = 1.0MHz ns VDD = 25V, ID = 1.0A, RGEN = 25Ω 1.4 V VGS = 0V, ISD = 0.5A - ns VGS = 0V, ISD = 0.5A Notes: 1. All DC parameters 100% tested at 25°C unless otherwise stated. (Pulsed test: 300µs pulse at 2% duty cycle.) 2. All AC parameters sample tested. N-Channel Switching Waveforms and Test Circuit 10V RL 90% Input 0V Pulse Generator 10% t(ON) td(ON) VDD t(OFF) tr 10% td(OFF) VDD RGEN tf 10% OUTPUT D.U.T. Input Output 0V 90% 90% ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 2 TC6215 P-Channel Electrical Characteristics (T = 25°C unless otherwise specified) A Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage -150 - - V VGS = 0V, ID = -1.0mA VGS(th) Gate threshold voltage -1.0 - -2.0 V VGS = VDS, ID =-1.0mA - - 4.5 mV/OC VGS = VDS, ID = -1.0mA ±14 - ±25 V IGS = ±1.0mA - - -5.0 µA VGS = 0V, VDS = Max Rating - - -1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125°C - -1.5 - - -3.0 - - - 7.5 - - 9.0 - - 7.0 - - 1.0 %/OC VGS = -5.0V, ID = -0.25A 290 - - mmho VDS = -10V, ID = -0.25A ΔVGS(th) Change in VGS(th) with temperature VZGS Gate-source back to back Zener voltage IDSS Zero gate voltage drain current ID(ON) On-state drain current RDS(ON) Static drain-to-source on-state resistance ΔRDS(ON) Change in RDS(ON) with temperature GFS Forward transconductance CISS Input capacitance - 127 - COSS Common source output capacitance - 29 - CRSS Reverse transfer capacitance - 9.0 - td(ON) Turn-on delay time - 2.4 - Rise time - 2.3 - Turn-off delay time - 16.2 - Fall time - 11.1 - Diode forward voltage drop - - Reverse recovery time - 80 tr td(OFF) tf VSD trr A Conditions VGS = -4.5V, VDS = -25V VGS = -10V, VDS = -25V VGS = -4.0V, ID = -0.25A Ω VGS = -5.0V, ID = -1.0A VGS = -10V, ID = -2.0A pF VGS = 0V, VDS = -25V, f = 1.0MHz ns VDD = -25V, ID = -1.0A, RGEN = 25Ω -1.4 V VGS = 0V, ISD = -0.25A - ns VGS = 0V, ISD = -0.25A Notes: 1. All DC parameters 100% tested at 25°C unless otherwise stated. (Pulsed test: 300µs pulse at 2% duty cycle.) 2. All AC parameters sample tested. P-Channel Switching Waveforms and Test Circuit 0V Pulse Generator 10% Input -10V t(ON ) td(ON) 0V Output VDD RGEN 90% D.U.T. t(OFF) tr td(OFF) 90% 10% tf Input OUTPUT 90% 10% RL VDD ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 3 TC6215 Block Diagram SN 1 8 DN GN 2 7 DN N-Channel 6 DP 3 SP GP 4 5 DP P-Channel 8-Lead SOIC (top view) Typical Performance Curves N-Channel Output Characteristics 4.5 P-Channel Output Characteristics -4.0 VGS =-8V -3.5 VGS =10V 4.0 VGS=-10V VGS =8V VGS =7V 3.5 VGS=-7V VGS =6V -3.0 3.0 ID (amperes) VGS=-6V ID (amperes) -2.5 VGS=-5V -2.0 -1.5 2.5 VGS =5V 2.0 VGS =4V 1.5 VGS=-4V -1.0 1.0 VGS =3V VGS=-3V 0.5 -0.5 VGS=-2V 0.0 0 -5 -10 -15 -20 -25 -30 -35 -40 0 -50 -45 VGS =2V 0.0 5 10 15 20 VDS (volts) 25 30 35 40 45 50 VDS (volts) P-Channel Saturation Characteristics N-Channel Saturation Characteristics 4.0 -2.2 VGS=-10V VGS=-8V -2.0 -1.8 VGS=10V 3.5 VGS=-6V VGS=-5V VGS=8V VGS=6V 3.0 ID (amperes) -1.4 VGS=-4V -1.2 -1.0 -0.8 VGS=-3V -0.6 ID (amperes) -1.6 2.5 VGS=5V 2.0 VGS=4V 1.5 1.0 VGS=3V -0.4 0.5 -0.2 VGS=-2V VGS=2V 0.0 0.0 0 -1 -2 -3 -4 -5 VDS (volts) -6 -7 -8 -9 -10 0 1 2 3 4 5 6 7 8 VDS (volts) ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 4 9 10 TC6215 8-Lead SOIC (Narrow Body) Package Outline (TG) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch D θ1 8 E E1 L2 Note 1 (Index Area D/2 x E1/2) L 1 θ L1 Top View Gauge Plane Seating Plane View B A View B Note 1 h h A A2 Seating Plane b e A1 A Side View View A-A Note: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 A2 b MIN 1.35* 0.10 1.25 0.31 NOM - - - - MAX 1.75 0.25 1.65* 0.51 D E E1 4.80* 5.80* 3.80* 4.90 6.00 3.90 5.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 1.04 REF L2 0.25 BSC θ θ1 0O 5O - - 8O 15O JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005. * This dimension is not specified in the original JEDEC drawing. The value listed is for reference only. Drawings are not to scale. Supertex Doc. #: DSPD-8SOLGTG, Version H101708. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com. ©2008 All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TC6215 A122208 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 5