Obsolete Device TC826 Analog-to-Digital Converter with Bar Graph Display Output Features General Description • • • • • • • • • • • • In many applications, a graphical display is preferred over a digital display. Knowing a process or system operates, for example, within design limits is more valuable than a direct system variable read out. A bar or moving dot display supplies information precisely without requiring further interpretation by the viewer. • • • • Bipolar A/D Conversion 2.5% Resolution Direct LCD Display Drive ‘Thermometer’ BAR or DOT Display 40 Data Segments Plus Zero Over Range Plus Polarity Indication Precision On-Chip Reference: 35ppm/°C Differential Analog Input Low Input Leakage: 10pA Display Flashes on Over Range Display HOLD Mode Auto-Zero Cycle Eliminates Zero Adjust Potentiometer 9V Battery Operation Low Power Consumption: 1.1mW 20mV to 2.0V Full Scale Operation Non-Multiplexed LCD Drive for Maximum Viewing Angle Device Selection Table Part Number Package Temperature Range TC826CBU 64-Pin PQFP 0°C to +70°C The TC826 is a complete analog-to-digital converter with direct liquid crystal (LCD) display drive. The 40 LCD data segments plus zero driver give a 2.5% resolution bar display. Full scale differential input voltage range extends from 20mV to 2V. The TC826 sensitivity is 500μV. A low drift 35ppm/°C internal reference, LCD backplane oscillator and driver, input polarity LCD driver, and over range LCD driver make designs simple and low cost. The CMOS design required only 125µA from a 9V battery. In +5V systems, a TC7660 DC to DC converter can supply the -5V supply. The differential analog input leakage is a low 10pA. Two display formats are possible. The BAR mode display is like a ‘thermometer’ scale. The LCD segment driver that equals the input, plus all below it are on. The DOT mode activates only the segment equal to the input. In either mode, the polarity signal is active for negative input signals. An over range input signal causes the display to flash and activates the over range annunciator. A HOLD mode can be selected that freezes the display and prevents updating. The dual slope integrating conversion method with auto-zero phase maximizes noise immunity and eliminates zero scale adjustment potentiometers. Zero scale drift is a low 5μV/°C. Conversion rate is typically 5 per second and is adjustable by a single external resistor. A compact, 0.5" square, flat package minimizes PC board area. The high pin count LSI package makes multiplexed LCD displays unnecessary. Low cost, direct drive LCD displays offer the widest viewing angle and are readily available. A standard display is available now for TC826 prototyping work. © 2005 Microchip Technology Inc. DS21477C-page 1 TC826 Package Type OR BAR 40 BAR 39 BAR 38 BAR 37 BAR 36 60 59 58 57 56 55 54 BAR 31 POL- 61 BAR 32 BAR/DOT 62 BAR 33 HOLD 63 BAR 35 TEST 64 BAR 34 NC 64-Pin PQFP 53 52 51 50 49 NC 1 48 NC ANALOG COMMON 2 47 BAR 30 +IN 3 46 BAR 29 -IN 4 45 BAR 28 REF IN 5 44 BAR 27 CREF+ 6 43 BAR 26 CREF- 7 42 BAR 25 VDD 8 41 BAR 24 VBUF 9 40 BAR 23 CAZ 10 39 BAR 22 VINT 11 38 BAR 21 VSS 12 37 BAR 20 OSC1 13 36 BAR 19 OSC2 14 35 BAR 18 BP 15 34 BAR 17 BAR 0 16 33 BAR 16 24 25 NC BAR 2 BAR 3 BAR 4 BAR 5 BAR 6 BAR 7 BAR 8 26 27 28 29 30 31 32 BAR 15 23 BAR 14 22 BAR 13 21 BAR 12 20 BAR 11 19 BAR 9 18 BAR 10 17 BAR 1 TC826CBU Typical Application CINT RINT 1MΩ 61 1MΩ 62 CAZ 9 VBUF 10 CAZ 11 VINT CREF+ BAR/DOT 6 CREF 1.0mf CREF- 7 OSC1 13 HOLD ROSC 430kΩ TC826 63 12 OSC2 14 TEST BP VSS OR REF ANALOG BAR 0IN COMMON -IN +IN BAR 40 POL- VDD 8 5 R1 9V 2 4 3 R2 -IN +IN 2V Full Scale 200mV Full Scale 20mV Full Scale RINT 2MΩ 20kΩ 20kΩ 0.033mf Component DS21477C-page 2 CINT 0.033mf 0.033mf CREF 1mf 1mf 1mf CAZ 0.068mf 0.068mf 0.014mf 15 59 60 Segment Drive 1MΩ Backplane 41 Segment LCD Bar Graph – OR R1 + R2 = 250kΩ © 2005 Microchip Technology Inc. TC826 1.0 ELECTRICAL CHARACTERISTICS *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings* Supply Voltage (V+ to V-)....................................... 15V Analog Input Voltage (Either Input) (Note 1)... V+ to VPower Dissipation (TA ≤ 70°C) 64-Pin Plastic Flat Package ............................... 1.14W Operating Temperature Range: Commercial Package (C) ........................ 0°C to +70°C Storage Temperature Range.............. -65°C to +150°C TC826 ELECTRICAL SPECIFICATIONS Electrical Characteristics: VS = 9V; ROSC = 430kΩ; TA = 25°C; Full Scale = 20mV, unless otherwise stated. Symbol Parameter Min Typ Max Unit Zero Input -0 ±0 +0 Display Zero Reading Drift — 0.2 1 μV/°C Test Conditions VIN = 0.0V VIN = 0.0V 0°C ≤ TA ≤ +70°C NL Linearity Error -1 0.5 +1 Count Max Deviation from Best Straight Line R/O Rollover Error -1 0 +1 Count -VIN = +VIN EN Noise — 60 — μVP-P VIN = 0V ILK Input Leakage Current — 10 20 pA VIN = 0V CMRR Common Mode Rejection Ratio — 50 — μV/V Scale Factor Temperature Coefficient — 1 — ppm/°C 0 ≤ TA ≤ 7 +0°C External Ref. Temperature Coefficient = 0ppm/°C VCTC Analog Common Temperature Coefficient — 35 100 ppm/°C 250kΩ between Common and V+, 0°C ≤ TA ≤ +70°C VCOM Analog Common Voltage 2.7 2.9 3.35 V VSD LCD Segment Drive Voltage 4 5 6 VP-P VBD LCD Backplane Drive Voltage 4 5 6 VP-P IDD Power Supply Current — 125 175 μA VCM = ±1V VIN = 0V 250kΩ between Common and VDD Note 1: Input voltages may exceed the supply voltages when the input current is limited to 100μA. 2: Static sensitive device. Unused devices should be stored in conductive material to protect devices from static discharge and static fields. 3: Backplane drive is in phase with segment drive for ‘off’ segment and 180°C out of phase for ‘on’ segment. Frequency is 10 times conversion rate. 4: Logic input pins 58, 59, and 60 should be connected through 1MΩ series resistors to VSS for logic 0. © 2005 Microchip Technology Inc. DS21477C-page 3 TC826 2.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 2-1. TABLE 2-1: Pin Number (64-Pin PQFP) PIN FUNCTION TABLE Symbol Description 1 NC 2 ANALOG COMMON Positive analog signal input. 3 +IN Positive analog signal input. 4 -IN Negative analog signal input. 5 REF IN Reference voltage positive input. Measured relative to analog common. REF IN ≈ Full Scale/2. 6 CREF+ Reference capacitor connection. 7 CREF- Reference capacitor connection. 8 VDD Positive supply terminal. Establishes the internal analog ground point. Analog common is set to 2.9V below the positive supply COMMON by an internal zener reference circuit. The voltage difference between VDD and analog common can be used to supply the TC826 voltage reference input at REF IN (Pin 5). 9 VBUF Buffer output. Integration resistor connection. 10 CAZ Negative comparator input. Auto-zero capacitor connection. 11 VINT Integrator output. Integration capacitor connection. 12 VSS Negative supply terminal. 13 OSC1 Oscillator resistor (ROSC) connection. 14 OSC2 Oscillator resistor (ROSC) connection. 15 BP 16 BAR 0 LCD Backplane driver. LCD Segment driver: Bar 0. 17 NC 18 BAR 1 LCD Segment driver: Bar 1. 19 BAR 2 LCD Segment driver: Bar 2. 20 BAR 3 LCD Segment driver: Bar 3. 21 BAR 4 LCD Segment driver: Bar 4. 22 BAR 5 LCD Segment driver: Bar 5. 23 BAR 6 LCD Segment driver: Bar 6. 24 BAR 7 LCD Segment driver: Bar 7. 25 BAR 8 LCD Segment driver: Bar 8. 26 BAR 9 LCD Segment driver: Bar 9. 27 BAR 10 LCD Segment driver: Bar 10. 28 BAR 11 LCD Segment driver: Bar 11. 29 BAR 12 LCD Segment driver: Bar 12. 30 BAR 13 LCD Segment driver: Bar 13. 31 BAR 14 LCD Segment driver: Bar 14. 32 BAR 15 LCD Segment driver: Bar 15. 33 BAR 16 LCD Segment driver: Bar 16. 34 BAR 17 LCD Segment driver: Bar 17. 35 BAR 18 LCD Segment driver: Bar 18. 36 BAR 19 LCD Segment driver: Bar 19. 37 BAR 20 LCD Segment driver: Bar 20. 38 BAR 21 LCD Segment driver: Bar 21. 39 BAR 22 LCD Segment driver: Bar 22. 40 BAR 23 LCD Segment driver: Bar 23. DS21477C-page 4 No connection. © 2005 Microchip Technology Inc. TC826 TABLE 2-1: PIN FUNCTION TABLE (CONTINUED) Pin Number (64-Pin PQFP) Symbol 41 BAR 24 LCD Segment driver: Bar 24. 42 BAR 25 LCD Segment driver: Bar 25. 43 BAR 26 LCD Segment driver: Bar 26. 44 BAR 27 LCD Segment driver: Bar 27. 45 BAR 28 LCD Segment driver: Bar 28. 46 BAR 29 LCD Segment driver: Bar 29. 47 BAR 30 LCD Segment driver: Bar 30. 48 NC 49 BAR 31 LCD Segment driver: Bar 31. 50 BAR 32 LCD Segment driver: Bar 32. 51 BAR 33 LCD Segment driver: Bar 33. 52 BAR 34 LCD Segment driver: Bar 34. 53 BAR 35 LCD Segment driver: Bar 35. 54 BAR 36 LCD Segment driver: Bar 36. 55 BAR 37 LCD Segment driver: Bar 37. 56 BAR 38 LCD Segment driver: Bar 38. 57 BAR 39 LCD Segment driver: Bar 39. 58 BAR 40 LCD Segment driver: Bar 40. 59 OR 60 POL- 61 BAR/DOT 62 HOLD Input logic signal that prevents display from changing. Pulled high internally to inactive state. Connect to VSS through 1MΩ series resistor for HOLD mode operation. 63 TEST Input logic signal. Sets TC826 to BAR Display mode. BAR 0 to 40, plus OR flash on and off. The POL- LCD driver is on. Pulled high internally to inactive state. Connect to VSS with 1MΩ series resistor to activate. 64 NC © 2005 Microchip Technology Inc. Description No connection. LCD segment driver that indicated input out-of-range condition. LCD segment driver that indicates input signal is negative. Input logic signal that selects BAR or DOT display format. Normally in BAR mode. Connect to VSS through 1MΩ resistor for DOT format. No connection. DS21477C-page 5 TC826 3.0 DETAILED DESCRIPTION 3.1 Dual Slope Conversion Principles A simple mathematical equation relates the input signal reference voltage and integration time: EQUATION 3-1: The TC826 is a dual slope, integrating analog-to-digital converter. The conventional dual slope converter measurement cycle has two distinct phases: 1 RC • Input Signal Integration • Reference Voltage Integration (De-integration) ∫0 tINT V T VIN(t)dt = R RI RC Where: VR = Reference Voltage VSI = Signal Integration Time (Fixed) TRI = Reference Voltage Integration Time (Variable) The input signal being converted is integrated for a fixed time period (TSI). Time is measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (TRI) (Figure 3-1). In a simple dual slope converter, a complete conversion requires the integrator output to ‘ramp-up’ and ‘ramp-down’. FIGURE 3-1: BASIC DUAL SLOPE CONVERTER C Integrator R Analog Input Signal – – Comparator + + +/– Switch Driver VIN ≈ 1/2 VFULL SCALE Control Logic Clock Counter VIN ≈ 1/4 VFULL SCALE Fixed Signal Integrate Time DS21477C-page 6 Phase Control Polarity Control Integrator Output REF Voltage Variable Reference Integrate Time Display © 2005 Microchip Technology Inc. TC826 FIGURE 3-2: For a constant VIN: EQUATION 3-2: TRI TSI The dual slope converter accuracy is unrelated to the integrating resistor and capacitor values, as long as they are stable during a measurement cycle. An inherent benefit is noise immunity. Noise spikes are integrated or averaged to zero during the integration periods. Integrating ADCs are immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals with frequency components at multiples of the averaging period will be attenuated (Figure 3-2). The TC826 converter improves the conventional dual slope conversion technique by incorporating an autozero phase. This phase eliminates zero scale offset errors and drift. A potentiometer is not required to obtain a zero output for zero input. © 2005 Microchip Technology Inc. 30 Normal Mode Rejection (dB) VIN = VR NORMAL MODE REJECTION OF DUAL SLOPE CONVERTER T = Measurement Period 20 10 0 0.1/T 1/T Input Frequency 10/T DS21477C-page 7 TC826 4.0 THEORY OF OPERATION 4.1 Analog Section The auto-zero cycle length is 19 counts minimum. Unused time in the de-integrate cycle is added to the auto-zero cycle. In addition to the basic signal integrate and deintegrate cycles discussed above, the TC826 incorporates an auto-zero cycle.This cycle removes buffer amplifier, integrator, and comparator offset voltage error terms from the conversion. A true digital zero reading results without external adjusting potentiometers. A complete conversion consists of three cycles: an auto-zero, signal integrate and reference cycle (Figure 4-1 and Figure 4-2). 4.1.2 4.1.1 EQUATION 4-1: The auto-zero loop is opened and the internal differential inputs connect to +IN and -IN. The differential input signal is integrated for a fixed time period. The TC826 signal integration period is 20 clock periods or counts. The externally set clock frequency is divided by 32 before clocking the internal counters. The integration time period is: AUTO-ZERO CYCLE Where: During the auto-zero cycle, the differential input signal is disconnected from the circuit by opening internal analog gates. The internal nodes are shorted to analog common (internal analog ground) to establish a zero input condition. Additional analog gates close a feedback loop around the offset voltage error compensation. The voltage level established on CAZ compensates for device offset voltages. FIGURE 4-1: SIGNAL INTEGRATION CYCLE 32 FOSC TSI = x 20 FOSC = External Clock Frequency TC826 ANALOG SECTION RINT REF IN CREF 5 6 7 9 VDD CINT CAZ 11 10 8 TC826 AZ Integrator – – +Input CMPTR + + 3 + To Digital Section – Buffer Comparator INT DE- DE+ DE+ DE- AZ AZ AZ Analog Common -INPUT 2 INT VDD VDD INT 4 ≈ 6.3V 1μA From Digital Control Center AZ INT DE+ DE- ≈ VDD – 2.9V – + Analog Switch 12 ≈ VDD DS21477C-page 8 © 2005 Microchip Technology Inc. TC826 4.1.3 The differential input voltage must be within the device Common mode range when the converter and measured system share the same power supply common (ground). If the converter and measured system do not share the same power supply common, -IN should be tied to analog common. This is the usual connection for battery operated systems. Polarity is determined at the end of signal integrate signal phase. The sign bit is a true polarity indication, in that signals less than 1LSB are correctly determined. This allows precision null detection limited only by device noise and system noise. FIGURE 4-2: REFERENCE INTEGRATE CYCLE The final phase is reference integrate or de-integrate. -IN is internally connected to analog common and +IN is connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal and is between 0 and 40 counts. The digital reading displayed is: EQUATION 4-2: 20 = VIN VREF CONVERSION HAS THREE PHASES Auto-Zero Phase (AZ) Signal Integrate Phase (SI) Reference Integrate Phase (RI) (De-integrate) Sign Bit Determined Integrator Output Analog Common Potential True Zero Crossing Zero Crossing Detected Internal System Clock (FSYS) Internal Data Latch Update Signal Number of Counts Proportional to VIN TI 19 Counts Minimum 20 Counts One Conversion Cycle = 80 Counts © 2005 Microchip Technology Inc. TD ≈ VIN 41 Counts Maximum 1 ) (TCONV = 80 X FSYS DS21477C-page 9 TC826 4.2 System Timing 4.4 The oscillator frequency is divided by 32 prior to clocking the internal counters. The three-phase measurement cycle takes a total of 80 clock pulses. The 80 count cycle is independent of input signal magnitude. Each phase of the measurement cycle has the following length: • Auto-Zero Phase: 19 to 59 Counts For signals less than full scale, the auto-zero is assigned the unused reference integrate time period. • Signal Integrate: 20 Counts This time period is fixed. The integration period is: Components Value Selection 4.4.1 INTEGRATING RESISTOR (RINT) The desired full scale input voltage and output current capability of the input buffer and integrator amplifier set the integration resistor value. The internal class A output stage amplifiers will supply a 1μA drive current with minimal linearity error. RINT is easily calculated for a 1μA full scale current: EQUATION 4-4: RINT = EQUATION 4-3: VFS Full Scale Voltage(V) = 1 x 10 – 6 1 x 10 – 6 Where VFS = Full Scale Analog Input ⎛ 32 ⎞ TSI = 20 ⎝ FOSC ⎠ 4.4.2 Where FOSC is the externally set clock frequency. INTEGRATING CAPACITOR (CINT) • Reference Integrate: 0 to 41 Counts The integrating capacitor should be selected to maximize integrator output swing. The integrator output will swing to within 0.4V of VS+ or VS- without saturating. 4.3 The integrating capacitor is easily calculated: Reference Voltage Selection A full scale reading requires the input signal be twice the reference voltage. The reference potential is measured between REF IN (Pin 5) and ANALOG COMMON (Pin 2). EQUATION 4-5: CINT = TABLE 4-1: Required Full Scale Voltage VREF 20mV 10mV 2V 1V The internal voltage reference potential available at analog common will normally be used to supply the converter’s reference. This potential is stable whenever the supply potential is greater than approximately 7V. In applications where an externally generated reference voltage is desired, refer to Figure 4-3. The reference voltage is adjusted with a near full scale input signal. Adjust for proper LCD display read out. FIGURE 4-3: EXTERNAL REFERENCE VFS ⎛ 640 ⎞ RINT ⎝ FOSC x VINT ⎠ Where: VINT = Integrator Swing FOSC = Oscillator Frequency The integrating capacitor should be selected for low dielectric absorption to prevent rollover errors. Polypropylene capacitors are suggested. 4.4.3 AUTO-ZERO CAPACITOR (CAZ) CAZ should be 2-3 times larger than the integration capacitor. A polypropylene capacitor is suggested. Typical values from 0.14μF to 0.068μF are satisfactory. 4.4.4 REFERENCE CAPACITOR (CREF) A 1μF capacitor is suggested. Low leakage capacitors, such as polypropylene, are recommended. Several capacitor/resistor combinations for common full scale input conditions are given in Table 4-2. V+ 8 V+ TC826 REF IN ANALOG COMMON MCP1525 5 2 1μF 2.50V Reference (b) DS21477C-page 10 © 2005 Microchip Technology Inc. TC826 Comp. SUGGESTED COMPONENT VALUES 2V Full Scale VREF ≈ 1V 2mV Full Scale VREF ≈ 100V 2MΩ 200kΩ 20kΩ CINT 0.033μF 0.033μF 0.033μF CREF 1μF 1μF 1μF CAZ 0.068μF 0.068μF 1.14μF ROSC 430kΩ 430kΩ 430kΩ Note: Approximately 5 conversions/second. In systems where Common mode rejection ratio minimizes error. Common mode voltages do, however, affect the integrator output level. Integrator output saturation must be prevented. A worse case condition exists if a large positive VCM exists in conjunction with a full scale negative differential signal. The negative signal drives the integrator output positive along with VCM. For such applications, the integrator output swing can be reduced below the recommended 2V full scale swing. The integrator output will swing within 0.3V of VDD or VSS without increased linearity error. 4.6 Digital Section The TC826 contains all the segment drivers necessary to drive a liquid crystal display (LCD). An LCD backplane driver is included. The backplane frequency is the external clock frequency divided by 256. A 430kΩ OSC gets the backplane frequency to approximately 55Hz, with a 5V nominal amplitude. When a segment driver is in phase with the backplane signal, the segment is ‘OFF’. An out-of-phase segment drive signal causes the segment to be ‘ON’ or visible. This AC drive configuration results in negligible DC voltage across each LCD segment. This insures long LCD display life. The polarity segment drive, -POL, is ‘ON’ for negative analog inputs. If +IN and -IN are reversed, this indicator would reverse. The TC826 transfer function is shown in Figure 4-4. Over Range Indication 39 2 1 -0.5 0 -2 -1 0.5 1 2 3 39 39.5 40 40.5 Analog Input V (X FS ) 40 Differential Signal Inputs The TC826 is designed with true differential inputs and accepts input signals within the input stage Common mode voltage range (VCM). The typical range is V+ -1 to V- +1V. Common mode voltages are removed from the system when the TC826 operates from a battery or floating power source (isolated from measured system) and -IN is connected to analog common (VCOM). TRANSFER FUNCTION 40 20mV Full Scale VREF ≈ 10V RINT 4.5 FIGURE 4-4: Digital Display TABLE 4-2: 4.7 BAR/DOT Input (Pin 61) The BAR/DOT input allows the user to select the display format. The TC826 powers up in the BAR mode. Select the DOT display format by connecting BAR/DOT to the negative supply (Pin 12) through a 1MΩ resistor. 4.8 HOLD Input (Pin 62) The TC826 data output latches are not updated at the end of each conversion if HOLD is tied to the negative supply (Pin 12) through a 1MΩ resistor. The LCD display continuously displays the previous conversion results. The HOLD pin is normally pulled high by an internal pull-up. 4.9 TEST Input (Pin 63) The TC826 enters a Test mode with the TEST input connected to the negative supply (Pin 12). The connection must be made through a 1MΩ resistor. The TEST input is normally internally pulled high. A low input sets the output data latch to all ones. The BAR Display mode is set. The 41 LCD output segments (zero plus 40 data segments) and over range annunciator flash on and off at 1/4 the conversion rate. The polarity annunciator (POL-) segment will be on, but not flashing. 4.10 Over Range Display Operation (OR, Pin 59) An out-of-range input signal will be indicated on the LCD display by the OR annunciator driver (Pin 59) becoming active. In the BAR display format, the 41 bar segments and the over range annunciator, OR, will flash ON and OFF. The flash rate is on fourth the conversion rate (FOSC/2560). In the DOT Display mode, OR flashes and all other data segment drivers are off. © 2005 Microchip Technology Inc. DS21477C-page 11 TC826 4.11 Polarity Indication (POL-, Pin 60) FIGURE 4-6: The TC826 converts and displays data for positive and negative input signals. The POL LCD segment driver (Pin 60) is active for negative signals. 4.12 8 TC826 Oscillator Operation 9V 12 The TC826 external oscillator frequency, FOSC, is set by resistor ROSC connected between pins 13 and 14. The oscillator frequency versus resistance curve is shown in Figure 4-5. FIGURE 4-5: 30 20 10 CONV (CONV/SEC) 40 14 OSC2 0.1μf OSCILLATOR FREQUENCY VS. ROSC 18 TA = 25°C 16 VDD to VSS = 9V External Oscillator A. Single 9V Supply VDD = 5V 14 12 VDD 8 10 8 TC826 6 13 Power Supply Oscillator 0.1μf 4 VSS 12 2 0 13 OSC1 20 50 FOSC (kHz) EXTERNAL OSCILLATOR CONNECTION 0 0 2 4 6 8 10 12 14 16 18 20 ROSC (X 100kΩ) B. Dual Supply 4.13 FOSC is divided by 32 to provide an internal system clock, FYSY. Each conversion requires 80 internal clock cycles. The internal system clock is divided by 8 to provide the LCD backplane drive frequency. The display flash rate during an input out-of-range signal is set by dividing FSYS by 320. The internal oscillator may be bypassed by driving OSC1 (Pin 13) with an external signal generator. OSC2 (Pin 14) should be left unconnected. The oscillator should swing from VDD to VSS in single supply operation (Figure 4-6). In dual supply operation, the signal should swing from power supply ground to VDD. VSS = 5V LCD Display Format The input signal can be displayed in two formats (Figure 4-7). The BAR/DOT input (Pin 61) selects the format. The TC826 measurement cycle operates identically for either mode. FIGURE 4-7: DISPLAY OPTION FORMATS A. BAR Mode 2. Input = 5% of Full Scale 1. Input = 0 Bar 4 Bar 3 Bar 2 Bar 1 Bar 0 Off Off Off Off On Off Off On On On B. DOT Mode 1. Input = 0 Bar 4 Bar 3 Bar 2 Bar 1 Bar 0 DS21477C-page 12 2. Input = 5% of Full Scale Off Off Off Off On Off Off On Off Off © 2005 Microchip Technology Inc. TC826 4.14 BAR Format The TC826 powers up in the BAR mode. BAR/DOT is pulled high internally. This display format is similar to a thermometer display. All bars/LCD segments including zero, below the bar/LCD segment equaling the input signal level, are on. A half scale input signal, for example, would be displayed with BAR 0 to BAR 20 on. 4.15 DOT Format By connecting BAR/DOT to VSS through a 1MΩ resistor, the DOT mode is selected. Only the BAR LCD segment equaling the input signal is on. The zero segment is on for zero input. 4.17 Additional drive electronics are not required to interface the TC826 to an LCD display. The TC826 has an onchip backplane generator and driver. The backplane frequency is: FBP = FOSC/256 Figure 4-8 gives typical backplane driver rise/fall time versus backplane capacitance. FIGURE 4-8: This mode is useful for moving cursor or ‘needle’ applications. 9 LCD Displays Most end products will use a custom LCD display for final production. Custom LCD displays are low cost and available from all manufacturers. The TC826 interfaces to non-multiplexed LCD displays. A backplane driver is included on-chip. To speed initial evaluation and prototype work, a standard TC826 LCD display is available from Varitronix. Varitronix Ltd. LCDs 4/F Liven House 61-63 King Yip Street Kwun Tong, Kowloon Hong Kong Tel: (852)2389-4317 Fax: (852)2343-9555 USA Office: VL Electronics / Varitronix 3250 Wilshire Blvd., Suite 901 Los Angeles, CA 90010 Tel: (213) 738-8700 Fax: (213) 738-5340 • Part No.: VBG-413-DP BACKPLANE DRIVE RISE/ FALL TIME VS. CAPACITANCE 10 Rise/Fall Time (X 100ns) 4.16 LCD Backplane Driver (BP, Pin 15) 8 TA = 25°C VS = 9V 7 6 5 4 3 2 1 0 4.18 1 2 3 4 5 6 7 8 0 10 Backplane Capacitance (X 100pf) Flat Package Socket Sockets suitable for prototype work are available. A USA source is: Nepenthe Distribution 2471 East Bayshore, Suite 520 Palo Alto, CA 94303 Tel: 415/856-9332 Telex: 910/373-2060 • ‘BQ’ Socket Part No.: IC51-064-042 BQ Other standard LCD displays suitable for development work are available in both linear and circular formats. One manufacturer is: UCE Inc. 24 Fitch Street Norwalk, CT 06855 Tel: 203/838-7509 • Part No. 5040: 50 segment circular display with 3-digit numeric scale. • Part No. 5020: 50 segment linear display. © 2005 Microchip Technology Inc. DS21477C-page 13 TC826 5.0 PACKAGING INFORMATION 5.1 Package Marking Information Package marking data not available at this time. 5.2 Taping Form Component Taping Orientation for 64-Pin PQFP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 64-Pin PQFP Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 32 mm 24 mm 250 13 in Note: Drawing does not represent total number of pins. 5.3 Package Dimensions 64-Pin PQFP 7° MAX. .009 (0.23) .005 (0.13) PIN 1 .018 (0.45) .012 (0.30) .041 (1.03) .031 (0.78) .555 (14.10) .547 (13.90) .687 (17.45) .667 (16.95) .031 (0.80) TYP. .555 (14.10) .547 (13.90) .687 (17.45) .667 (16.95) .010 (0.25) TYP. .120 (3.05) .100 (2.55) .130 (3.30) MAX. Dimensions: mm (inches) DS21477C-page 14 © 2005 Microchip Technology Inc. TC826 NOTES: © 2005 Microchip Technology Inc. DS21477C-page 15 TC826 SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. DS21477C-page 16 © 2005 Microchip Technology Inc. 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Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2005 Microchip Technology Inc. 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