ADCLK846 Schematic Rev A PDF

8
7
6
2
3
4
5
1
REVISIONS
REV
DESCRIPTION
DATE
APPROVED
PWR
LABEL "VS(1.8V)" VS
GND
1
2
25.602.2253.0
100
0.1UF
0.1UF
C21
GND
0.1UF
C20
VS
0.1UF
C19
0.1UF
C18
R13
0.1UF
C17
0.1UF
GND
C9
R11
BYPASS CAPACITORS (DUT)
5 4 3 2
GND
0.1UF
100
C31
VREF
0.1UF
C3
1
5 4 3 2
C7
GND
C5
2 3 4 5
GND
0.1UF
2 3 4 5
D
OUT1B
1
0.1UF
D
OUT0B
OUT1
1
C15
OUT0
1
GND
BYPASS CAPACITORS (SUPPLY)
10UF
C16
100OHM DIFF MATCH
100OHM DIFF MATCH
VS
GND
C
C
DNI
C11
4
1
3
MABA-007159-000000
R4
2 3 4 5
C2
VREF
0.1UF
0
DNI
R2
0
GND
CTRL_A
DNI
CTRL_B
GND
SLEEP
VS
1
2
3
VS
1
2
3
VS
GND
GND
GND
1.1K
R15
100
OUT0 24
OUT0B 23
22
VS
OUT1 21
OUT1B 20
19
VS
R8
GND
1
R9
GND
1
1.1K
0.1UF
R10
R14
0.1UF
C8
0.1UF
C6
0.1UF
C4
GND
100
OUT5
5 4 3 2
OUT4B
1
5 4 3 2
GND
OUT4
1
5 4 3 2
GND
A
1
5 4 3 2
GND
SCHEMATIC
A N A LO G
DE V CES
THIS
DRAWING
IS THE PROPERTY
IT IS NOT TO BE REPRODUCED
IN PART,
OR USED
OF ANALOG
OF ANALOG
DEVICES
ADCLK846CE01
INC.
INFORMATION
3
01/011/2009
TO OTHERS,
TO THE INTERESTS
DEVICES.
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
OWNED OR CONTROLLED
BY OWNED ANALOG DEVICES.
4
DESIGN VIEW
OR COPIED, IN WHOLE OR
IN FURNISHING
OR FOR ANY OTHER PURPOSE DETRIMENTAL
5
B
GND
1
6
OUT3B
5 4 3 2
1.1K
OUT5B
7
OUT3
5 4 3 2
C14
100
8
OUT2B
5 4 3 2
100OHM DIFF MATCH
0.1UF
R12
A
1
0.1UF
C13
100OHM DIFF MATCH
B
1
2
3
GND
100OHM DIFF MATCH
R16
100
GND
VREF
CLKB
CLK
ADCLK846
VS
CTRL_A
CTRL_B
0.1UF
100OHM DIFF MATCH
C10
0.1UF
100OHM DIFF MATCH
SEC
OUT2
5 4 3 2
C12
OUT2 18
OUT2B 17
16
VS
OUT3 15
OUT3B 14
13
VS
SLEEP
OUT5B
OUT5
VS
OUT4B
OUT4
CLK
PRI
1
2
3
4
5
6
1
0.1UF
7
8
9
10
11
12
GND
R1
0
2 3 4 5
C1
1
PAD GND
T1
5
R7
100
1
DNI
0
R5
49.9
R6
49.9
CLKB
DNI
R3
PTD ENGINEER
OSCAR S BURNANO
2
REV
DRAWING NO.
SCH-ADCLK846CE01A
SIZE
D
SCALE
NONE SHEET 1
1
A
OF 1
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