CoreControl TM Data Sheet TDA21106 High speed Driver with bootstrapping for dual Power MOSFETs P-DSO-8 Features • • • • • • • • • • • • Fast rise and fall times for frequencies up to 2 MHz Capable of sinking more than 4A peak currents for lowest switching losses Charges High Side MOSFET gate drive voltage from 6 to 12V according to PVCC setting; Low Side MOSFET at 12 V. Adjustable High Side MOSFET gate drive voltage via PVCC pin for optimizing ON losses and gate drive losses Integrates the bootstrap diode for reducing the part count Prevents from cross-conducting by adaptive gate drive control High voltage rating on Phase node Supports shut-down mode for very low quiescent current through three-state input Compatible to standard PWM controller ICs (Intersil, Analog Devices) Floating High Side MOSFET drive Footprint compatible to TDA21101G and HIP6601B Ideal for multi-phase Desktop CPU supplies on motherboards and VRM´s Type TDA21106 Package P-DSO-8 Ordering Code Q67042-S4223 Number Name 1 GATEHS Pinout Top View GATEHS 1 8 PHASE BOOT 2 7 PVCC PWM 3 6 VCC GND 4 5 GATELS Rev 2.0 Marking 21106 2 BOOT 3 4 5 PWM GND GATELS 6 7 VCC PVCC 8 PHASE Page 1 Description Gate drive output for the N-Channel High side MOSFET Floating bootstrap pin. To be connected to the external bootstrap capacitor to generate the gate drive voltage for the high side N-Channel MOSFET Input for the PWM controller signal Ground Gate drive output for the N-Channel Low Side MOSFET Supply voltage Input to adjust the High Side gate drive To be connected to the junction of the High Side and the Low Side MOSFET Apr, 2004 CoreControl TM Data Sheet TDA21106 General Description The dual high speed driver is designed to drive a wide range of N-Channel low side and N-Channel high side MOSFETs with varying gate charges. It has a small propagation delay from input to output, short rise and fall times and the same pin configuration to be compatible to TDA21101G and HIP6601B. In addition it provides protection features as well as a three-state mode for efficiency reasons. The high breakdown voltage makes it suitable for mobile applications. Target application The dual high speed driver is designed to work well in half-bridge type circuits where dual N-Channel MOSFETs are utilized. A circuit designer can fully take advantage of the driver´s capabilities in high-efficiency, high-density synchronous DC/DC converters that operate at high switching frequencies, e.g. in multi-phase converters for CPU supplies on motherboards and VRM´s but also in motor drive and class-D amplifier type applications. Absolute Maximum Ratings At Tj = 25 °C, unless otherwise specified Parameter Symbol Value Min. Max. Voltage supplied to ‘VCC’ pin; DC Voltage supplied to ‘PVCC’ pin; DC Voltage supplied to ‘PWM’ pin Voltage supplied to ‘BOOT’ pin referenced to ‘PHASE’ VVCC VPVCC VPWM VBOOT – VPHASE VBOOT VPHASE VPHASE -0.3 -0.3 -0.3 -0,3 25 25 5,5 25 -0,3 -1 -20 45 25 30 VGATEHS -3.5 Voltage supplied to ‘BOOT’ pin referenced to ‘GND’ Voltage rating at ‘PHASE’ pin, DC Voltage rating at ‘PHASE’ pin, tpulse_max = 500ns Max Duty Cycle = 2% Voltage supplied to GATEHS pin referenced to ‘PHASE’ Tpulse_max < 100ns, Energy < 2uJ Voltage supplied to GATELS pin referenced to ‘GND’ Tpulse_max < 100ns, Energy < 2uJ Junction temperature Storage temperature ESD Rating; Human Body Model IEC climatic category; DIN EN 60068-1 Rev 2.0 Page 2 VGATELS TJ TS VBOOT +0.3 -5 VVCC +0.3 -25 150 -55 150 4 55/150/56 Unit V °C KV - Apr, 2004 CoreControl TM Data Sheet TDA21106 Thermal Characteristic Parameter Symbol Thermal resistance, junction-soldering point Thermal resistance, junction-ambient Values Unit Min. Typ. Max. 95 K/W 125 Operating Conditions At Tj = 25 °C, unless otherwise specified Parameter Voltage supplied to ‘VCC’ pins Voltage supplied to ‘PVCC’ pins Input signal transition frequency Power dissipation Junction temperature Symbol Conditions Unit Values Min. Typ. Max. VVCC 10.8 13.2 V VPVCC 6 13.2 V f 0.1 2 MHz 150 W °C PTOT TJ TA = 25 °C, TJ = 125 °C 0.8 -25 Electrical Characteristic At Tj = 25 °C, unless otherwise specified Parameter Symbol Supply Characteristic Quiescent current IPVCC+IVCCQ VCC supply current IVCC PVCC supply current Under-voltage lockout Under-voltage lockout Input Characteristic Current in ‘PWM’ pin Current in ‘PWM’ pin Shut down window Shut down hold-off time PWM pin open PWM Low level PWM High level Pulse width High Side Rev 2.0 IPVCC IPWM_L IPWM_H VIN_SHUT t_SHUT VPWM_O VPWM_L VPWM_H t_P Conditions 1.8 V ≤ VPWM ≤ 3.0 V f =1 MHz, VPVCC = VVCC = 12 V No load f =1 MHz, VPVCC = VVCC = 12 V No load VVCC rising threshold Unit Values Min. Typ. Max. 1,3. 3 5 8 6 8.5 9.7 10.1 10.5 VVCC falling threshold 7.3 7.6 8.0 V_PWM = 0.4 V V_PWM = 4.5 V t_SHUT > 300 ns 1.6 V ≤ VPWM ≤ 3.2 V -80 120 1.7 100 1.8 -115 -150 180 250 3.1 190 300 2.0 2.2 1.4 3.7 = Pulse width on PWM pin Page 3 40 Apr, 2004 mA V µA V ns V ns CoreControl TM Data Sheet TDA21106 At Tj = 25 °C, unless otherwise specified Dynamic Characteristic Turn-on propagation td(ON)_HS Delay High Side Turn-off propagation td(OFF)_HS delay High Side Rise time High Side tr_HS Fall time High Side tf_HS Turn-on propagation td(ON)_LS Delay Low Side Turn-off propagation td(OFF)_LS delay Low Side Rise time Low Side tr_LS Fall time Low Side tf_LS PPVCC = VVCC= 12 V CISS = 3000 pF 20 35 15 25 20 15 15 33 25 27 10 20 20 15 33 25 ns At Tj = 125 °C, unless otherwise specified Dynamic Characteristic Turn-on propagation td(ON)_HS Delay High Side Turn-off propagation td(OFF)_HS delay High Side Rise time High Side tr_HS Fall time High Side tf_HS Turn-on propagation td(ON)_LS Delay Low Side Turn-off propagation td(OFF)_LS delay Low Side Rise time Low Side tr_LS Fall time Low Side tf_LS Rev 2.0 25 18 PPVCC = VVCC= 12 V CISS = 3000 pF 24 22 18 ns 15 21 19 Page 4 Apr, 2004 CoreControl TM Data Sheet TDA21106 Timing diagram ~5V 1 1V V tr LS tf LS At Tj = 25 °C, unless otherwise specified Parameter Unit Values Min. Typ. Max. Output Characteristic High Side (HS) and Low Side (LS), ensured by design Output HS; Source VPVCC = VVCC= 12 V Resistance I_HS_SRC = 2 A 1 (1) Ω HS; Sink VPVCC = VVCC= 12 V 0.9 1.3 Ω LS; Source VPVCC = VVCC= 12 V 1.4 (2) I_HS_SRC = 2 A Ω LS; Sink VPVCC = VVCC= 12 V 0.9 1.3 Ω VPVCC = VVCC= 12 V HS; Source 4 A Peak outputt_P_HS / Pulse < 20 ns HS; Sink 4 current t_ / Pulse < 40 ns LS; Source 4 P_LS LS; Sink 4 1 Incremental resistance VBOOT-VGATEHS=4.3V @ ISOURCE=2A 2 Incremental resistance VVCC –VGATELS=4.4V @ ISOURCE=2A Rev 2.0 Conditions Page 5 Apr, 2004 CoreControl TM Data Sheet TDA21106 Package Drawing P-DSO-8-3 Footprint Drawing P-DSO-8-3 e 1,27 mm Rev 2.0 A 5,69 mm L 1,31 mm Page 6 B 0,65 mm Apr, 2004 CoreControl TM Data Sheet TDA21106 Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 53, D-81541 München Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev 2.0 Page 7 Apr, 2004