Audioprocessor 1 Overview 1.1 Features TDA 4350X Stereo-Soundprocessing • Three stereo AF inputs, one of the inputs is equipped with floating ground. P-DSO-28-1 • Input level control for individual level setting of the several AF sources in addition with a clipping detector. • Volume control with software controlled switchable loudness function. Frequency response fixed by external components. • Bass- and treble control with clipping detector. • Four independent settable output attenuators for balance/fader function. • Fan-out of the AF outputs software controlled. • AF outputs switchable for driving bride power amplifiers. • I2C Bus controlled immediately, or zero cross detector dependent mute, or immediately mute via extra pin. Control Part • I2C Bus interface • Control of sound processing • Read out of the clipping detector status. Type Ordering Code Package TDA 4350X Q67000-A5060 P-DSO-28-1 1.2 Application The TDA 4350X is a single-chip audio-soundsystem. The circuit can be partitioned into two functional blocks: stereo-soundprocessing and control part. Semiconductor Group 1 04.96 TDA 4350X 1.3 Pin Configuration (top view) P-DSO-28-1 Figure 1 Semiconductor Group 2 04.96 TDA 4350X 1.4 Pin Definitions and Functions Pin No. Function 1 CD input right 2 Input 2 right 3 Input 3 right 4 Loudness output right 5 Loudness input right 6 Digital ground 7 Mute 8 I2C Bus SCL 9 I2C Bus SDA 10 + VS supply voltage 11 Corner frequency treble left 12 Corner frequency treble right 13 AF output right front 14 AF output right rear 15 AF output left rear 16 AF output left front 17 RC network bass right 18 RC network bass right 19 RC network bass left 20 RC network bass left 21 Analog ground 22 Bias for AF operation point 23 Loudness output left 24 Loudness input left 25 Input 3 left 26 Input 2 left 27 CD ground 28 CD input left Semiconductor Group 3 04.96 TDA 4350X 1.5 Functional Block Diagram Figure 2 Block Diagram Semiconductor Group 4 04.96 TDA 4350X 2 Circuit Description 2.1 Signalprocessing 1. The selection of the AF inputs happens in the input switch. There are three stereo-inputs available. One of the input pairs is equipped with a separate floating ground connection especially provided for external signal sources. Crosstalk to this input is suppressed by common mode rejection. An input level control circuitry behind input switch realizes the adaption of different signal source levels. The circuit offers a control range from 0 dB to + 25 dB with a stepwidth of 2.5 dB. An I2C Bus controlled first clipping detector allows a software controlled level adaption. 2. Next stage in signal path is volume control, with common setting for both channels, a control range of 0 dB to – 78.75 dB and a stepwidth of 1.25 dB. In this stage a loudness function is realized. A loudness control circuit, in fact a second volume control circuit with identical structure, is to be set to a higher level as volume control. The resulting level difference fixes the maximum amplitude response of the loudness function. The frequency response, only bass boost or combined bass and treble boost is fixed by external components. Because the volume and loudness control are strictly independent of each other, the frequency response and threshold of the loudness function is programmable via software. A switch bit allows to enable the loudness function easily. Some possible loudness setups: Loudness function starting at max. vol. then ∆ continuously increasing. Figure 3 Semiconductor Group 5 04.96 TDA 4350X Loudness function starting at vol. a then ∆ continuously increasing. Figure 4 Loudness function starting at max. vol. increasing to ∆, following constant ∆. Figure 5 Semiconductor Group 6 04.96 TDA 4350X Loudness function starting at vol. a increasing to ∆, following constant ∆. Figure 6 3. In the following signalpath there is tone control, consisting of bass and treble control. Bass control offers a control range of + 16 dB to – 14 dB with a stepwidth of 2 dB. Frequency characteristic, 1st order or 2nd order (resonance type) is fixed by external components. Treble control also offers a control range of + 16 dB to – 14 dB with a stepwidth of 2 dB. The treble control corner frequency is determinated by an external capacitor. A second clipping detector allows to detect clipping in tone control part. 4. Last stages in signal path are four strictly independent controllable output attenuators to realize balance and fader function. Each unit offers a control range of 0 dB to – 38.75 dB in steps of 1.25 dB. The AF outputs are of a class A-type to avoid distortion via software, the output fan-out can be increased to drive loads up to > 1.5 kΩ. One output of each stereo channel can be inverted software controlled, to drive easily bridge power amplifiers. 5. Mute control may be either done via the volume control setting, or directly for all outputs by setting the IM (immediately mute) bit via I2C Bus. The second bus controlled mute mode is mute after signal zero crossing (ZCM). Two zero cross detectors are built-in, therefore this mute control works independent for left and right channel. Signal off- and on-switching is performed under zero cross detector control. The ZCM status can be read out via I2C Bus (ZCS). After activating ZCM, the ZCS (zero crossing status) bit is set to ‘1’, when all outputs are muted after zero crossing. After deactivating ZCM, the ZCS bit is set to ‘0’ when all outputs are switched on after zero crossing. The IM mute overwrites ZCM mute. Third mute control is hardware mute via a mute pin. If the mute pin is switched to ground all outputs are muted immediately. Hardware mute overwrites all other mute modes. Semiconductor Group 7 04.96 TDA 4350X 2.2 Controlpart All functions are controlled via an I2C Bus interface. All data are stored into a latch circuit. The telegram structure is built as follows: Startcondition – chipaddress – any number of databytes – stopcondition. For the databytes the following conditions must be fulfilled: Before transmitting a databyte a subaddress byte must first be placed in the data telegram. 2.2.1 Chipaddress MSB LSB 1 0 0 0 0 R/W = ‘0’ → Read 2.2.2 1 1 R/W R/W = ‘1’ → Write Subaddress Bytes MSB LSB Switchbyte 0 0 0 0 0 0 0 0 Inputlevel 0 0 0 0 0 0 0 1 Volume 0 0 0 0 0 0 1 0 Loudness 0 0 0 0 0 0 1 1 Bass/Treble 0 0 0 0 0 1 0 0 Out rear left 0 0 0 0 0 1 0 1 Out front left 0 0 0 0 0 1 1 0 Out rear right 0 0 0 0 0 1 1 1 Out front right 0 0 0 0 1 0 0 0 Semiconductor Group 8 04.96 TDA 4350X 2.2.3 Control Bytes a) Switch Control Byte MSB LSB ZCM IM Fan Ph IN-3 IN-2 IN-CD = ‘0’ IN-CD = ‘1’ CD input OFF; power ON CD input ON IN-2 = ‘0’ IN-2 = ‘1’ Input 2 OFF; power ON Input 2 ON IN-3 = ‘0’ IN-3 = ‘1’ Input 3 OFF; power ON Input 3 ON IN-CD X If no input is selected, mute function is active. If no protection against multiple selection implemented! Ph = ‘0’ Ph = ‘1’ Bridgepower amplifier operation ON; power ON Normal operation Fan = ‘0’ Fan = ‘1’ Normal operation; power ON Increased Fan out ON IM = ‘0’ IM = ‘1’ Normal operation; power ON Immediate mute for all AF outputs ZCM = ‘0’ ZCM = ‘1’ Normal operation; power ON Mute after signal zero crossing IM overwrites ZCM, handware mute overwrites all other mute modes. b) Input Level Control Byte MSB LSB Min. gain X X X X 0 0 0 0 Min. gain + 1 X X X X 0 0 0 1 Max. gain – 1 X X X X 1 0 0 1 Max. gain X X X X 1 0 1 0 1 1 1 1 power ON to Max. gain X Semiconductor Group X X X 9 04.96 TDA 4350X c) Volume Level Control Byte MSB LSB Min. gain X 0 0 0 0 0 0 0 Min. gain + 1 X 0 0 0 0 0 0 1 Max. gain – 1 X 0 1 1 1 1 1 0 Max. gain X 0 1 1 1 1 1 1 power ON d) Loudness Control Byte MSB LSB Min. gain X Ld 0 0 0 0 0 0 Min. gain + 1 X Ld 0 0 0 0 0 1 Max. gain – 1 X Ld 1 1 1 1 1 0 Max. gain X Ld 1 1 1 1 1 1 Ld = ‘0’ Loudness OFF; power ON (loudness attenuator has the same setting as volume attenuator) Ld = ‘1’ Loudness ON Semiconductor Group 10 power ON 04.96 TDA 4350X e) Treble/Bass Control Byte MSB LSB linear 1 0 0 0 1 0 0 0 max. treble, lin. bass 0 0 0 0 1 0 0 0 min. treble, lin. bass 1 1 1 1 1 0 0 0 lin. treble, max. bass 1 0 0 0 0 0 0 0 lin. treble, min. bass 1 0 0 0 1 1 1 1 max. treble, max. bass 0 0 0 0 0 0 0 0 min. treble, min. bass 1 1 1 1 1 1 1 1 power ON 0 0 0 0 0 0 0 1 treble bass f ) Output Control Bytes MSB LSB Min. gain X X X X 0 0 0 0 Min. gain + 1 X X X X 0 0 0 1 Max. gain – 1 X X X X 1 1 1 0 Max. gain X X X X 1 1 1 1 Semiconductor Group 11 power ON 04.96 TDA 4350X 2.2.4 Talkmode MSB CI1 LSB CI2 CI1 = ‘0’ CI1 = ‘1’ CL 2 = ‘0’ CL2 = ‘1’ ZCS = ‘0’ ZCS = ‘1’ ZCS X X X X X Normal operation Input level control output at clipping level Normal operation Tone control output at clipping level All AF outputs are ON after ZCS set to ‘0’ All AF outputs are muted after ZCM set to ‘1’ Figure 7 AF Inputs Pin 1/2/3/25/26/27/28 Semiconductor Group 12 04.96 TDA 4350X Figure 8 AF Outputs Pin 13/14/15/16 Figure 9 Mute Pin 7, I2C Bus SCL Pin 8 Semiconductor Group 13 04.96 TDA 4350X Figure 10 I2C Bus SDA Pin 9 Figure 11 Corner Frequency Treble Pin 11/12 Semiconductor Group 14 04.96 TDA 4350X Figure 12 Loudness Pin 4/5/23/24 Figure 13 RC Network Bass Pin 17/18/19/20 Semiconductor Group 15 04.96 TDA 4350X Figure 14 Bias for AF Operation Point Pin 22 Semiconductor Group 16 04.96 TDA 4350X 3 Electrical Characteristics 3.1 Absolute Maximum Ratings TA = – 40 °C to 85 °C Parameter Supply voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC voltage Max. DC current Max. DC current Max. DC current Max. DC current Max. DC current Max. DC current Max. DC current Max. DC current Semiconductor Group Symbol V10 V1 V2 V3 V5 V7 V8 V9 V11 V12 V17 V19 V22 V23 V25 V26 V27 V28 I4 I13 I14 I15 I16 I18 I20 I24 Limit Values Unit Remarks min. max. 0 14 V 0 V 0 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 V10 0 2 mA 0 5 mA 0 5 mA 0 5 mA 0 5 mA 0 2 mA 0 2 mA 0 2 mA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 V V V V V V V V V V V V V V V V 04.96 TDA 4350X 3.1 Absolute Maximum Ratings (cont’d) TA = – 40 °C to 85 °C Parameter Symbol Limit Values min. Junction temperature Storage temperature Thermal resistance ESD voltage, HBM ESD voltage, AF outputs Tj Tg RthSA VESD1 VESD2 Unit Remarks max. 150 °C 125 °C 76 K/W –4 4 kV 1.5 kΩ, 100 pF –6 6 kV 1.5 kΩ, 100 pF Note: Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 3.2 Operational Range Parameter Supply voltage Ambient temperature range Input frequency range Symbol VS TA fI Limit Values Unit min. max. 7.5 13.2 V – 40 85 °C 0.01 20 kHz Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 18 04.96 TDA 4350X 3.3 AC/DC Characteristics V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Current consumption I10 Unit Test Condition max. Test Circuit 45 mA 1 Signal Section Gain G13-1 0 dB 1 Gain G14-1 0 dB 1 Analogous values are apply for feeding in on pins 2 and 3. Gain G15-28 0 dB 1 Gain G16-28 0 dB 1 Analogous values are apply for feeding in on pins 25 and 26. Input Level Control Min. gain G13-1 G14-1 G15-28 G16-28 0 dB Max. gain G13-1 G14-1 G15-28 G16-28 25 dB 01,0A Vinp 10 1 Stepwidth G13-1 G14-1 G15-28 G16-28 2.5 dB 01,X-01, X ± 1 Vinp X-Vinp (X ± 1) 1 1 Analogous values are apply for feeding in on pins 2, 3, 25 and 26. Threshold Clipping detector 1 Semiconductor Group V1 CI1 V28 CI1 1.9 Vrms 19 1 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Unit Test Condition max. Test Circuit Volume Control Max. gain G13-1 G14-1 G15-28 G16-28 0 dB Min. gain G13-1 G14-1 G15-28 G16-28 – 78.25 dB 02,00; 03,00 Vol. 0; Loud. OFF Tracking error ∆G13-14 ∆G15-16 ∆G13-16 ∆G14-15 dB 02,3F-02,24; 03,3F 1 Vol. 63-36; Loud. OFF Stepwidth ∆G13 ∆G14 ∆G15 ∆G16 1.25 dB 02,X-02, (X ± 1) Vol. X-Vol. (X ± 1) 1 Max. gain G4-1 G24-28 –6 dB 03,7F; 02,00 Loud. ON 1 Min. gain G4-1 G24-28 – 84.75 dB 03,40; 02,00 Loud. 0 1 Tracking error ∆G5-24 dB 03,7F-03,64; 02,00 1 Loud. 63-36; Loud. ON Stepwidth ∆G4 ∆G24 dB 03,X-03, (X ± 1) Loud. X-Loud. (X ± 1) ±2 1 1 Loudness Control Semiconductor Group ±2 1.25 20 1 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Unit Test Condition max. Test Circuit Output Control Max. gain G13-1 G14-1 G15-28 G16-28 0 dB Min. gain G13-1 G14-1 G15-28 G16-28 – 38.75 dB 08,00; Out 0 07,00; Out 0 05,00; Out 0 06,00; Out 0 1 Stepwidth ∆G13 1.25 dB 08,X-08, (X ± 1) OutX-Out (X ± 1) 07,X-07, (X ± 1) OutX-Out (X ± 1) 05,X-05, (X ± 1) OutX-Out (X ± 1) 06,X-06, (X ± 1) OutX-Out (X ± 1) 1 ∆G14 ∆G15 ∆G16 Semiconductor Group 21 1 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values Unit Test Condition Test Circuit 16 dB 04,80; f1 = 40 Hz Bass min, Treble lin 1 – 14 dB 04,8F; f1 = 40 Hz Bass min, Treble lin 1 dB 04,8X (X ± 1) BassX-Bass (X ± 1) 1 min. typ. max. Bass Control 14 Bass boost G13-1 G14-1 G15-28 G16-28 Bass cut G13-1 G14-1 G15-28 G16-28 Bass stepwidth ∆G13 ∆G14 ∆G15 ∆G16 1 2 Treble boost G13-1 G14-1 G15-28 G16-28 14 16 dB 04,80; f1 = 15 kHz Treble max, Bass lin 1 Treble cut G13-1 G14-1 G15-28 G16-28 – 14 dB 04,8F; f1 = 15 kHz Treble min, Bass lin 1 Treble stepwidth ∆G13 ∆G14 ∆G15 ∆G16 1 2 3 dB 04,8X-04, (X ± 1) 8 1 TrebleX-Treble (X ± 1) Tone linearity ∆G13 ∆G14 ∆G15 ∆G16 1 2 3 dB 04, 88-04, f1 = 40 Hz … 15 kHz Treble, Bass lin Threshold V1 CI2 clipping detector 2 V28 CI2 3 Treble Control Semiconductor Group 380 1 mVrms 04,00 1 f1 = 40 Hz or 15 kHz Treble max, Bass max 22 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Channel separation ∆G14-15 ∆G13-16 Unit Test Condition dB V1 or V28 = 300 mVrms 1 max. 80 Test Circuit Analogous values apply for feeding on pins 2, 3, 25 and 26. Crosstalk attenuation input switch ain use/out interf. 80 dB Vi use. = 0 Vi interf. = 300 mVrms 1 Feed on pins 1-3 and 25, 26, 28, measured on pins 13-16. Attenuation mute 80 dB 02,7F; V1 = 300 mVrms mute active 00,20; V1 = 300 mVrms notselect 02,7F; V28 = 300 mVrms mute active 00,20; V28 = 300 mVrms notselect 1 V1 2 Vrms 1 V28 2 Vrms THD13 < 1 % THD14 < 1 % THD15 < 1 % THD16 < 1 % V13 2.2 Vrms THD13 < 1 % 01,07; Vinp.7 THD14 < 1 % 01,07; Vinp.7 THD15 < 1 % 01,07; Vinp.7 THD16 < 1 % 01,07; Vinp.7 1 V1 = 300 mVrms 1 a1-13 a1-14 a28-15 a28-16 Max. input voltage Max. output voltage V14 V15 V16 Distortion Semiconductor Group THD13 THD14 THD15 THD16 0.01 0.05 % 1 V28 = 300 mVrms 23 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Unit Test Condition Test Circuit 1 max. Analog values apply for feeding in on pins 2, 3, 25 and 26. Distortion THD13 THD14 THD15 THD16 0.01 0.1 % V1 = 300 mVrms 02,2F; 03,6F; Vol. 47 V28 = 300 mVrms 02,2F; 03,6F; Vol. 47 Distortion THD13 THD14 THD15 THD16 0.05 0.2 % V1 = 150 mVrms 04,XX 1 any tone setting V28 = 150 mVrms 04,XX any tone setting Unweighted signal/noise ratio aS/N13 aS/N14 aS/N15 aS/N16 105 dB VNrms 20 Hz … 20 kHz V1 = 2 Vrms VNrms 20 Hz … 20 kHz V28 = 2 Vrms 1 Unweighted signal/noise ratio aS/N13 aS/N14 60 dB VNrms 20 Hz … 20 kHz V1 = 0.3 Vrms 02,27; 03,67 Vol. 39 VNrms 20 Hz … 20 kHz V28 = 0.3 Vrms 02,27; 03,67 Vol. 39 1 aS/N15 aS/N16 Unweighted noise voltage VN13 VN14 VN15 VN16 Bridge power-amp Φ13-14 Modus Φ15-16 Load resistor RL13, 14 µVrms VNrms 20 Hz … 20 kHz 02,00; 03,00 Vol. 0 1 180 Bit Ph = ‘0’ 1 180 Bit Ph = ‘0’ 1 V13, 14 = 2.5 V; THD < 1 % V15, 16 = 2.5 V; THD < 1 % Bit fan = ‘1’ V13, 14 = 2.5 V; THD < 1 % Bit fan = ‘1’ V15, 16 = 2.5 V; THD < 1 % 1 Sub, X-Sub, X ± 1 1 20 4.5 kΩ 1.5 kΩ RL15, 16 RL13, 14 RL15, 16 DC jump ∆1 bit Semiconductor Group ∆V13 ±4 24 mV 1 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Unit Test Condition Test Circuit max. Analog values apply for measuring on pins 14, 15 and 16. DC jump ∆1 bit ∆V13 ±6 mV 01, 03-01, 04-01, 05-01, 06-01, 07 Input level control 1 DC jump ∆1 bit ∆V13 ± 10 mV 01, 07-01, 08-01, 09-01, 0A-01, 08 Input level control 1 PSRR Power supply Ripple rejection aPSRR13 aPSRR14 70 70 dB dB 1 1 aPSRR15 aPSRR16 70 70 dB dB Vi interf. = 1 Vrms fi interf. = 100 Hz … 20 kHz RG = 220 Ω RG = 220 Ω Measurement CCIR 651 Effective ± 30 mV 1 Zero crossing detector window 1 1 Mute active VQML 0.3 1.5 V 1 Mute inactive VQMH 3 5.5 V 1 Input current IQH IQL 50 100 µA µA 1 1 Design Hints Input resistance R1 R2 R3 R25 R26 R28 Output resistance R13 R14 R15 R16 Semiconductor Group 30 kΩ 70 25 Ω 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Unit max. Test Condition Test Circuit I2C Bus (SCL, SDA) SCL, SDA Edges Rise time tR 1 µs Fall time tF 300 ns 100 kHz Shift Register Clock Pulse SCL Frequency fSCL 0 H pulse width tHigh 4 µs L pulse width tLow 4 µs Set-up time tSUSTA 4 µs Hold time tHDSTA 4 µs Set-up time tSUSTO 4 µs Bus free time tBUF 4 µs Set-up time tSUDAT 250 ns Hold time tHDDAT 1 µs Input voltage VQH VQL 3 5.5 1.5 V 1 Input current IQH IQL 3 50 100 µA µA 1 Start Stop Data Transfer Input SCL, SDA Semiconductor Group 26 04.96 TDA 4350X 3.3 AC/DC Characteristics (cont’d) V10 = 10 V; TA = 25 °C Parameter Symbol Limit Values min. typ. Unit Test Condition Test Circuit V RL = 2.5 kΩ IQL = 3 mA 1 max. Output SDA (open collector) Output voltage VQH VQL 5.5 0.4 Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. Semiconductor Group 27 04.96 TDA 4350X Figure 15 Test Circuit Semiconductor Group 28 04.96 TDA 4350X Application Circuit 1 Figure 16 Bass Loudness Circuitry and Bass Control Resonance Characteristic Semiconductor Group 29 04.96 TDA 4350X Application Circuit 2 Figure 17 Bass/Treble Loudness Circuitry and 1. Order Bass Control Characteristic Semiconductor Group 30 04.96 TDA 4350X Diagram Figure 18 I2C Bus Timing Semiconductor Group 31 04.96 TDA 4350X 4 Package Outlines GPS05123 P-DSO-28-1 (Plastic Dual Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 32 Dimensions in mm 04.96