CD4765_CD4782A.pdf

• MONOLITHIC TEMPERATURE COMPENSATED ZENER REFERENCE CHIPS
CD4765 thru CD4767A
and
CD4770 thru CD4772A
and
CD4775 thru CD4777A
and
CD4780 thru CD4782A
• ALL JUNCTIONS COMPLETELY PROTECTED WITH SILICON DIOXIDE
• 8.5 & 9.1 VOLT NOMINAL ZENER VOLTAGE +5%
• ELECTRICALLY EQUIVALENT TO 1N4765 THRU 1N4772A AND
1N4775 THRU 1N4782A SERIES
• COMPATIBLE WITH ALL WIRE BONDING AND DIE ATTACH TECHNIQUES,
WITH THE EXCEPTION OF SOLDER REFLOW
38
23
MAXIMUM RATINGS
38
Operating Temperature: -65°C to +175°C
Storage Temperature: -65°C to +175°C
TYPE
NUMBER
ZENER
VOLTAGE
vz @ I
ZT
ZENER
TEST
CURRENT
I
ZT
(Note 3)
MAXIMUM
MAXIMUM
VOLTAGE
ZENER
TEMPERATURE
IMPEDANCE
STABILITY
ZZT
³V
ZT
MAXIMUM
(Note 1)
(Note 2)
23
ELECTRICAL CHARACTERISTICS @ 25°C, unless otherwise speci½ed.
TEMPERATURE
EFFECTIVE
RANGE
TEMPERATURE
COEFFICIENT
FIGURE 1
VOLTS
mA
OHMS
mV
CD4765
CD4765A
CD4766
CD4766A
9.1
9.1
9.1
9.1
0.5
0.5
0.5
0.5
350
350
350
350
68
141
34
70
0
-55
0
-55
to
to
to
to
°C
+
+
+
+
75
100
75
100
% / °C
0.01
0.01
0.005
0.005
CD4767
CD4767A
CD4770
CD4770A
9.1
9.1
9.1
9.1
0.5
0.5
1.0
1.0
350
350
200
200
14
28
68
141
0
-55
0
-55
to
to
to
to
+
+
+
+
75
100
75
100
0.002
0.002
0.01
0.01
CD4771
CD4771A
CD4772
CD4772A
9.1
9.1
9.1
9.1
1.0
1.0
1.0
1.0
200
200
200
200
34
70
14
28
0
-55
0
-55
to
to
to
to
+
+
+
+
75
100
75
100
0.005
0.005
0.002
0.002
CD4775
CD4775A
CD4776
CD4776A
8.5
8.5
8.5
8.5
0.5
0.5
0.5
0.5
350
350
350
350
64
132
32
66
0
-55
0
-55
to
to
to
to
+
+
+
+
75
100
75
100
0.01
0.01
0.005
0.005
CD4777
CD4777A
CD4780
CD4780A
8.5
8.5
8.5
8.5
0.5
0.5
1.0
1.0
350
350
200
200
13
26
64
132
0
-55
0
-55
to
to
to
to
+
+
+
+
75
100
75
100
0.002
0.002
0.01
0.01
CD4781
CD4781A
CD4782
CD4782A
8.5
8.5
8.5
8.5
1.0
1.0
1.0
1.0
200
200
200
200
32
66
13
26
0
-55
0
-55
to
to
to
to
+
+
+
+
75
100
75
100
0.005
0.005
0.002
0.002
DESIGN DATA
METALLIZATION:
Top: C (Cathode)...................Al
A (Anode)............. .........Al
Back: ......................................Au
AL THICKNESS............25,000 Å Min
GOLD THICKNESS... .....4,000 Å Min
CHIP THICKNESS............. .....10 Mils
CIRCUIT LAYOUT DATA:
Backside must be electrically
isolated.
Backside is not cathode.
For Zener operation cathode
must be operated positive
with respect to anode.
NOTE 1
Zener impedance is derived by superimposing on lZT A 60Hz rms a.c. current
equal to 10% of lZT.
NOTE 2
The maximum allowable change observed over the entire temperature range i.e.,
the diode voltage will not exceed the speci½ed mV at any discrete temperature
between the established limits, per JEDEC standard No.5.
NOTE 3
Zener voltage range is +5%
6 LAKE STREET, LAWRENCE,
PHONE (978) 620-2600
WEBSITE: http://www.microsemi.com
TOLERANCES: ALL
Dimensions + 2 mils
M A S S A C H U S E T T S 01841
FAX (978) 689-0803
201
CD4765 thru CD4767A thru CD4770 thru CD4772A and
CD4775 thru CD4777A and CD4780 thru CD4782A
1000
ZENER IMPEDANCE ZZT (OHMS)
500
100
50
10
1
2
3
OPERATING CURRENT lZT (mA)
FIGURE 2
ZENER IMPEDANCE
VS.
OPERATING CURRENT
CHANGE IN TEMPERATURE COEFFICIENT ( %/°C)
+.0015
+.0010
+.0005
0
-.0005
-.0010
-.0015
0.5
1.0
1.5
OPERATING CURRENT lZT (mA)
2.0
FIGURE 3
TYPICAL CHANGE OF TEMPERATURE COEFFICIENT
WITH CHANGE IN OPERATING CURRENT
202