RUBBER FEET 4 SCI_2_TO_PMU_V SCI2_EN SCI2_VSENSE SCI_2_PWR_GOOD VDD_FROM_SCI_2 BOARD RUBBER FEET LB1 LB2 BOM C LOGO AFE/SCI_L_I2C_0 AFE/SCI_L_I2C_1 AFE/SCI_L_I2C_SCL AFE/SCI_L_I2C_SDA MAVRK_SCI_2_MOD_IRQ MAVRK_SCI_2_MOD_SEL SCI_2_TO_PMU_V A SCI2_EN SCI2_VSENSE SCI_2_PWR_GOOD SCI_4_TO_PMU_V SCI4_EN SCI4_VSENSE SCI_4_PWR_GOOD SCI_4_TO_PMU_V SCI4_EN SCI4_VSENSE SCI_4_PWR_GOOD 3 MAVRK_SCI_3_MOD_SEL MAVRK_SCI_3_MOD_IRQ MAVRK_PMU SCI1_EN SCI1_VSENSE SCI_1_PWR_GOOD SCI_3_TO_PMU_V SCI3_EN SCI3_VSENSE SCI_3_PWR_GOOD SCI_2_TO_PMU_V SCI2_EN SCI2_VSENSE SCI_2_PWR_GOOD MAVRK_SCI2 AFE/SCI_R_I2C_SCL AFE/SCI_R_I2C_SDA MAVRK_SCI_1_MOD_IRQ MAVRK_SCI_1_MOD_SEL SCI_1_TO_PMU_V SCI_1_TO_PMU_V SCI1_EN SCI1_VSENSE SCI_1_PWR_GOOD MAVRK_AFE_3_MOD_IRQ AFE/SCI_R_I2C_0 AFE/SCI_R_I2C_1 MAVRK_SCI_3_MOD_SEL MAVRK_SCI_3_MOD_IRQ AFE_SCI_1_REFERENCE MAVRK_SCI1 2 MAVRK_AFE_3_MOD_SEL Designer Approval BRIAN SHAFFER Drawn By BRIAN SHAFFER Layout DAWN RITZ Date AFE1_CTS_TO_AFE3_RTS AFE1_RTS_TO_AFE3_CTS Title AFE1_CTS_TO_AFE3_RTS AFE1_RTS_TO_AFE3_CTS MAVRK_AFE_3_MOD_SEL MAVRK_AFE_3_MOD_IRQ MAVRK_SCI_3_MOD_SEL MAVRK_SCI_3_MOD_IRQ AFE/SCI_R_I2C_[0:1] MAVRK_SCI_3_MOD_IRQ MAVRK_SCI_3_MOD_SEL SCI_3_TO_PMU_V SCI3_EN SCI3_VSENSE SCI_3_PWR_GOOD VDD_FROM_SCI_3 MAVRK_SCI3 Size C EDGE No 6517814 Date Wednesday, June 15, 2011 1 AFE_SCI_3_REFERENCE SCI_3_I2S_SDIN_AUX SCI_3_I2S_SDIN SCI_3_I2S_SCK SCI_3_I2S_WS_LRCLK AFE_R_ENABLE_0 AFE_R_ENABLE_1 AFE_R_ENABLE_2 AFE_R_SPI_0 AFE_R_SPI_1 AFE_R_SPI_2 AFE_R_SPI_3 AFE_R_UART_0 AFE_R_UART_1 AFE_R_CAN_0 AFE_R_CAN_1 AFE_R_I2S_3 AFE_R_I2S_2 AFE_R_I2S_1 AFE_R_I2S_0 AFE_R_ENABLE_0 AFE_R_ENABLE_1 AFE_R_ENABLE_2 AFE_R_I2S_3 AFE_R_I2S_2 AFE_R_I2S_0 AFE_R_I2S_3 AFE_R_I2S_2 AFE_R_I2S_1 AFE_R_I2S_0 AFE_R_I2S_1 RF_12C_0 RF_12C_1 RF_UART_3 RF_UART_2 RF_UART_0 RF_UART_1 RF_1_SHUTD_1 RF_1_SHUTD_0 RF_3_SHUTD_1 RF_3_SHUTD_0 RF_3_GPIO_3 RF_3_GPIO_2 RF_SPI_MISO RF_SPI_MOSI RF_SPI_CS RF_SPI_CLK AFE_R_MCLK RF_SPI_MISO RF_SPI_MOSI RF_SPI_CS RF_SPI_CLK RF_UART_CTS RF_UART_RTS RF_UART_RX RF_UART_TX RF_I2C_SDA RF_I2C_SCL RF_SDIO_D[0-3] AFE_R_I2S_SCK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE_R_I2S_WS_LRCLK RF_SDIO_CLK RF_SDIO_CMD RF_LOW_SPEED_CLK AFE_R_MCLK RF_UART_CTS RF_UART_RTS RF_UART_RX RF_UART_TX RF_I2C_SDA RF_I2C_SCL RF_SDIO_D[0-3] RF_SDIO_CLK RF_SDIO_CMD RF_LOW_SPEED_CLK RF_SPI_3 RF_SPI_2 RF_SPI_1 RF_SPI_0 RF_UART_0 RF_UART_1 RF_UART_2 RF_UART_3 RF_SPI_3 RF_SPI_2 RF_SPI_1 RF_SPI_0 RF_UART_0 RF_UART_1 RF_UART_2 RF_UART_3 RF_12C_0 RF_12C_1 RF_SDIO_0 RF_SDIO_1 RF_12C_0 RF_12C_1 RF_SDIO_0 RF_SDIO_1 MB_USB_TO_SER_TX MB_USB_TO_SER_RX RF_1_GPIO_3 RF_1_GPIO_2 RF_SPI_0 RF_SPI_1 RF_SPI_2 RF_SPI_3 AFE_R_I2S_SCK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE_R_I2S_WS_LRCLK MAVRK_RF3 AFE_R_MCLK AFE_R_WRITE_ENABLE AFE_R_READ_ENABLE AFE_R_LATCH_ENABLE AFE_R_SPI_MISO AFE_R_SPI_MOSI AFE_R_SPI_CLK AFE_R_SPI_CS AFE_R_UART_RX AFE_R_UART_TX AFE_R_CAN_RX AFE_R_CAN_TX AFE_R_I2S_SCK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE_R_I2S_WS_LRCLK AFE_R_LATCH_GPIO_[0:15] AFE_R_ANLG_CH_[0:7] AFE_R_LATCH_OUTPUT_nENABLE SCI_3_ANLG_CH_[0:15] SCI_3_GPIO_[0:3] AFE1_TX_TO_AFE3_RX AFE1_RX_TO_AFE3_TX AFE1_TX_TO_AFE3_RX SCI_3_SPI_CLK SCI_3_SPI_MOSI SCI_3_SPI_MISO SCI_3_SPI_CS AFE1_RX_TO_AFE3_TX AFE/SCI_R_I2C_SCL AFE/SCI_R_I2C_SDA AFE_R_MCLK AFE_R_WRITE_ENABLE AFE_R_READ_ENABLE AFE_R_LATCH_ENABLE AFE1_RX_TO_AFE3_TX AFE1_TX_TO_AFE3_RX AFE1_CTS_TO_AFE3_RTS AFE1_RTS_TO_AFE3_CTS AFE_SCI_3_REFERENCE AFE_SCI_1_REFERENCE SCI_1_I2S_SDIN_AUX SCI_1_I2S_SDIN SCI_1_I2S_SCK SCI_1_I2S_WS_LRCLK SCI_1_ANLG_CH_[0:15] SCI_1_GPIO_[0:3] AFE_R_SPI_0 AFE_R_SPI_1 AFE_R_ANLG_CH_[0:7] SCI_3_ANLG_CH_[0:15] MAVRK_SCI_1_MOD_SEL MAVRK_SCI_1_MOD_IRQ AFE_R_SPI_2 AFE_R_LATCH_GPIO_[0-15] SCI_3_GPIO_[0:3] MAVRK_SCI_1_MOD_IRQ AFE_R_SPI_3 AFE_R_CAN_[0:1] AFE/SCI_R_I2C_1 MAVRK_SCI_1_MOD_SEL AFE_R_SPI_MISO AFE_R_SPI_MOSI AFE_R_SPI_CLK AFE_R_SPI_CS AFE_R_CAN_0 AFE_R_CAN_1 AFE/SCI_R_I2C_0 MAVRK_AFE_1_MOD_SEL MAVRK_AFE_1_MOD_IRQ AFE_R_UART_0 AFE_R_UART_[0:1] AFE_SCI_3_REFERENCE MAVRK_SCI_4_MOD_SEL MAVRK_SCI_4_MOD_IRQ AFE_R_UART_0 AFE_R_UART_1 SCI_3_I2S_SDIN_AUX SCI_3_I2S_SDIN SCI_3_I2S_SCK SCI_3_I2S_WS_LRCLK MAVRK_AFE_3_MOD_SEL MAVRK_AFE_3_MOD_IRQ AFE_R_SPI_0 AFE_R_SPI_1 AFE_R_SPI_2 AFE_R_SPI_3 MAVRK_RF_3_GPIO MAVRK_RF_3_IRQ MAVRK_RF_3_MOD_SEL SCI_3_ANLG_CH_[0:15] MAVRK_AFE_4_MOD_SEL MAVRK_AFE_4_MOD_IRQ AFE_R_ENABLE_0 AFE_R_ENABLE_1 AFE_R_ENABLE_2 AFE/SCI_R_I2C_1 MAVRK_SCI_1_MOD_SEL MAVRK_SCI_1_MOD_IRQ MAVRK_AFE_1_MOD_IRQ MAVRK_RF_3_CTRL_2 AFE/SCI_R_I2C_0 MAVRK_SCI_2_MOD_SEL MAVRK_SCI_2_MOD_IRQ RF_I2C_SDA RF_I2C_SCL RF_UART_TX RF_UART_RX RF_UART_RTS RF_UART_CTS RF_SPI_CLK RF_SPI_CS RF_SPI_MOSI RF_SPI_MISO MB_USB_TO_SER_RX RF_12C_0 RF_12C_1 RF_I2C_SDA RF_I2C_SCL 2 SCI_3_GPIO_[0:3] MAVRK_SCI_4_MOD_IRQ MAVRK_AFE_1_MOD_SEL MAVRK_AFE_1_MOD_IRQ MAVRK_AFE_1_MOD_SEL MAVRK_AFE1 AFE_SCI_1_REFERENCE MAVRK_AFE_2_MOD_SEL MAVRK_AFE_2_MOD_IRQ SCI_1_SPI_CLK SCI_1_SPI_MOSI SCI_1_SPI_MISO SCI_1_SPI_CS MAVRK_MCU MAVRK_RF_3_CTRL_1 SCI_3_SPI_CLK SCI_3_SPI_MOSI SCI_3_SPI_MISO SCI_3_SPI_CS MAVRK_SCI_4_MOD_SEL AFE_R_LATCH_OUTPUT_nENABLE MAVRK_RF_3_CTRL_0 AFE/SCI_R_I2C_SCL AFE/SCI_R_I2C_SDA MAVRK_AFE_4_MOD_IRQ AFE_R_MCLK AFE_R_CAN_0 AFE_L_LATCH_OUTPUT_nENABLE MAVRK_RF_3_CTRL_0 MAVRK_RF_3_CTRL_1 MAVRK_RF_3_CTRL_2 AFE_SCI_1_REFERENCE MAVRK_AFE_4_MOD_SEL AFE_L_MCLK MAVRK_RF_1_GPIO MAVRK_RF_1_IRQ MAVRK_RF_1_MOD_SEL SCI_1_I2S_SDIN_AUX SCI_1_I2S_SDIN SCI_1_I2S_SCK SCI_1_I2S_WS_LRCLK MAVRK_SCI_2_MOD_SEL AFE_R_CAN_TX AFE_R_CAN_RX SCI_1_ANLG_CH_[0:15] MAVRK_SCI_2_MOD_IRQ AFE_R_LATCH_ENABLE AFE_R_READ_ENABLE AFE_R_WRITE_ENABLE AFE_R_UART_RX AFE_R_UART_TX AFE_L_LATCH_GPIO_[0-15] AFE_R_I2S_0 AFE_R_I2S_1 AFE_R_I2S_2 AFE_R_I2S_3 SCI_1_ANLG_CH_[0:15] MAVRK_AFE_2_MOD_IRQ MAVRK_RF_3_GPIO MAVRK_RF_3_IRQ MAVRK_RF_3_MOD_SEL SCI_1_GPIO_[0:3] MAVRK_AFE_2_MOD_SEL MCU_USB_DATAMCU_USB_DATA+ 3 SCI_1_GPIO_[0:3] MAVRK_SCI_2_MOD_SEL MAVRK_SCI_2_MOD_IRQ AFE_L_ANLG_CH_[0:7] MAVRK_RF_1_MOD_SEL SCI_1_SPI_CLK SCI_1_SPI_MOSI SCI_1_SPI_MISO SCI_1_SPI_CS MAVRK_AFE_2_MOD_SEL MAVRK_AFE_2_MOD_IRQ AFE_R_UART_TX AFE_R_UART_RX MAVRK_RF_1_IRQ AFE_R_CAN_1 AFE_L_LATCH_OUPUT_nENABLE AFE_L_UART_TX AFE_L_UART_RX MAVRK_RF_1_GPIO AFE_R_UART_1 AFE_L_MCLK AFE_R_I2S_SCK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE_R_I2S_WS_LRCLK AFE/SCI_R_I2C_SCL AFE/SCI_R_I2C_SDA AFE_L_LATCH_GPIO_[0:15] AFE_L_CAN_TX AFE_L_CAN_RX MAVRK_RF_1_GPIO MAVRK_RF_1_IRQ MAVRK_RF_1_MOD_SEL MAVRK_RF1 AFE/SCI_R_I2C_1 AFE_L_CAN_0 AFE_L_CAN_1 AFE_R_SPI_CS AFE_R_SPI_CLK AFE_R_SPI_MOSI AFE_R_SPI_MISO RF_LOW_SPEED_CLK AFE/SCI_R_I2C_1 AFE_L_ANLG_CH_[0:7] AFE_L_SPI_CS AFE_L_SPI_CLK AFE_L_SPI_MOSI AFE_L_SPI_MISO RF_SDIO_0 AFE_R_I2S_3 AFE_L_CAN_[0:1] RF_LOW_SPEED_CLK RF_SDIO_1 AFE_R_CAN_RX AFE_R_CAN_TX AFE_L_UART_0 AFE_L_UART_1 RF_SDIO_D[0:3] AFE/SCI_R_I2C_SCL AFE/SCI_R_I2C_SDA AFE/SCI_R_I2C_0 AFE_L_UART_[0:1] AFE/SCI_R_I2C_0 AFE_L_SPI_[0:3] AFE_L_SPI_0 AFE_L_SPI_1 AFE_L_SPI_2 AFE_L_SPI_3 AFE_L_LATCH_ENABLE AFE_L_READ_ENABLE AFE_L_WRITE_ENABLE RF_SDIO_CMD RF_SDIO_CLK AFE_R_I2S_2 AFE_L_ENABLE_0 AFE_L_ENABLE_1 AFE_L_ENABLE_2 MAVRK_RF_4_GPIO MAVRK_RF_4_IRQ MAVRK_RF_4_MOD_SEL RF_1_SHUTD_0 AFE_R_I2S_1 AFE_R_I2S_0 MAVRK_RF_4_CTRL_0 MAVRK_RF_4_CTRL_1 MAVRK_RF_4_CTRL_2 AFE_L_I2S_SCK AFE_L_I2S_SDIN AFE_L_I2S_SDIN_AUX AFE_L_I2S_WS_LRCLK RF_1_SHUTD_0 RF_1_SHUTD_1 RF_1_GPIO_2 RF_1_GPIO_3 AFE_R_I2S_SCK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE_R_I2S_WS_LRCLK AFE_L_ENABLE_[0:2] MAVRK_RF_2_MOD_SEL MAVRK_RF_2_GPIO MAVRK_RF_2_IRQ MAVRK_RF_2_MOD_SEL MB_USB_TO_SER_TX D RF_3_SHUTD_0 AFE_R_ANLG_CH_[0:7] AFE_L_I2S_0 AFE_L_I2S_1 AFE_L_I2S_2 AFE_L_I2S_3 PORT_EXP RF_3_SHUTD_0 RF_3_SHUTD_1 RF_3_GPIO_2 RF_3_GPIO_3 AFE_R_LATCH_GPIO_[0:15] C MAVRK_RF_2_IRQ MB_USB_DATA+ MAVRK_USB MB_USB_TO_SER_TX MB_USB_TO_SER_RX RF_2_GPIO_3 RF_4_SHUTD_0 RF_4_SHUTD_1 RF_4_GPIO_2 RF_4_GPIO_3 AFE_R_LATCH_OUTPUT_nENABLE MAVRK_RF_4_CTRL_[0:2] MB_USB_DATA- RF_2_GPIO_2 RF_2_SHUTD_0 RF_2_SHUTD_1 RF_2_GPIO_2 RF_2_GPIO_3 PMU_EN PMU_IRQ AFE_L_I2S_[0:3] MAVRK_RF_2_GPIO MCU_USB_DATAMCU_USB_DATA+ RF_2_GPIO_2 RF_2_GPIO_3 RF_2_SHUTD_0 RF_2_SHUTD_1 RF_SDIO_1 RF_SDIO_0 RF_12C_1 RF_12C_0 RF_UART_3 RF_UART_2 RF_UART_1 RF_UART_0 RF_SPI_0 RF_SPI_1 RF_SPI_2 RF_SPI_3 RF_2_SHUTD_1 PMU_IRQ AFE_L_LATCH_OUTPUT_nENABLE MAVRK_RF_2_GPIO MAVRK_RF_2_IRQ MAVRK_RF_2_MOD_SEL RF_LOW_SPEED_CLK AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN_AUX AFE_L_I2S_SDIN AFE_L_I2S_SCK RF_SDIO_CMD RF_SDIO_CLK RF_SDIO_D[0-3] RF_I2C_SCL RF_I2C_SDA RF_UART_TX RF_UART_RX RF_UART_RTS RF_UART_CTS RF_SPI_CLK RF_SPI_CS RF_SPI_MOSI RF_SPI_MISO RF_SDIO_1 RF_SDIO_0 RF_12C_1 RF_12C_0 RF_UART_3 RF_UART_2 RF_UART_1 RF_UART_0 RF_SPI_0 RF_SPI_1 RF_SPI_2 RF_SPI_3 RF_2_SHUTD_0 PMU_EN PMU_IRQ MAVRK_AFE2 AFE_L_LATCH_GPIO_[0:15] AFE_L_ANLG_CH_[0:7] AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN_AUX AFE_L_I2S_SDIN AFE_L_I2S_SCK AFE_L_CAN_TX AFE_L_CAN_RX AFE_L_UART_TX AFE_L_UART_RX AFE_L_SPI_CS AFE_L_SPI_CLK AFE_L_SPI_MOSI AFE_L_SPI_MISO AFE_L_MCLK RF_4_GPIO_2 RF_4_GPIO_3 RF_4_SHUTD_0 RF_4_SHUTD_1 RF_LOW_SPEED_CLK AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN_AUX AFE_L_I2S_SDIN AFE_L_I2S_SCK RF_SDIO_CMD RF_SDIO_CLK RF_SDIO_D[0-3] RF_I2C_SCL RF_I2C_SDA RF_UART_TX RF_UART_RX RF_UART_RTS RF_UART_CTS RF_SPI_CLK RF_SPI_CS RF_SPI_MOSI RF_SPI_MISO 4 PMU_EN AFE/SCI_L_I2C_SDA AFE/SCI_L_I2C_SCL AFE_L_MCLK AFE_L_LATCH_ENABLE AFE_L_READ_ENABLE AFE_L_WRITE_ENABLE AFE_L_CAN_1 AFE_L_CAN_0 AFE_L_UART_1 AFE_L_UART_0 AFE_L_SPI_3 AFE_L_SPI_2 AFE_L_SPI_1 AFE_L_MCLK RF_4_GPIO_3 PMU_I2C_SDA PMU_I2C_SCL PMU_MOD_SEL AFE/SCI_L_I2C_0 AFE/SCI_L_I2C_1 SCI_2_SPI_CS SCI_2_SPI_MISO SCI_2_SPI_MOSI SCI_2_SPI_CLK SCI_2_GPIO_[0:3] SCI_2_ANLG_CH_[0:15] SCI_2_I2S_WS_LRCLK SCI_2_I2S_SCK SCI_2_I2S_SDIN SCI_2_I2S_SDIN_AUX AFE_SCI_2_REFERENCE AFE_L_LATCH_OUTPUT_nENABLE AFE_L_LATCH_GPIO_[0:15] AFE_L_ANLG_CH_[0:7] AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN_AUX AFE_L_I2S_SDIN AFE_L_I2S_SCK AFE_L_CAN_TX AFE_L_CAN_RX AFE_L_UART_TX AFE_L_UART_RX AFE_L_SPI_CS AFE_L_SPI_CLK AFE_L_SPI_MOSI AFE_L_SPI_MISO AFE_L_SPI_0 AFE_L_ENABLE_2 AFE_L_ENABLE_1 AFE_L_ENABLE_0 RF_4_GPIO_2 PMU_MOD_SEL SCI_2_GPIO_[0:3] SCI_2_ANLG_CH_[0:15] AFE_SCI_2_REFERENCE AFE/SCI_L_I2C_SDA AFE/SCI_L_I2C_SCL SCI_4_SPI_CS SCI_4_SPI_MISO SCI_4_SPI_MOSI SCI_4_SPI_CLK SCI_4_GPIO_[0:3] SCI_4_ANLG_CH_[0:15] AFE_L_MCLK AFE_L_LATCH_ENABLE AFE_L_READ_ENABLE AFE_L_WRITE_ENABLE RF_4_SHUTD_1 PMU_I2C_SCL PMU_I2C_SDA AFE/SCI_L_I2C_SDA AFE/SCI_L_I2C_SCL SCI_2_SPI_CS SCI_2_SPI_MISO SCI_2_SPI_MOSI SCI_2_SPI_CLK SCI_2_GPIO_[0:3] SCI_2_ANLG_CH_[0:15] SCI_2_I2S_WS_LRCLK SCI_2_I2S_SCK SCI_2_I2S_SDIN SCI_2_I2S_SDIN_AUX AFE_SCI_2_REFERENCE SCI_4_GPIO_[0:3] SCI_4_I2S_WS_LRCLK SCI_4_I2S_SCK SCI_4_I2S_SDIN SCI_4_I2S_SDIN_AUX AFE_SCI_4_REFERENCE RF_4_SHUTD_0 PMU_I2C_SDA PMU_I2C_SCL PMU_MOD_SEL AFE/SCI_L_I2C_SDA AFE/SCI_L_I2C_SCL SCI_4_SPI_CS SCI_4_SPI_MISO SCI_4_SPI_MOSI SCI_4_SPI_CLK SCI_4_GPIO_[0:3] SCI_4_ANLG_CH_[0:15] SCI_4_ANLG_CH_[0:15] AFE/SCI_L_I2C_0 SO8 AFE/SCI_L_I2C_1 RUBBER FEET SO7 AFE_L_I2S_0 RUBBER FEET SO6 AFE_L_I2S_1 RUBBER FEET SO5 AFE_L_I2S_2 RUBBER FEET AFE_L_I2S_0 SO4 AFE_L_I2S_3 SO3 MAVRK_RF2 AFE_L_I2S_1 SO2 MAVRK_RF_4_CTRL_0 AFE_L_I2S_2 SO1 AFE2_CTS_TO_AFE4_RTS AFE2_RTS_TO_AFE4_CTS AFE2_TX_TO_AFE4_RX AFE2_RX_TO_AFE4_TX AFE_L_CAN_1 MAVRK_SCI4 AFE_L_CAN_0 AFE/SCI_L_I2C_[0:1] AFE_L_UART_1 SCI4_EN SCI4_VSENSE SCI_4_PWR_GOOD VDD_FROM_SCI_4 AFE2_RX_TO_AFE4_TX AFE_L_UART_0 SCI_4_TO_PMU_V AFE2_TX_TO_AFE4_RX AFE_L_SPI_3 MAVRK_SCI_4_MOD_IRQ MAVRK_SCI_4_MOD_SEL AFE2_RTS_TO_AFE4_CTS AFE_L_SPI_2 MAVRK_SCI_4_MOD_SEL MAVRK_SCI_4_MOD_IRQ AFE2_CTS_TO_AFE4_RTS AFE_L_SPI_1 MAVRK_AFE_4_MOD_SEL MAVRK_AFE_4_MOD_IRQ MAVRK_RF_4_CTRL_2 AFE_L_SPI_0 AFE2_CTS_TO_AFE4_RTS AFE2_RTS_TO_AFE4_CTS AFE2_TX_TO_AFE4_RX AFE2_RX_TO_AFE4_TX MAVRK_RF_4_CTRL_1 AFE_L_ENABLE_2 AFE_SCI_4_REFERENCE MAVRK_RF_4_GPIO MAVRK_RF_4_IRQ MAVRK_RF_4_MOD_SEL AFE_L_ENABLE_1 RUBBER FEET AFE_L_ENABLE_0 AFE_L_I2S_0 AFE_L_I2S_1 AFE_L_I2S_2 MAVRK_AFE4 AFE_L_I2S_3 AFE_L_I2S_0 AFE_L_I2S_3 5 AFE_L_I2S_1 RUBBER FEET AFE/SCI_L_I2C_0 AFE/SCI_L_I2C_1 RUBBER FEET AFE/SCI_L_I2C_0 SCI_4_I2S_WS_LRCLK SCI_4_I2S_SCK SCI_4_I2S_SDIN SCI_4_I2S_SDIN_AUX MAVRK_RF4 AFE_L_I2S_2 AFE_L_I2S_3 B AFE/SCI_L_I2C_1 AFE_SCI_4_REFERENCE 5 1 RF_3_SHUTD_1 RF_3_GPIO_2 RF_3_GPIO_3 RF_1_SHUTD_1 RF_1_GPIO_2 RF_1_GPIO_3 RF_SPI_[0:3] RF_UART_[0:3] RF_I2C_[0:1] RF_SDIO_D[0:3] RF_SDIO_[0:1] RF_LOW_SPEED_CLK D AFE_R_I2S_[0:3] MAVRK_RF_3_CTRL_[0:2] AFE_R_ENABLE_[0:2] C AFE_R_SPI_[0:3] AFE_R_ANLG_CH_[0:7] AFE_R_MCLK AFE_R_LATCH_GPIO_[0:15] AFE_R_LATCH_OUPUT_nENABLE MAVRK_AFE3 SCI_3_TO_PMU_V SCI3_EN SCI3_VSENSE SCI_3_PWR_GOOD MB-PRO-MVK Rev E Sheet 1 of 19 B SCI_1_TO_PMU_V SCI1_EN SCI1_VSENSE SCI_1_PWR_GOOD A 5 4 3 2 1 JTAG INTERFACE DVDD_3_3V PG_USB_SERIAL_IRQ J1 JTAG DVDD_3_3V R223 10K 1 3 5 7 9 11 13 MCU_CON_1 1 D RF_LOW_SPEED_CLK MAVRK_RF_4_MOD_SEL MAVRK_RF_4_IRQ MAVRK_RF_4_GPIO P1^,11..14 P1^,14 P1^,14 P1^,14 C P1^,4 P1^,4,8 P1^,6 P1^,6,10 P1^,4,6 P1^,4,6 P1^,4,6 P1^,4,6 MAVRK_AFE_2_MOD_SEL MAVRK_SCI_2_MOD_SEL MAVRK_AFE_4_MOD_SEL MAVRK_SCI_4_MOD_SEL AFE_L_LATCH_ENABLE AFE_L_READ_ENABLE AFE_L_WRITE_ENABLE AFE_L_LATCH_OUTPUT_nENABLE * P1^,4,6,12,14 P1^,4,6,12,14 P1^,4,6,12,14 P1^,4,6,12,14 P1^,4,6,8,10 P1^,4,6 B AFE_L_I2S_SCK AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN AFE_L_I2S_SDIN_AUX AFE/SCI_L_I2C_SDA AFE_L_LATCH_GPIO_1 AFE_L_LATCH_GPIO_3 AFE_L_LATCH_GPIO_5 AFE_L_LATCH_GPIO_7 AFE_L_LATCH_GPIO_9 AFE_L_LATCH_GPIO_11 AFE_L_LATCH_GPIO_13 AFE_L_LATCH_GPIO_15 AFE_L_LATCH_GPIO_[0-15] AFE_L_ANLG_CH_[0:7] P1^,4,6 AFE1_TO_SCI1_REF- AFE_L_MCLK P1^,4,6,12,14 AFE_L_ANLG_CH_1 AFE_L_ANLG_CH_3 AFE_L_ANLG_CH_5 AFE_L_ANLG_CH_7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 105 107 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 109 111 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 GND GND GND GND 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 GND GND GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 106 108 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 DNI 47K R2 JTAG_TEST JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK JTAG_RESET EEPROM U1 MB_USB_TO_SER_TX MB_USB_TO_SER_RX MCU_MON_2 1 2 3 4 P1^,18 P1^,18 A0 A1 A2 VSS VCC WP SCL SDA 8 7 6 5 P1^,11..14 P1^,11..14 P1^,11..14 P1^,11..14 C2 0.1uF 10V R1 R3 P1^,11 P1^,11 P1^,11 33 33 P1^,15 128K I2C EEPROM M24128-BWMN6TP ADDR is 1010000x P1^,15 P1^,15 N/C MAVRK_AFE_2_MOD_IRQ MAVRK_SCI_2_MOD_IRQ MAVRK_AFE_4_MOD_IRQ MAVRK_SCI_4_MOD_IRQ AFE_L_UART_TX AFE_L_UART_RX AFE_L_CAN_TX AFE_L_CAN_RX AFE1_TO_SCI1_REF+ P1^,18 P1^,18 DVDD_3_3V P1^,12 P1^,12 P1^,12 P1^,4 P1^,4,8 P1^,6 P1^,6,10 P1^,4,6 P1^,4,6 P1^,4,6 P1^,4,6 P1^,3 P1^,3,7 P1^,5 P1^,5,9 P1^,3,5 P1^,3,5 P1^,3,5 P1^,3,5 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 MCU_USB_DATA+ MCU_USB_DATARF_SPI_CS RF_SPI_CLK RF_SPI_MOSI RF_SPI_MISO MAVRK_RF_1_MOD_SEL MAVRK_RF_1_IRQ MAVRK_RF_1_GPIO PMU_I2C_SCL PMU_I2C_SDA PMU_EN N/C MCU_MON_1 MAVRK_AFE_1_MOD_SEL MAVRK_SCI_1_MOD_SEL MAVRK_AFE_3_MOD_SEL MAVRK_SCI_3_MOD_SEL AFE_R_LATCH_ENABLE AFE_R_READ_ENABLE AFE_R_WRITE_ENABLE AFE_R_LATCH_OUTPUT_nENABLE 105 107 * AFE_L_SPI_CS AFE_L_SPI_CLK AFE_L_SPI_MOSI AFE_L_SPI_MISO AFE/SCI_L_I2C_SCL P1^,4,6 P1^,4,6 P1^,4,6 P1^,4,6 P1^,4,6,8,10 AFE_L_LATCH_GPIO_0 AFE_L_LATCH_GPIO_2 AFE_L_LATCH_GPIO_4 AFE_L_LATCH_GPIO_6 AFE_L_LATCH_GPIO_8 AFE_L_LATCH_GPIO_10 AFE_L_LATCH_GPIO_12 AFE_L_LATCH_GPIO_14 P1^,3,5,11,13 P1^,3,5,11,13 P1^,3,5,11,13 P1^,3,5,11,13 P1^,3,5,7,9 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 AFE_R_I2S_SCK AFE_R_I2S_WS_LRCLK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE/SCI_R_I2C_SDA AFE_R_LATCH_GPIO_1 AFE_R_LATCH_GPIO_3 AFE_R_LATCH_GPIO_5 AFE_R_LATCH_GPIO_7 AFE_R_LATCH_GPIO_9 AFE_R_LATCH_GPIO_11 AFE_R_LATCH_GPIO_13 AFE_R_LATCH_GPIO_15 P1^,3,5 AFE_R_LATCH_GPIO_[0-15] AFE_L_ANLG_CH_0 AFE_L_ANLG_CH_2 AFE_L_ANLG_CH_4 AFE_L_ANLG_CH_6 AFE_SCI_1_REFERENCE MCU_CON_2 D C1 2200pF DNI MAVRK_RF_2_MOD_SEL MAVRK_RF_2_IRQ MAVRK_RF_2_GPIO VDD_CORE R224 10K 2 RF_I2C_SCL RF_I2C_SDA RF_UART_TX RF_UART_RX RF_UART_CTS RF_UART_RTS P1^,11..14,19 P1^,11..14,19 P1^,11..14 P1^,11..14 P1^,11..14 P1^,11..14 DVDD_3_3V 2 4 6 8 10 12 14 P1^,3,5 AFE_R_ANLG_CH_[0:7] AFE_R_ANLG_CH_1 AFE_R_ANLG_CH_3 AFE_R_ANLG_CH_5 AFE_R_ANLG_CH_7 N/C MCU_MON_3 P1^,3,7 110 112 109 111 2x52 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 GND GND GND GND 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 GND GND GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 106 108 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 RF_SDIO_D0 RF_SDIO_D1 RF_SDIO_D2 RF_SDIO_D3 RF_SDIO_D[0:3] P1^,11..14 RF_SDIO_CLK RF_SDIO_CMD P1^,11..14 P1^,11..14 MAVRK_RF_3_MOD_SEL MAVRK_RF_3_IRQ MAVRK_RF_3_GPIO P1^,13 P1^,13 P1^,13 PMU_MOD_SEL PMU_IRQ MAVRK_AFE_1_MOD_IRQ MAVRK_SCI_1_MOD_IRQ MAVRK_AFE_3_MOD_IRQ MAVRK_SCI_3_MOD_IRQ AFE_R_UART_TX AFE_R_UART_RX AFE_R_CAN_TX AFE_R_CAN_RX P1^,15 P1^,15 P1^,3 P1^,3,7 P1^,5 P1^,5,9 P1^,3,5 P1^,3,5 P1^,3,5 P1^,3,5 C AVDD_5_5V AFE_R_SPI_CS AFE_R_SPI_CLK AFE_R_SPI_MOSI AFE_R_SPI_MISO AFE/SCI_R_I2C_SCL P1^,3,5 P1^,3,5 P1^,3,5 P1^,3,5 P1^,3,5,7,9 AFE_R_LATCH_GPIO_0 AFE_R_LATCH_GPIO_2 AFE_R_LATCH_GPIO_4 AFE_R_LATCH_GPIO_6 AFE_R_LATCH_GPIO_8 AFE_R_LATCH_GPIO_10 AFE_R_LATCH_GPIO_12 AFE_R_LATCH_GPIO_14 B AFE_R_MCLK P1^,3,5,11,13 AFE_R_ANLG_CH_0 AFE_R_ANLG_CH_2 AFE_R_ANLG_CH_4 AFE_R_ANLG_CH_6 110 112 MCU SLOT (PG 1 of 1) 2x52 A A Title * AFE TO SCI REFERENCE (+/-) IS ONLY AVAILABLE IN SLOT 1 Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet 2 of 19 1 5 4 3 AFE_R_LATCH_OUTPUT_nENABLE 2 1 P1^,2,5 AFE_R_LATCH_GPIO_[0:15] P1^,2,5 AFE1_CTS_TO_AFE3_RTS AFE1_RX_TO_AFE3_TX AFE1_RTS_TO_AFE3_CTS AFE1_TX_TO_AFE3_RX P1^,5 P1^,5 P1^,5 P1^,5 AFE_R_UART_TX AFE_R_UART_RX AFE_R_CAN_TX AFE_R_CAN_RX P1^,2,5 P1^,2,5 P1^,2,5 P1^,2,5 D AFE_R_LATCH_GPIO_1 AFE_R_LATCH_GPIO_3 AFE_R_LATCH_GPIO_5 AFE_R_LATCH_GPIO_7 AFE_R_LATCH_GPIO_9 AFE_R_LATCH_GPIO_11 AFE_R_LATCH_GPIO_13 AFE_R_LATCH_GPIO_15 R4 R5 R6 R7 R8 R9 R10 R11 200K 200K 200K 200K 200K 200K 200K 200K D AFE_R_LATCH_ENABLE AFE_R_READ_ENABLE AFE_R_WRITE_ENABLE P1^,2,5 P1^,2,5 P1^,2,5 C GREEN D1 P1^,7 54 56 GND GND R12 R13 R14 R15 R16 R17 R18 R19 200K 200K 200K 200K 200K 200K 200K 200K C R20 P1^,2 MAVRK_AFE_1_MOD_SEL P1^,2,7 MAVRK_SCI_1_MOD_SEL P1^,2 MAVRK_AFE_1_MOD_IRQ P1^,2,7 MAVRK_SCI_1_MOD_IRQ SCI_1_GPIO_[0:3] B 2.2K N/C AFE_R_LATCH_GPIO_14 AFE_R_LATCH_GPIO_12 AFE_R_LATCH_GPIO_10 AFE_R_LATCH_GPIO_8 AFE_R_LATCH_GPIO_6 AFE_R_LATCH_GPIO_4 AFE_R_LATCH_GPIO_2 AFE_R_LATCH_GPIO_0 AFE/SCI_R_I2C_SCL AFE_R_SPI_CS AFE_R_SPI_CLK AFE_R_SPI_MOSI AFE_R_SPI_MISO P1^,2,5,7,9 P1^,2,5 P1^,2,5 P1^,2,5 P1^,2,5 AFE1_SEL AFE_1_MON_2 AFE_R_I2S_SCK AFE_R_I2S_WS_LRCLK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE/SCI_R_I2C_SDA P1^,2,5,11,13 P1^,2,5,11,13 P1^,2,5,11,13 P1^,2,5,11,13 P1^,2,5,7,9 53 55 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 AFE1_CON_1 2x26 QRF8-026-05.0-L-D-A GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 DVDD_3_3V AFE_R_ANLG_CH_0 AFE_R_ANLG_CH_1 AFE_R_ANLG_CH_2 AFE_R_ANLG_CH_3 AFE_R_ANLG_CH_4 AFE_R_ANLG_CH_5 AFE_R_ANLG_CH_6 AFE_R_ANLG_CH_7 AFE_R_ANLG_CH_[0:7] P1^,2,5 AVDD_5_5V AFE1_TO_SCI1_REF+ AFE1_TO_SCI1_REF- SCI_1_GPIO_0 SCI_1_GPIO_1 SCI_1_GPIO_2 SCI_1_GPIO_3 N/C AFE1_TO_SCI1_ANLG_VSS AFE1_TO_SCI1_ANLG_VDD AFE_1_MON_1 B 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 AFE_R_MCLK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 P1^,2,5,11,13 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 AFE1_CON_2 2x30 ERF5-30-05.0-L-DV-K AFE_SCI_1_REFERENCE P1^,7 P1^,7 P1^,7 P1^,7 P1^,7 A P1^,7 P1^,7 P1^,7 P1^,7 SCI_1_ANLG_CH_15 SCI_1_ANLG_CH_14 SCI_1_ANLG_CH_13 SCI_1_ANLG_CH_12 SCI_1_ANLG_CH_11 SCI_1_ANLG_CH_10 SCI_1_ANLG_CH_9 SCI_1_ANLG_CH_8 SCI_1_ANLG_CH_7 SCI_1_ANLG_CH_6 SCI_1_ANLG_CH_5 SCI_1_ANLG_CH_4 SCI_1_ANLG_CH_3 SCI_1_ANLG_CH_2 SCI_1_ANLG_CH_1 SCI_1_ANLG_CH_0 SCI_1_I2S_SDIN_AUX SCI_1_I2S_SDIN SCI_1_I2S_WS_LRCLK SCI_1_I2S_SCK SCI_1_SPI_CS SCI_1_SPI_CLK SCI_1_SPI_MOSI SCI_1_SPI_MISO AFE SLOT 1 (PG 1 of 1) A Title SCI_1_ANLG_CH_[0:15] Size B P1^,7 MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet 3 of 19 1 5 4 3 AFE_L_LATCH_OUTPUT_nENABLE AFE2_CTS_TO_AFE4_RTS AFE2_RX_TO_AFE4_TX AFE2_RTS_TO_AFE4_CTS AFE2_TX_TO_AFE4_RX P1^,6 P1^,6 P1^,6 P1^,6 D AFE_L_LATCH_GPIO_1 AFE_L_LATCH_GPIO_3 AFE_L_LATCH_GPIO_5 AFE_L_LATCH_GPIO_7 AFE_L_LATCH_GPIO_9 AFE_L_LATCH_GPIO_11 AFE_L_LATCH_GPIO_13 AFE_L_LATCH_GPIO_15 1 P1^,2,6 AFE_L_LATCH_GPIO_[0:15] AFE_L_UART_TX AFE_L_UART_RX AFE_L_CAN_TX AFE_L_CAN_RX P1^,2,6 P1^,2,6 P1^,2,6 P1^,2,6 2 R21 R22 R23 R24 R25 R26 R27 R28 P1^,2,6 200K 200K 200K 200K 200K 200K 200K 200K D AFE_L_LATCH_ENABLE AFE_L_READ_ENABLE AFE_L_WRITE_ENABLE P1^,2,6 P1^,2,6 P1^,2,6 C D2 2.2K 54 56 GND GND MAVRK_SCI_2_MOD_SEL MAVRK_AFE_2_MOD_IRQ P1^,2 MAVRK_SCI_2_MOD_IRQ P1^,2,8 P1^,8 200K 200K 200K 200K 200K 200K 200K 200K AFE_L_ANLG_CH_0 AFE_L_ANLG_CH_1 AFE_L_ANLG_CH_2 AFE_L_ANLG_CH_3 AFE_L_ANLG_CH_4 AFE_L_ANLG_CH_5 AFE_L_ANLG_CH_6 AFE_L_ANLG_CH_7 MAVRK_AFE_2_MOD_SEL P1^,2,8 B R29 R30 R31 R32 R33 R34 R35 R36 C R37 P1^,2 SCI_2_GPIO_[0:3] N/C AFE_L_LATCH_GPIO_14 AFE_L_LATCH_GPIO_12 AFE_L_LATCH_GPIO_10 AFE_L_LATCH_GPIO_8 AFE_L_LATCH_GPIO_6 AFE_L_LATCH_GPIO_4 AFE_L_LATCH_GPIO_2 AFE_L_LATCH_GPIO_0 AFE/SCI_L_I2C_SCL AFE_L_SPI_CS AFE_L_SPI_CLK AFE_L_SPI_MOSI AFE_L_SPI_MISO P1^,2,6,8,10 P1^,2,6 P1^,2,6 P1^,2,6 P1^,2,6 GREEN AFE2_SEL AFE_2_MON_2 AFE_L_I2S_SCK AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN AFE_L_I2S_SDIN_AUX AFE/SCI_L_I2C_SDA P1^,2,6,12,14 P1^,2,6,12,14 P1^,2,6,12,14 P1^,2,6,12,14 P1^,2,6,8,10 53 55 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 AFE2_CON_1 2x26 QRF8-026-05.0-L-D-A GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 DVDD_3_3V AFE_L_ANLG_CH_[0:7] P1^,2,6 AVDD_5_5V AFE2_TO_SCI2_REF+ AFE2_TO_SCI2_REF- SCI_2_GPIO_0 SCI_2_GPIO_1 SCI_2_GPIO_2 SCI_2_GPIO_3 B AFE_2_MON_1 N/C AFE2_TO_SCI2_ANLG_VSS AFE2_TO_SCI2_ANLG_VDD AFE_L_MCLK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 P1^,2,6,12,14 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 AFE2_CON_2 2x30 ERF5-30-05.0-L-DV-K P1^,8 A AFE_SCI_2_REFERENCE P1^,8 P1^,8 P1^,8 P1^,8 P1^,8 P1^,8 P1^,8 P1^,8 SCI_2_ANLG_CH_15 SCI_2_ANLG_CH_14 SCI_2_ANLG_CH_13 SCI_2_ANLG_CH_12 SCI_2_ANLG_CH_11 SCI_2_ANLG_CH_10 SCI_2_ANLG_CH_9 SCI_2_ANLG_CH_8 SCI_2_ANLG_CH_7 SCI_2_ANLG_CH_6 SCI_2_ANLG_CH_5 SCI_2_ANLG_CH_4 SCI_2_ANLG_CH_3 SCI_2_ANLG_CH_2 SCI_2_ANLG_CH_1 SCI_2_ANLG_CH_0 SCI_2_I2S_SDIN_AUX SCI_2_I2S_SDIN SCI_2_I2S_WS_LRCLK SCI_2_I2S_SCK SCI_2_SPI_CS SCI_2_SPI_CLK SCI_2_SPI_MOSI SCI_2_SPI_MISO AFE SLOT 2 (PG 1 of 1) A Title SCI_2_ANLG_CH_[0:15] Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 E P1^,8 2 Sheet 4 of 19 1 5 4 3 AFE_R_LATCH_OUTPUT_nENABLE AFE1_CTS_TO_AFE3_RTS AFE1_RX_TO_AFE3_TX AFE1_RTS_TO_AFE3_CTS AFE1_TX_TO_AFE3_RX P1^,3 P1^,3 P1^,3 P1^,3 D P1..3 AFE_R_LATCH_GPIO_[0:15] 1 P1..3 AFE_R_LATCH_GPIO_1 AFE_R_LATCH_GPIO_3 AFE_R_LATCH_GPIO_5 AFE_R_LATCH_GPIO_7 AFE_R_LATCH_GPIO_9 AFE_R_LATCH_GPIO_11 AFE_R_LATCH_GPIO_13 AFE_R_LATCH_GPIO_15 AFE_R_UART_TX AFE_R_UART_RX AFE_R_CAN_TX AFE_R_CAN_RX P1..3 P1..3 P1..3 P1..3 2 D AFE_R_LATCH_ENABLE AFE_R_READ_ENABLE AFE_R_WRITE_ENABLE P1..3 P1..3 P1..3 C D3 2.2K 54 56 GND GND MAVRK_SCI_3_MOD_SEL MAVRK_AFE_3_MOD_IRQ P1^,2 MAVRK_SCI_3_MOD_IRQ P1^,2,9 P1..3 N/C AFE3_TO_SCI3_ANLG_VSS AFE3_TO_SCI3_ANLG_VDD AFE_3_MON_1 B AFE_R_MCLK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 P1..3,11,13 AFE_R_ANLG_CH_[0:7] AVDD_5_5V AFE3_TO_SCI3_REF+ AFE3_TO_SCI3_REF- SCI_3_GPIO_0 SCI_3_GPIO_1 SCI_3_GPIO_2 SCI_3_GPIO_3 P1^,9 AFE_R_ANLG_CH_0 AFE_R_ANLG_CH_1 AFE_R_ANLG_CH_2 AFE_R_ANLG_CH_3 AFE_R_ANLG_CH_4 AFE_R_ANLG_CH_5 AFE_R_ANLG_CH_6 AFE_R_ANLG_CH_7 MAVRK_AFE_3_MOD_SEL P1^,2,9 B C R38 AFE3_SEL P1^,2 SCI_3_GPIO_[0:3] N/C AFE_R_LATCH_GPIO_14 AFE_R_LATCH_GPIO_12 AFE_R_LATCH_GPIO_10 AFE_R_LATCH_GPIO_8 AFE_R_LATCH_GPIO_6 AFE_R_LATCH_GPIO_4 AFE_R_LATCH_GPIO_2 AFE_R_LATCH_GPIO_0 AFE/SCI_R_I2C_SCL AFE_R_SPI_CS AFE_R_SPI_CLK AFE_R_SPI_MOSI AFE_R_SPI_MISO P1..3,7,9 P1..3 P1..3 P1..3 P1..3 GREEN AFE_3_MON_2 AFE_R_I2S_SCK AFE_R_I2S_WS_LRCLK AFE_R_I2S_SDIN AFE_R_I2S_SDIN_AUX AFE/SCI_R_I2C_SDA P1..3,11,13 P1..3,11,13 P1..3,11,13 P1..3,11,13 P1..3,7,9 53 55 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 AFE3_CON_1 2x26 QRF8-026-05.0-L-D-A GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 DVDD_3_3V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 AFE3_CON_2 2x30 ERF5-30-05.0-L-DV-K AFE_SCI_3_REFERENCE P1^,9 P1^,9 P1^,9 P1^,9 P1^,9 A P1^,9 P1^,9 P1^,9 P1^,9 SCI_3_ANLG_CH_15 SCI_3_ANLG_CH_14 SCI_3_ANLG_CH_13 SCI_3_ANLG_CH_12 SCI_3_ANLG_CH_11 SCI_3_ANLG_CH_10 SCI_3_ANLG_CH_9 SCI_3_ANLG_CH_8 SCI_3_ANLG_CH_7 SCI_3_ANLG_CH_6 SCI_3_ANLG_CH_5 SCI_3_ANLG_CH_4 SCI_3_ANLG_CH_3 SCI_3_ANLG_CH_2 SCI_3_ANLG_CH_1 SCI_3_ANLG_CH_0 SCI_3_I2S_SDIN_AUX SCI_3_I2S_SDIN SCI_3_I2S_WS_LRCLK SCI_3_I2S_SCK SCI_3_SPI_CS SCI_3_SPI_CLK SCI_3_SPI_MOSI SCI_3_SPI_MISO AFE SLOT 3 (PG 1 of 1) A Title SCI_3_ANLG_CH_[0:15] Size B P1^,9 MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet 5 of 19 1 5 4 3 AFE_L_LATCH_OUTPUT_nENABLE AFE2_CTS_TO_AFE4_RTS AFE2_RX_TO_AFE4_TX AFE2_RTS_TO_AFE4_CTS AFE2_TX_TO_AFE4_RX P1^,4 P1^,4 P1^,4 P1^,4 D 1 P1^,2,4 AFE_L_LATCH_GPIO_[0:15] P1^,2,4 AFE_L_LATCH_GPIO_1 AFE_L_LATCH_GPIO_3 AFE_L_LATCH_GPIO_5 AFE_L_LATCH_GPIO_7 AFE_L_LATCH_GPIO_9 AFE_L_LATCH_GPIO_11 AFE_L_LATCH_GPIO_13 AFE_L_LATCH_GPIO_15 AFE_L_UART_TX AFE_L_UART_RX AFE_L_CAN_TX AFE_L_CAN_RX P1^,2,4 P1^,2,4 P1^,2,4 P1^,2,4 2 D AFE_L_LATCH_ENABLE AFE_L_READ_ENABLE AFE_L_WRITE_ENABLE P1^,2,4 P1^,2,4 P1^,2,4 C D4 2.2K 54 56 MAVRK_AFE_4_MOD_IRQ P1^,2 MAVRK_SCI_4_MOD_IRQ P1^,2,10 SCI_4_GPIO_[0:3] B P1^,2,4 N/C AFE4_TO_SCI4_ANLG_VSS AFE4_TO_SCI4_ANLG_VDD AFE_4_MON_1 B AFE_L_MCLK 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 P1^,2,4,12,14 AFE_L_ANLG_CH_[0:7] AVDD_5_5V AFE4_TO_SCI4_REF+ AFE4_TO_SCI4_REF- SCI_4_GPIO_0 SCI_4_GPIO_1 SCI_4_GPIO_2 SCI_4_GPIO_3 P1^,10 GND GND MAVRK_AFE_4_MOD_SEL MAVRK_SCI_4_MOD_SEL P1^,2,10 C AFE_L_ANLG_CH_0 AFE_L_ANLG_CH_1 AFE_L_ANLG_CH_2 AFE_L_ANLG_CH_3 AFE_L_ANLG_CH_4 AFE_L_ANLG_CH_5 AFE_L_ANLG_CH_6 AFE_L_ANLG_CH_7 R39 P1^,2 N/C AFE_L_LATCH_GPIO_14 AFE_L_LATCH_GPIO_12 AFE_L_LATCH_GPIO_10 AFE_L_LATCH_GPIO_8 AFE_L_LATCH_GPIO_6 AFE_L_LATCH_GPIO_4 AFE_L_LATCH_GPIO_2 AFE_L_LATCH_GPIO_0 AFE/SCI_L_I2C_SCL AFE_L_SPI_CS AFE_L_SPI_CLK AFE_L_SPI_MOSI AFE_L_SPI_MISO P1^,2,4,8,10 P1^,2,4 P1^,2,4 P1^,2,4 P1^,2,4 GREEN AFE4_SEL AFE_4_MON_2 AFE_L_I2S_SCK AFE_L_I2S_WS_LRCLK AFE_L_I2S_SDIN AFE_L_I2S_SDIN_AUX AFE/SCI_L_I2C_SDA P1^,2,4,12,14 P1^,2,4,12,14 P1^,2,4,12,14 P1^,2,4,12,14 P1^,2,4,8,10 53 55 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 AFE4_CON_1 2x26 QRF8-026-05.0-L-D-A GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 DVDD_3_3V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 AFE4_CON_2 2x30 ERF5-30-05.0-L-DV-K P1^,6 AFE_SCI_4_REFERENCE P1^,10 P1^,10 P1^,10 P1^,10 A P1^,10 P1^,10 P1^,10 P1^,10 SCI_4_ANLG_CH_15 SCI_4_ANLG_CH_14 SCI_4_ANLG_CH_13 SCI_4_ANLG_CH_12 SCI_4_ANLG_CH_11 SCI_4_ANLG_CH_10 SCI_4_ANLG_CH_9 SCI_4_ANLG_CH_8 SCI_4_ANLG_CH_7 SCI_4_ANLG_CH_6 SCI_4_ANLG_CH_5 SCI_4_ANLG_CH_4 SCI_4_ANLG_CH_3 SCI_4_ANLG_CH_2 SCI_4_ANLG_CH_1 SCI_4_ANLG_CH_0 SCI_4_I2S_SDIN_AUX SCI_4_I2S_SDIN SCI_4_I2S_WS_LRCLK SCI_4_I2S_SCK SCI_4_SPI_CS SCI_4_SPI_CLK SCI_4_SPI_MOSI SCI_4_SPI_MISO AFE SLOT 4 (PG 1 of 1) A Title MB-PRO-MVK SCI_4_ANLG_CH_[0:15] Size B P1^,10 EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet 6 of 19 1 5 4 3 2 1 SCI_1_ANLG_CH_[0:15] AUX/GND/VSS/VDD D AFE1_TO_SCI1_ANLG_VDD 2A 2B SCI_1_SPI_MISO SCI_1_SPI_MOSI SCI_1_SPI_CLK SCI_1_SPI_CS P1^,3 P1^,3 P1^,3 P1^,3 3A 3B 4A 4B SCI_1_I2S_SCK SCI_1_I2S_WS_LRCLK SCI_1_I2S_SDIN SCI_1_I2S_SDIN_AUX P1^,3 P1^,3 P1^,3 P1^,3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 1x4 TERM BLK 1770908 (FROM SCI CONNECTOR) D5 B350A-13-F SCI_1_TO_PMU_VIN 1 2 S 2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 CSD17313Q2 1 2 SCI_1_DVDD_3_3_MON 2 8 6 VDD_FROM_SCI_1 SCI_1_TO_PMU_VIN (TO OVER VOLTAGE PROTECTION) VDD_AUX_1 P1^,3 C5 0.1uF 10V 6D 6E 6F 6 6 6 6A 6B 6C SCI_1_TO_PMU_VIN 1 2 3 6 R51 22.1K Set for 5.0A (4.602 - 5.331A) C6 1uF 10V 4 5 S TPS2557DRB 5 1 9 (4.5-6V) S ILIM FAULT GND EN PWRP 7 6 PWR_IN S OUT OUT SCI SLOT 1 (PG 1 of 1) S R54 100K 8 4 IN IN 7 G P1^,15 2 U3 D SCI1_EN R52 100K (TO OVER VOLTAGE PROTECTION) VDD_FROM_SCI_1 8 D SCI1_VSENSE C7 0.1uF 10V 1 2 D10 3 RED SCI_1_TO_PMU_V R50 100K P1^,15 B Q4 R48 412 1/10W D R49 100K A SCI1_CON_2 1x6 PWR POWER UPS-06-04.0-02-L-V Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN SCI_1_TO_PMU_V P1^,15 6 6 6 5D 5E 5F 5 5 5 5A 5B 5C 5 5 5 4D 4E 4F 4 4 4 4 4 4 4A 4B 4C 2D 2E 2F 3D 3E 3F 3A 3D 3B 3E 3C 3F 1 1A 1B 1C 3A 3B 3C 1 1 1 Q3 2 2 2 4 7 VDD_AUX_1 TP1 SCI_1_TO_PMU_V White CSD25401Q3 1 D11 R53 10K 2 6.2V A SEE PMU SLOT (PG 1 of 2) POWER SUPPLY for UCD9081 (PAGE 15) Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 N/C DVDD_3_3V SCI_1_AVDD_5_5_MON 1 1 1 TLVH431ACDBZ U2 2 3 G 1 D9 6.2V S-pad S 2 D B AFE1_TO_SCI1_REF+ AVDD_5_5V 5 3 C4 0.1uF 10V P1^,3 AFE1_TO_SCI1_REF- D R47 4.75K 1/10W P1^,15 AFE_SCI_1_REFERENCE R46 1D 1E 1F TRIPS AT 6V 2.2K MAVRK_SCI_1_MOD_SEL MAVRK_SCI_1_MOD_IRQ P1..3 P1..3 D60 6.2V D C3 22uF 25V R45 10K D8 N/C 15K R44 18.2K 1/16W SCI_1_PWR_GOOD 1 R43 OVER VOLTAGE PROTECTION R42 20K 1/10W D D-pad R41 2.2K AFE1_TO_SCI1_ANLG_VSS Q2 GREEN SCI1_SEL REVERSE POLARITY PROTECTION C 2 2 2 G S Q1 SCI1_CON_1 2x26 QRF8-026-05.0-L-D-A AFE/SCI_R_I2C_SDA AFE/SCI_R_I2C_SCL P1..3,5,9 P1..3,5,9 4 D AFE1_TO_SCI1_ANLG_VDD 2A 2B 2C R40 100K 5 S D6 6.2V G D S 5 3 S 4 6 C80 0.1uF 10V SCI_1_GPIO_3 SCI_1_GPIO_2 SCI_1_GPIO_1 SCI_1_GPIO_0 D D 6 SCI_1_GPIO_[0:3] P1^,3 2 S PWR REVERSED 7 D D 2 7 1 S 3 1 8 S 2 D7 RED CSD25401Q3 DNI 8 D CSD25401Q3 1 C 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 OVER VOLTAGE PROTECTION P1^,3 54 56 AFE1_TO_SCI1_ANLG_VSS GND GND VDD_AUX_1 1A 1B GND GND ST1 SCI Connectors (Fixed locations) 53 55 SCI Terminal Block SCI_1_ANLG_CH_0 SCI_1_ANLG_CH_1 SCI_1_ANLG_CH_2 SCI_1_ANLG_CH_3 SCI_1_ANLG_CH_4 SCI_1_ANLG_CH_5 SCI_1_ANLG_CH_6 SCI_1_ANLG_CH_7 SCI_1_ANLG_CH_8 SCI_1_ANLG_CH_9 SCI_1_ANLG_CH_10 SCI_1_ANLG_CH_11 SCI_1_ANLG_CH_12 SCI_1_ANLG_CH_13 SCI_1_ANLG_CH_14 SCI_1_ANLG_CH_15 4 3 2 E Sheet 7 of 19 1 4 3 SCI Terminal Block AFE2_TO_SCI2_ANLG_VDD SCI_2_SPI_MISO SCI_2_SPI_MOSI SCI_2_SPI_CLK SCI_2_SPI_CS P1^,4 P1^,4 P1^,4 P1^,4 3A 3B SCI_2_I2S_SCK SCI_2_I2S_WS_LRCLK SCI_2_I2S_SDIN SCI_2_I2S_SDIN_AUX P1^,4 P1^,4 P1^,4 P1^,4 4A 4B 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 1x4 TERM BLK 1770908 2 6 3 S 4 GREEN SCI2_SEL CSD17313Q2 1 D 2 SCI_2_TO_PMU_VIN (TO OVER VOLTAGE PROTECTION) VDD_AUX_2 VDD_AUX_2 P1^,4 TP2 SCI_2_TO_PMU_V White P1^,15 6D 6E 6F 6 6 6 6 6 6 SCI2_CON_2 1x6 PWR POWER UPS-06-04.0-02-L-V B 6A 6B 6C 5D 5E 5F 5 5 5 5 5 5 4D 4E 4F 4 4 4 4 4 4 5A 5B 5C 3A 3B 3C 1 1 1 1A 1B 1C 4A 4B 4C 3D 3E 3F 3A 3D 3B 3E 3C 3F 4 7 1 1 1 2 VDD_FROM_SCI_2 Q7 SCI_2_TO_PMU_V N/C DVDD_3_3V 1 TLVH431ACDBZ U4 2 3 G B D16 6.2V S-pad S 1 3 C9 0.1uF 10V SCI_2_DVDD_3_3_MON SCI_2_AVDD_5_5_MON 5 D R62 4.75K 1/10W AFE2_TO_SCI2_REF+ AVDD_5_5V 8 6 P1^,4 AFE2_TO_SCI2_REF- MAVRK_SCI_2_MOD_SEL MAVRK_SCI_2_MOD_IRQ N/C P1^,15 AFE_SCI_2_REFERENCE R61 1D 1E 1F TRIPS AT 6V 2.2K D C8 22uF 25V R60 10K SCI_2_PWR_GOOD D15 2D 2E 2F 15K R59 18.2K 1/16W P1^,2,4 P1^,2,4 D61 6.2V 1 R58 R57 20K 1/10W 2 1 R56 2.2K OVER VOLTAGE PROTECTION D D-pad REVERSE POLARITY PROTECTION AFE/SCI_L_I2C_SDA AFE/SCI_L_I2C_SCL P1^,2,4,6,10 P1^,2,4,6,10 Q6 C AFE2_TO_SCI2_ANLG_VSS 2 2 2 G S Q5 5 C81 0.1uF 10V AFE2_TO_SCI2_ANLG_VDD 2 2 2 R55 100K S D S D13 6.2V G D 5 SCI_2_GPIO_3 SCI_2_GPIO_2 SCI_2_GPIO_1 SCI_2_GPIO_0 D 2 S 4 SCI_2_GPIO_[0:3] P1^,4 2 SCI2_CON_1 2x26 QRF8-026-05.0-L-D-A 53 55 6 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 7 S PWR REVERSED 7 1 D D 2 8 S 3 1 8 S 2 D14 RED CSD25401Q3 DNI 1 D CSD25401Q3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 SCI_2_TO_PMU_VIN GND GND D12 B350A-13-F (FROM SCI CONNECTOR) C 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 OVER VOLTAGE PROTECTION D 54 56 2A 2B 2A 2B 2C AUX/GND/VSS/VDD D SCI_2_ANLG_CH_0 P1^,4 SCI_2_ANLG_CH_[0:15] SCI_2_ANLG_CH_1 SCI_2_ANLG_CH_2 SCI_2_ANLG_CH_3 SCI_2_ANLG_CH_4 SCI_2_ANLG_CH_5 SCI_2_ANLG_CH_6 SCI_2_ANLG_CH_7 SCI_2_ANLG_CH_8 SCI_2_ANLG_CH_9 SCI_2_ANLG_CH_10 SCI_2_ANLG_CH_11 SCI_2_ANLG_CH_12 SCI_2_ANLG_CH_13 SCI_2_ANLG_CH_14 SCI_2_ANLG_CH_15 SCI Connectors (Fixed locations) AFE2_TO_SCI2_ANLG_VSS 1A 1B 1 VDD_AUX_2 VDD_AUX_2 ST2 2 GND GND 5 (TO OVER VOLTAGE PROTECTION) VDD_FROM_SCI_2 SCI_2_TO_PMU_VIN Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN C10 0.1uF 10V R63 100K R65 412 1/10W R64 100K 8 1 2 4 SEE PMU SLOT (PG 1 of 2) POWER SUPPLY for UCD9081 (PAGE 15) 5 S R66 22.1K C11 1uF 10V S TPS2557DRB S R68 100K 5 1 9 PWR_IN 6 G R67 100K 3 D P1^,15 C12 0.1uF 10V ILIM FAULT GND EN PWRP 7 D SCI2_EN P1^,15 8 4 OUT OUT 7 6 (4.5-6V) S D SCI2_VSENSE 2 U5 2 D17 3 IN RED SCI_2_TO_PMU_V IN A SCI SLOT 2 (PG 1 of 1) Q8 1 CSD25401Q3 1 2 D18 6.2V R69 10K A Title Size B Set for 5.0A (4.602 - 5.331A) MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet 8 of 19 1 3 SCI Terminal Block AFE3_TO_SCI3_ANLG_VSS D SCI_3_ANLG_CH_0 SCI_3_ANLG_CH_1 SCI_3_ANLG_CH_2 SCI_3_ANLG_CH_3 SCI_3_ANLG_CH_4 SCI_3_ANLG_CH_5 SCI_3_ANLG_CH_6 SCI_3_ANLG_CH_7 SCI_3_ANLG_CH_8 SCI_3_ANLG_CH_9 SCI_3_ANLG_CH_10 SCI_3_ANLG_CH_11 SCI_3_ANLG_CH_12 SCI_3_ANLG_CH_13 SCI_3_ANLG_CH_14 SCI_3_ANLG_CH_15 AFE3_TO_SCI3_ANLG_VDD 2A 2B SCI_3_SPI_MISO SCI_3_SPI_MOSI SCI_3_SPI_CLK SCI_3_SPI_CS P1^,5 P1^,5 P1^,5 P1^,5 3A 3B SCI_3_I2S_SCK SCI_3_I2S_WS_LRCLK SCI_3_I2S_SDIN SCI_3_I2S_SDIN_AUX P1^,5 P1^,5 P1^,5 P1^,5 4A 4B 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 1x4 TERM BLK 1770908 OVER VOLTAGE PROTECTION 6 GREEN Q10 1 (TO OVER VOLTAGE PROTECTION) 2 VDD_AUX_3 VDD_AUX_3 P1^,5 6D 6E 6F 6 6 6 6 6 6 SCI3_CON_2 1x6 PWR POWER UPS-06-04.0-02-L-V B 6A 6B 6C 5D 5E 5F 5 5 5 5 5 5 5A 5B 5C 3D 3E 3F 2D 2E 2F 4D 4E 4F 4 4 4 4 4 4 4A 4B 4C 1A 1B 1C 1 3A 3D 3B 3E 3C 3F Q11 3A 3B 3C 1 1 1 4 7 1 1 1 2 TLVH431ACDBZ U6 2 G S-pad S 3 SCI_3_TO_PMU_VIN 2 2 2 D 1 VDD_FROM_SCI_3 D B N/C DVDD_3_3V 5 3 C14 0.1uF 10V AFE3_TO_SCI3_REF+ SCI_3_DVDD_3_3_MON SCI_3_AVDD_5_5_MON 8 6 P1^,5 AFE3_TO_SCI3_REF- 1D 1E 1F 2 TRIPS AT 6V D23 6.2V MAVRK_SCI_3_MOD_SEL MAVRK_SCI_3_MOD_IRQ CSD17313Q2 R75 10K R77 4.75K 1/10W N/C P1^,15 AFE_SCI_3_REFERENCE AVDD_5_5V 6.2V D C13 22uF 25V R76 2 2 2 15K R74 18.2K 1/16W 2.2K 1 R73 C AFE3_TO_SCI3_ANLG_VSS SCI_3_PWR_GOOD D22 SCI3_SEL P1^,2,5 P1^,2,5 1 R71 2.2K OVER VOLTAGE D62 PROTECTION R72 20K 1/10W D D-pad REVERSE POLARITY PROTECTION SCI3_CON_1 2x26 QRF8-026-05.0-L-D-A AFE/SCI_R_I2C_SDA AFE/SCI_R_I2C_SCL P1..3,5,7 P1..3,5,7 4 D AFE3_TO_SCI3_ANLG_VDD 2A 2B 2C G S Q9 5 S C82 0.1uF 10V R70 100K G D S D20 6.2V 5 S D 4 3 D 2 S PWR REVERSED 6 SCI_3_GPIO_3 SCI_3_GPIO_2 SCI_3_GPIO_1 SCI_3_GPIO_0 2 S 2 7 SCI_3_GPIO_[0:3] D D 1 7 P1^,5 1 S 3 D21 RED 8 S 2 C CSD25401Q3 DNI 8 D CSD25401Q3 1 P1^,5 53 55 2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 SCI_3_TO_PMU_VIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 D19 B350A-13-F (FROM SCI CONNECTOR) SCI_3_ANLG_CH_[0:15] 54 56 AUX/GND/VSS/VDD 1A 1B 1 SCI Connectors (Fixed locations) VDD_AUX_3 ST3 2 GND GND 4 GND GND 5 (TO OVER VOLTAGE PROTECTION) VDD_FROM_SCI_3 SCI_3_TO_PMU_VIN TP3 SCI_3_TO_PMU_V White SCI_3_TO_PMU_V C15 P1^,15 0.1uF 10V Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN R80 412 1/10W R79 100K R78 100K 8 4 1 2 C16 1uF 10V 4 A 5 Title S TPS2557DRB R81 22.1K Set for 5.0A (4.602 - 5.331A) 5 6 S 5 1 9 PWR_IN (4.5-6V) S R83 100K 3 G P1^,15 ILIM FAULT GND EN PWRP 7 6 D R82 100K OUT OUT 7 D P1^,15 SCI3_EN C17 0.1uF 10V 8 4 IN IN S D SCI3_VSENSE 2 U7 2 D24 3 RED SCI_3_TO_PMU_V A SCI SLOT 3 (PG 1 of 1) Q12 1 CSD25401Q3 1 D25 R84 10K 2 6.2V SEE PMU SLOT (PG 1 of 2) POWER SUPPLY for UCD9081 (PAGE 15) 3 Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 2 E Sheet 9 of 19 1 3 SCI Terminal Block AFE4_TO_SCI4_ANLG_VSS D SCI_4_ANLG_CH_0 SCI_4_ANLG_CH_1 SCI_4_ANLG_CH_2 SCI_4_ANLG_CH_3 SCI_4_ANLG_CH_4 SCI_4_ANLG_CH_5 SCI_4_ANLG_CH_6 SCI_4_ANLG_CH_7 SCI_4_ANLG_CH_8 SCI_4_ANLG_CH_9 SCI_4_ANLG_CH_10 SCI_4_ANLG_CH_11 SCI_4_ANLG_CH_12 SCI_4_ANLG_CH_13 SCI_4_ANLG_CH_14 SCI_4_ANLG_CH_15 AFE4_TO_SCI4_ANLG_VDD 2A 2B SCI_4_SPI_MISO SCI_4_SPI_MOSI SCI_4_SPI_CLK SCI_4_SPI_CS P1^,6 P1^,6 P1^,6 P1^,6 3A 3B SCI_4_I2S_SCK SCI_4_I2S_WS_LRCLK SCI_4_I2S_SDIN SCI_4_I2S_SDIN_AUX P1^,6 P1^,6 P1^,6 P1^,6 4A 4B 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 1x4 TERM BLK 1770908 OVER VOLTAGE PROTECTION S 5 P1^,2,4,6,8 P1^,2,4,6,8 4 S GREEN SCI4_SEL 2 3 6D 6E 6F 6 6 6 6 6 6 6 TPS2557DRB R96 22.1K Set for 5.0A (4.602 - 5.331A) C21 1uF 10V 4 5 A S 5 1 9 ILIM FAULT GND EN PWRP (4.5-6V) S R98 100K 7 6 OUT OUT PWR_IN S R97 100K P1^,15 8 4 IN IN SCI SLOT 4 (PG 1 of 1) S C22 0.1uF 10V 2 D31 3 RED SCI_4_TO_PMU_V 7 G P1^,15 2 U9 D SCI4_EN SCI_4_TO_PMU_VIN 8 D SCI4_VSENSE 1 D A (TO OVER VOLTAGE PROTECTION) VDD_FROM_SCI_4 Q16 R95 412 1/10W R94 100K R93 100K B Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN 1 P1^,15 SCI_4_TO_PMU_V C20 0.1uF 10V P1^,6 SCI4_CON_2 1x6 PWR POWER UPS-06-04.0-02-L-V 6A 6B 6C 5D 5E 5F 5 5 5 5 5 5 1 1 1 1 1 1 1A 1B 1C VDD_AUX_4 TP4 SCI_4_TO_PMU_V White 53 55 1 Q15 5A 5B 5C 2 VDD_AUX_4 4 7 1 TLVH431ACDBZ U8 2 3 G S-pad S 1 SCI_4_TO_PMU_VIN (TO OVER VOLTAGE PROTECTION) 4D 4E 4F D B C19 0.1uF 10V D30 6.2V VDD_FROM_SCI_4 D R92 4.75K 1/10W 8 6 5 3 Title CSD25401Q3 1 D32 R99 10K 2 6.2V SEE PMU SLOT (PG 1 of 2) POWER SUPPLY for UCD9081 (PAGE 15) Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 N/C DVDD_3_3V SCI_4_AVDD_5_5_MON 4 4 4 2 AFE4_TO_SCI4_REF+ SCI_4_DVDD_3_3_MON 1D 1E 1F TRIPS AT 6V P1^,6 AFE4_TO_SCI4_REF- 4 4 4 D C18 22uF 25V 1 MAVRK_SCI_4_MOD_SEL MAVRK_SCI_4_MOD_IRQ N/C P1^,15 AFE_SCI_4_REFERENCE AVDD_5_5V D63 6.2V CSD17313Q2 R90 10K R91 4A 4B 4C 15K R89 18.2K 1/16W 2.2K 3D 3E 3F R88 D D-pad R86 2.2K OVER VOLTAGE PROTECTION R87 20K 1/10W 2 REVERSE POLARITY PROTECTION P1^,2,6 P1^,2,6 SCI_4_PWR_GOOD D29 2 2 2 G S 1 Q14 C AFE4_TO_SCI4_ANLG_VSS 2A 2B 2C D Q13 SCI4_CON_1 2x26 QRF8-026-05.0-L-D-A AFE/SCI_L_I2C_SDA AFE/SCI_L_I2C_SCL 3A 3D 3B 3E 3C 3F C83 0.1uF 10V R85 100K G D S D27 6.2V 5 3 D 2 S 4 D AFE4_TO_SCI4_ANLG_VDD 3A 3B 3C 6 2 2D 2E 2F 6 SCI_4_GPIO_3 SCI_4_GPIO_2 SCI_4_GPIO_1 SCI_4_GPIO_0 P1^,6 2 2 2 7 S PWR REVERSED 7 SCI_4_GPIO_[0:3] 1 D D 2 8 S 1 8 S 3 D28 RED CSD25401Q3 DNI 2 C 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 CSD25401Q3 1 P1^,6 2 D 1 SCI_4_TO_PMU_VIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 D26 B350A-13-F (FROM SCI CONNECTOR) SCI_4_ANLG_CH_[0:15] 54 56 AUX/GND/VSS/VDD 1A 1B 1 SCI Connectors (Fixed locations) VDD_AUX_4 ST4 2 GND GND 4 GND GND 5 4 3 2 E Sheet10of 19 1 5 4 3 2 1 D D DVDD_3_3V RF1_CON_1 C P1^,2,12..14 P1^,2,12..14 P1^,2,12..14 P1^,2,12..14 P1^,2,12..14,19 P1^,2,12..14,19 P1^,2,12..14 P1^,2,12..14 RF_UART_CTS RF_LOW_SPEED_CLK RF_UART_RX RF_UART_TX RF_I2C_SDA RF_I2C_SCL RF_SDIO_CLK RF_SDIO_CMD 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 RF1_CON_2 RF_SDIO_D[0-3] RF_SDIO_D0 RF_SDIO_D1 RF_SDIO_D2 RF_SDIO_D3 MAVRK_RF_1_IRQ MAVRK_RF_1_GPIO MAVRK_RF_1_MOD_SEL TFM-110-02-S-D-K-A RF_SPI_CLK RF_SPI_MOSI RF_SPI_MISO P1^,2,12..14 P1..3,5,13 P1^,2 P1^,2 P1^,2 D33 R100 1 2.2K BLUE RF1_CS P1^,2,12..14 P1^,2,12..14 P1^,2,12..14 P1..3,5,13 P1^,19 P1^,19 P1..3,5,13 P1^,19 2 1 3 AFE_R_MCLK 5 7 RF_1_MON_1 N/C 9 AFE_R_I2S_WS_LRCLK 11 13 RF_1_GPIO_2 15 RF_1_SHUTD_0 17 AFE_R_I2S_SCK 19 RF_1_SHUTD_1 2 4 6 8 10 12 14 16 18 20 J2 AUD_1 1 2 RF_1_AUD_ANA_L RF_1_AUD_ANA_R AFE_R_I2S_SDIN_AUX AFE_R_I2S_SDIN RF_SPI_CS RF_UART_RTS RF_1_GPIO_3 P1..3,5,13 P1..3,5,13 1x2 P1^,2,12..14 P1^,2,12..14 P1^,19 C TFM-110-02-S-D-K-A B B RF SLOT 1 (PG 1 of 1) A A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet11of 19 1 5 4 3 2 1 D D DVDD_3_3V RF2_CON_2 RF2_CON_1 C P1^,2,11,13,14 P1^,2,11,13,14 P1^,2,11,13,14 P1^,2,11,13,14 P1^,2,11,13,14,19 P1^,2,11,13,14,19 P1^,2,11,13,14 P1^,2,11,13,14 RF_UART_CTS RF_LOW_SPEED_CLK RF_UART_RX RF_UART_TX RF_I2C_SDA RF_I2C_SCL RF_SDIO_CLK RF_SDIO_CMD 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 RF_SDIO_D[0-3] RF_SDIO_D0 RF_SDIO_D1 RF_SDIO_D2 RF_SDIO_D3 MAVRK_RF_2_IRQ MAVRK_RF_2_GPIO MAVRK_RF_2_MOD_SEL TFM-110-02-S-D-K-A RF_SPI_CLK RF_SPI_MOSI RF_SPI_MISO P1^,2,11,13,14 P1^,2,4,6,14 N/C P1^,2 P1^,2 P1^,2 D34 R101 1 2.2K BLUE RF2_CS P1^,2,11,13,14 P1^,2,11,13,14 P1^,2,11,13,14 P1^,2,4,6,14 P1^,19 P1^,19 P1^,2,4,6,14 P1^,19 2 1 3 AFE_L_MCLK 5 7 RF_2_MON_1 9 AFE_L_I2S_WS_LRCLK 11 13 RF_2_GPIO_2 15 RF_2_SHUTD_0 17 AFE_L_I2S_SCK 19 RF_2_SHUTD_1 2 4 6 8 10 12 14 16 18 20 RF_2_AUD_ANA_L RF_2_AUD_ANA_R AFE_L_I2S_SDIN_AUX AFE_L_I2S_SDIN J3 AUD_2 1 2 P1^,2,4,6,14 P1^,2,4,6,14 1x2 C RF_SPI_CS RF_UART_RTS RF_2_GPIO_3 P1^,2,11,13,14 P1^,2,11,13,14 P1^,19 TFM-110-02-S-D-K-A B B RF SLOT 2 (PG 1 of 1) A A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet12of 19 1 5 4 3 2 1 D D DVDD_3_3V RF3_CON_1 C P1^,2,11,12,14 P1^,2,11,12,14 P1^,2,11,12,14 P1^,2,11,12,14 P1^,2,11,12,14,19 P1^,2,11,12,14,19 P1^,2,11,12,14 P1^,2,11,12,14 RF_UART_CTS RF_LOW_SPEED_CLK RF_UART_RX RF_UART_TX RF_I2C_SDA RF_I2C_SCL RF_SDIO_CLK RF_SDIO_CMD 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 RF3_CON_2 RF_SDIO_D[0-3] RF_SDIO_D0 RF_SDIO_D1 RF_SDIO_D2 RF_SDIO_D3 MAVRK_RF_3_IRQ MAVRK_RF_3_GPIO MAVRK_RF_3_MOD_SEL TFM-110-02-S-D-K-A RF_SPI_CLK RF_SPI_MOSI RF_SPI_MISO P1^,2,11,12,14 P1..3,5,11 N/C P1^,2 P1^,2 P1^,2 R102 P1^,2,11,12,14 2.2K P1^,2,11,12,14 P1^,2,11,12,14 D35 1 2 BLUE RF3_CS P1..3,5,11 P1^,19 P1^,19 P1..3,5,11 P1^,19 1 3 AFE_R_MCLK 5 7 RF_3_MON_1 9 AFE_R_I2S_WS_LRCLK 11 13 RF_3_GPIO_2 15 RF_3_SHUTD_0 17 AFE_R_I2S_SCK 19 RF_3_SHUTD_1 2 4 6 8 10 12 14 16 18 20 RF_3_AUD_ANA_L RF_3_AUD_ANA_R AFE_R_I2S_SDIN_AUX AFE_R_I2S_SDIN RF_SPI_CS RF_UART_RTS RF_3_GPIO_3 J4 AUD_3 1 2 P1..3,5,11 P1..3,5,11 1x2 C P1^,2,11,12,14 P1^,2,11,12,14 P1^,19 TFM-110-02-S-D-K-A B B RF SLOT 3 (PG 1 of 1) A A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet13of 19 1 5 4 3 2 1 D D DVDD_3_3V RF4_CON_2 RF4_CON_1 C P1^,2,11..13 P1^,2,11..13 P1^,2,11..13 P1^,2,11..13 P1^,2,11..13,19 P1^,2,11..13,19 P1^,2,11..13 P1^,2,11..13 RF_UART_CTS RF_LOW_SPEED_CLK RF_UART_RX RF_UART_TX RF_I2C_SDA RF_I2C_SCL RF_SDIO_CLK RF_SDIO_CMD 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 RF_SDIO_D[0-3] RF_SDIO_D0 RF_SDIO_D1 RF_SDIO_D2 RF_SDIO_D3 MAVRK_RF_4_IRQ MAVRK_RF_4_GPIO MAVRK_RF_4_MOD_SEL TFM-110-02-S-D-K-A RF_SPI_CLK RF_SPI_MOSI RF_SPI_MISO P1^,2,11..13 P1^,2,4,6,12 N/C P1^,2 P1^,2 P1^,2 R103 2.2K P1^,2,11..13 P1^,2,11..13 P1^,2,11..13 P1^,2,4,6,12 P1^,19 P1^,19 P1^,2,4,6,12 P1^,19 D36 1 2 BLUE RF4_CS 1 3 AFE_L_MCLK 5 7 RF_4_MON_1 9 AFE_L_I2S_WS_LRCLK 11 13 RF_4_GPIO_2 15 RF_4_SHUTD_0 17 AFE_L_I2S_SCK 19 RF_4_SHUTD_1 2 4 6 8 10 12 14 16 18 20 RF_4_AUD_ANA_L RF_4_AUD_ANA_R AFE_L_I2S_SDIN_AUX AFE_L_I2S_SDIN RF_SPI_CS RF_UART_RTS RF_4_GPIO_3 J5 AUD_4 1 2 P1^,2,4,6,12 P1^,2,4,6,12 1x2 C P1^,2,11..13 P1^,2,11..13 P1^,19 TFM-110-02-S-D-K-A B B RF SLOT 4 (PG 1 of 1) A A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet14of 19 1 5 x_VDD_EN PWR_WALL_EN 33 33 R104 R105 33 33 R107 R109 SCI_4_PWR_GOOD 33 R112 SCI_2_PWR_GOOD 33 R115 SCI2_EN SCI4_EN P1^,10 P1^,8 4 3 2 UCD_EN R106 R108 33 MCU_USB_5V_EN 33 USB_TO_SERIAL_5V_EN R110 R111 33 SCI1_EN 33 SCI3_EN R113 33 SCI_3_PWR_GOOD R114 33 SCI_1_PWR_GOOD Fault detection and enable signal generation (UCD9081) UCD_3p3V P1^,7 54 56 2 1 C26 2200pF 1 SKRKAEE010 GND GND GND GND SW1 RST PMU_MOD_SEL PMU_UCD 2.2K PMU_EN PMU_IRQ PMU_I2C_SDA DVDD_3_3V R131 0 TEST NC1 NC2 1.0K 1.0K 1.0K 1.0K 1.0K 1.0K 1.0K 1.0K R118 R119 R120 R121 R122 R123 R124 R125 R126 R128 R129 PWR_WALL_EN USB_TO_SERIAL_5V_EN SCI1_EN SCI4_EN SCI2_EN SCI3_EN x_VDD_EN MCU_USB_5V_EN 2.2K 2.2K 2.2K 1 33 20 31 VSS PPAD NC3 UCD9081RHB NC4 D37 GREEN AD4 MCU_USB_5V 8D 8E 8F 8 8 8 SCI_1_TO_PMU_V SCI_3_TO_PMU_V PMU_UCD SCI_1_TO_PMU_V PWR_IN Black USB_TO_SERIAL_5V P1^,9 PWR_WALL 1 2 3 SCI_2_TO_PMU_V SCI_4_TO_PMU_V 7 COM 2 SDM20U30LP D42 GREEN D38 GREEN AD3 D39 GREEN AD2 1 U11 1 3 2 IN OUT EN FB GND NR R133 51.1K 6 5 4 C28 2.2uF TPS73001DBVT C29 10nF C30 15pF R134 30.1K R135 PMU_LDO_VIN 2.2K D43 P1^,7 C27 1uF 10V R132 10K 1/10W 6 5 4 D41 1 SCI_2_TO_PMU_V Black P16 P17 UCD_3p3V PMU_CON_2 1x8 PWR POWER SCI_3_TO_PMU_V TP9 GND P1^,7 P1^,10 P1^,8 P1^,9 C DA1 SDM6CC SCI_4_TO_PMU_V TP8 GND P16 P17 TP5 UCD_3.3V Orange 8A 8B 8C 8 8 8 7D 7E 7F 7 7 7 7A 7B 7C 7 7 7 6D 6E 6F 6 6 6 6A 6B 6C 6 6 6 5D 5E 5F 5 5 5 5A 5B 5C 5 5 5 4D 4E 4F 4 4 4 4 4 4 4A 4B 4C 3 3 3 3 3 3 3A 3B 3C 2 2 2 2 2 2 2A 2B 2C 1 1 1 1A 1B 1C 1 1 1 3D 3E 3F SCI_3_TO_PMU_V 2D 2E 2F SCI_4_TO_PMU_V 1D 1E 1F SCI_1_TO_PMU_V AVDD_5_5V Black SCL SDA 23 24 11 10 12 13 14 25 26 27 28 PWR_WALL SCI_2_TO_PMU_V TP7 GND EN1 EN2 EN3 EN4 EN5 EN6 EN7 EN8/AD1/GPO1 AD2/GPO2 AD3/GPO3 AD4/GPO4 D 30 3 VCC XIN (4.5-6V) PWR_WALL TP6 GND MON1 MON2 MON3 MON4 MON5 MON6 MON7 MON8 C25 1uF 10V POWER SUPPLY for UCD9081 AVDD_5_5V P1^,8 U10 C24 1uF 10V DNI WHEN ON, PMU MODULE HAS CONTROL OF POWER. P1^,10 ROSC RST 7 2 USB_TO_SERIAL_5V PWR_IN A 4 17 I2C DEBUG HDR MCU_USB_5V PMU_I2C_SCL PMU_I2C_SDA P1^,2 P1^,2 29 J6 10 8 6 4 2 1 P1^,2 P1^,2 D40 C YELLOW PMU_CNTL VDD_CORE 22 21 0 DNI 9 7 5 3 1 P1^,2 P1^,7 P1^,10 P1^,8 P1^,9 R127 6 7 8 18 19 9 15 16 PWR_WALL_MON USB_TO_SERIAL_5V_MON SCI1_VSENSE SCI4_VSENSE SCI2_VSENSE SCI3_VSENSE x_VDD_MON MCU_USB_5V_MON P16 P17 P16 P17 53 55 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 32 5 2 PMU_CON_1 2x26 C23 0.1uF 10V R117 47.0K R116 47.0K PMU_I2C_SCL B UCD_3p3V P1^,9 D R130 1 2 B UCD_EN SDM20U30LP (4.5-6V) TP10 GND Black Black PMU SLOT (PG 1 of 3) TP11 TP12 TP13 TP14 TP15 GND GND GND GND GND Black Black Black Black Black A Title MB-PRO-MVK TP16 TP17 TP18 GND GND GND Black Black Black Size B EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet15of 19 1 4 3 OVER VOLTAGE PROTECTION 1 CSD25401Q3 S S 4 S 2 2 1 1 CSD17313Q2 1 D 2 D 2 5 1 9 C34 1uF 10V R143 22.1K TPS2557DRB R148 100K R147 100K 4 5 CSD25401Q3 D49 1 2 6.2V R149 10K Set for 5.0A R144 665 4 7 Q20 1 C L1 +5.5V ANALOG SUPPLY 3.3uH R151 0 PG_AVDD_2 U14 (4.5-5V) 8 9 PWR_IN R153 0 C38 10uF C39 10uF L1A L1B 10 11 12 13 C40 0.1uF 10V VIN1 VOUT1 VIN2 VOUT2 EN PS/SSYNC PG VINA FB 1 C46 0.1uF 10V L2A L2B 2 GND PPAD 6 7 PG_AVDD_1 4 5 R156 1.00M PGMOD TP22 Green C41 0.1uF 10V R155 2.00M 1/16W C42 10uF R154 100K TP21 AVDD_5_5V Orange R152 412 1/10W 2 D51 3 RED AVDD_5_5V C43 10uF 14 3 15 P15,16 R157 200K TPS63020DSJ AVDD_5_5V U15 1 TLVH431ACDBZ U13 2 3 C G 1 D50 6.2V S-pad S R150 4.75K 1/10W 5 3 C37 0.1uF 10V C35 0.1uF 10V ILIM FAULT GND EN PWRP PWR_IN D47 GREEN D TRIPS AT 6V 8 6 PWR_WALL_EN P15 PWR_WALL_MON P15 2 R146 10K D D-pad C36 22uF 25V C85 330uF + 10V OUT OUT IN IN x_VDD_EN 7 6 OUT OUT ILIM FAULT GND EN PWRP 8 4 2 G S 15K R145 18.2K 1/16W 8 4 IN IN 6 S R142 + C33 100uF 16V OVER VOLTAGE D64 6.2V PROTECTION R141 20K 1/10W 7 6 D PWR_IN 7 3 U12 2 D48 3 RED PWR_WALL TP20 PWR_IN Red 8 2 2 D S 1 C32 0.1uF 10V Q18 R139 412 1/10W R138 100K S REVERSE POLARITY PROTECTION C31 0.1uF 10V G R136 100K R137 100K 1 2 S D45 6.2V 5 1 S Q17 Q19 D D 5 3 S 4 6 C84 0.1uF 10V PWR_WALL PWR G PWR REVERSED S 2 2 D D 6 TP19 PWR_WALL Brown D 1 7 1 D R140 2.2K 7 WALL PLUG INPUT (3.7-6.0V) when enabled becomes PWR_IN D D46 RED 8 S 3 D 8 1 DNI D 2 1 3 2 2 CSD25401Q3 1 P1 DC_IN PJ-012A 2 D44 B350A-13-F 1 5 R159 100K 5 1 9 TPS2557DRB R158 24.9K C44 1uF 10V AVDD_5_5V D52 GREEN C45 10uF R160 665 Set for 4.45A (4.050- 4.761A) B B L2 (4.5-5V) +3.3V DIGITAL SUPPLY 1.5uH R161 0 PG_DVDD_2 U16 0 C50 10uF C51 10uF 10 11 12 13 C52 0.1uF 10V 1 C54 0.1uF 10V 2 L2A L2B VIN1 VOUT1 VIN2 VOUT2 EN PS/SSYNC PG VINA FB GND PPAD PG_DVDD_1 4 5 TP24 Green PGVD1 TP23 DVDD_3_3V Violet R162 165 1/10W 6 7 R164 1.00M R165 1.13M C47 0.1uF 10V C48 10uF R166 100K C49 10uF 14 3 15 R168 200K TPS63020DSJ C56 0.1uF 10V A x_VDD_MON P15 x_VDD_EN P15,16 R170 100K DVDD_3_3V U17 1 R163 L1A L1B 2 D53 3 RED DVDD_3_3V R167 100K 8 4 2 8 9 PWR_IN R171 100K IN IN OUT OUT ILIM FAULT GND EN PWRP TPS2557DRB 7 6 5 1 9 R169 88.7K C53 1uF 10V DVDD_3_3V D54 GREEN PMU SLOT (PG 2 of 3) C55 10uF R172 221 Set for 1.244A (1.039 - 1.430A) A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet16of 19 1 5 4 3 2 1 Fault protection and enable for USB. When enabled it becomes PWR_IN TP25 USB_SER_5V Blue USB_TO_SERIAL_5V D C57 0.1uF 10V R173 D 1 1 2 4 5 CSD25401Q3 D56 1 2 R179 10K 6.2V C TP26 MCU_USB_5V Blue MCU_USB_5V C60 0.1uF 10V R180 R182 412 1/10W R181 100K 100K Q22 1 8 3 6 1 TPS2557DRB Set for 1.0A (0.825- 1.166A) 4 5 S R183 110K C61 1uF 10V S 5 1 9 PWR_IN S 2 7 G R185 100K ILIM FAULT GND EN PWRP 7 6 D R184 100K MCU_USB_5V_EN OUT OUT D P15 8 4 IN IN S D MCU_USB_5V_MON C62 0.1uF 10V 2 U19 2 D57 3 RED MCU_USB P15 S R176 110K C58 1uF 10V Set for 1.0A (0.825- 1.166A) R178 100K 6 S 5 1 9 ILIM FAULT GND EN PWRP PWR_IN S 3 TPS2557DRB 100K S C P15 R177 7 G C59 0.1uF 10V USB_TO_SERIAL_5V_EN 7 6 OUT OUT D 8 4 IN IN D USB_TO_SERIAL_5V_MON 2 U18 2 D55 3 RED USB_SER P15 8 D 100K Q21 R175 412 1/10W R174 100K CSD25401Q3 D58 1 2 R186 10K 6.2V B B PMU SLOT (PG 3 of 3) A A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet17of 19 1 5 4 3 2 1 USB TO SERIAL (UART) INTERFACE U20 2 8 6 2 4 BK1608HS600-T D A B C D GND GND GND GND USB_TO_SERIAL_3_3V R191 R194 33 33 C63 10nF R192 5 6 7 1.5K DPa0 DMa0 C66 22pF C67 22pF R195 15K R196 15K R200 15K 13 14 15 16 20 21 USB_TO_SERIAL_3_3V 23 24 Leave USB ID floating to indicate to host device that this is a slave device only R203 90.9K C69 1uF 10V 3 25 4 VCC1V8 C70 10nF C71 1uF 10V C72 10nF 8 18 28 33 R205 100K R187 15K U21 TUSB3410RHBR PUR DP0 DM0 VREGEN RESET WAKEUP SUSP CLKOUT CTS DSR DCD RICP/ RTS DTR 1 9 12 2 22 R193 ENn RSTIn 3 2 R188 15K SW2 USB RESET R189 15K R190 1 33K C64 1uF 10V C65 1uF 10V 1 D59 MMBD4148 100 2 SKRKAEE010 C68 10nF SIN/IR_SIN SOUT/IR_SOUT TEST0 TEST1 SCL SDA VCC VCC VDD1V8 P3_0 P3_1 P3_3 P3_4 GND GND GND HS X1/CLKI X2 17 19 R198 R201 11 10 330 MB_USB_TO_SER_TX 330 MB_USB_TO_SER_RX TUSB_SCL TUSB_SDA R199 1.5K P1^,2 P1^,2 R202 0 32 31 30 29 R197 1.5K U22 8 7 6 5 VCC WP SCL SDA A0 A1 A2 VSS 1 2 3 4 128K I2C EEPROM C R204 15K C73 27 26 33pF Y1 12.000MHz 18pF 1 C USB_TO_SERIAL_3_3V D SN75240PWR 7 6 GND2 GND1 USB TO SER USB_MINI_B_54819 J7 1 VBUS 2 DaD- 3 Da+ D+ 4 ID 5 GND USB_TO_SERIAL_3_3V 1 3 5 7 2 USB_TO_SERIAL_5V FB1 1 C74 33pF USB INTERFACE direct to MCU CARD POWER SUPPLY for TUSB3410 B B MCU_USB_5V FB2 1 U23 2 8 6 2 4 BK1608HS600-T A 1 3 5 7 GND GND GND GND USB_TO_SERIAL_5V PG_USB_SERIAL_IRQ SN75240PWR R206 R208 C79 10nF 7 6 GND2 GND1 MCU TO USB USB_MINI_B_54819 J8 1 VBUS 2 DD- 3 D+ D+ 4 ID 5 GND A B C D 33 33 U24 MCU_USB_DATAMCU_USB_DATA+ C77 22pF USB_TO_SERIAL_3_3V P1^,2 P1^,2 C75 1uF 10V C76 0.1uF 10V 4 2 3 IN PG GND NC OUT TPS79733DCK 1 5 R207 100K 1/10W C78 22pF USB SLOT (PG 1 of 1) Leave USB ID floating to indicate to host device that this is a slave device only A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet18of 19 1 5 4 3 2 1 D D I2C PORT EXPANDER - AFFECTS ALL 4 RF SLOTS DVDD_3_3V DVDD_3_3V C R213 R214 10K 10K R209 R210 R211 R212 10K 10K 10K 10K RF_I2C_SDA 15 RF_I2C_SCL 14 P1^,2,11..14 P1^,2,11..14 10K 10K 10K R218 R219 R221 1 2 3 8 Vcc SDA SCL A0 A1 A2 GND C U26 U25 16 R216 R215 10K 10K P0 P1 P2 P3 P4 P5 P6 P7 INT 4 5 6 7 9 10 11 12 RF_1_GPIO_3 RF_1_GPIO_2 RF_1_SHUTD_0 RF_1_SHUTD_1 RF_3_GPIO_3 RF_3_GPIO_2 RF_3_SHUTD_0 RF_3_SHUTD_1 16 P1^,11 P1^,11 P1^,11 P1^,11 P1^,13 P1^,13 P1^,13 P1^,13 10K 10K 10K PCA9534ADGV 15 14 R217 R220 R222 1 2 3 8 TP27 Orange INT_1_3 13 RF_I2C_SDA RF_I2C_SCL Vcc SDA SCL A0 A1 A2 GND P0 P1 P2 P3 P4 P5 P6 P7 INT 4 5 6 7 9 10 11 12 13 PCA9534ADGV RF_2_GPIO_3 RF_2_GPIO_2 RF_2_SHUTD_0 RF_2_SHUTD_1 RF_4_GPIO_3 RF_4_GPIO_2 RF_4_SHUTD_0 RF_4_SHUTD_1 P1^,12 P1^,12 P1^,12 P1^,12 P1^,14 P1^,14 P1^,14 P1^,14 TP28 Orange INT_2_4 B B PORT EXPANDER (PG 1 OF 1) A A Title Size B MB-PRO-MVK EDGE No 6517814 Rev Date Friday, June 10, 2011 5 4 3 2 E Sheet19of 19 1