DC1366B - Schematic

5
4
3
2
1
REVISION HISTORY
USBVDD
VDD
VDD
1
0805
VDD
D
HI
3
LO
JP2
SW6
MSD
SW7
MSD
RESET
MSD
35
RESET
34
MSD
TP19
RESET
MID
AUTO
MID
33
13
VDD
SD4
SD3
SD2
SD4
17
SD3
16
15
SD2
SD1
2
C
Q1
G4
5
6
7
8
C36
0.22uF
X7R
1
1
D9
S1B
D10
S1B
C47
0.22uF
X7R
D11
S1B
C58
0.22uF
X7R
OUT1
TP1
PSMN075-100MSE
RS2A
RS2B
RS2C
RS2D
C22
0.22uF
X7R
2
D8
S1B
2
1
21
OUT 4
GATE 4
SENSE 4
20
TP10
2
G3
GATE4
24
OUT 3
GATE 3
SENSE 3
23
SENSE4 19
G2
GATE3
29
OUT 2
GATE 2
SENSE 2
OUT 1
GATE 1
SENSE 1
1.00
1.00 1
1.00 2
1.00 3
G1
SENSE3 22
C64
28
D1
31
2
RTN
1.00
1.00 1
1.00 2
1.00 3
Q2
D24
S1B
OUT1
5
6
7
8
OUT2
TP2
VEE
OUT2
Q3
5
6
7
8
OUT3
VEE
TP3
Q4
5
6
7
8
OUT4
VEE
TP4
OUT4
1
1.00
1.00 1
1.00 2
1.00 3
D26
S1B
2
4
PSMN075-100MSE
RS4A
RS4B
RS4C
RS4D
OUT3
1
1.00
1.00 1
1.00 2
1.00 3
D25
S1B
2
4
PSMN075-100MSE
RS3A
RS3B
RS3C
RS3D
B
1
RECOMMENDED MINIMUM
CABLE SURGE PROTECTION
MIDSPAN
1
VEE
B
LO
2
TP18
1uF 100V 1206
RS1A
RS1B
RS1C
RS1D
VEE
VEE
1
GATE2
D18
SMCJ58A
SMAJ58A
SENSE2 27
C2
10uF
100V
AGND_PIN
0805
R9
0
OPT
4
+
R10
0
4 GATE1
J1
08-12-15
U1
LTC4266
SENSE1 30
RPW2
3.9K
1/4W
2
1
1
R35
10
VDD
SDAOUT
7
6 AD0
5 AD1
4 AD2
AD3
10
DGND
39
D19
39V
-54V
A0
A1
A2
A3
VEE
3
2
ADDRESS
HI
26
1
2
3
4
C65
0.1uF
SDAIN
AGND
D5
VEE
ORANGE
SW1
LO 8
7
6
5
SCL
18
1
TP5
R11
0
SD1
37
1
SDAOUT
RTN
RTN
3
SDAIN
25
38
SCL
INT
A0
14
INT
J2
DATE
DILIAN R.
2
36
SW5 SD4
INT
RED
A1
1
AUTO
D6
TP9
VEE
TP8
2
TP7
32
SDAIN SDAOUT INT
RESET
TP31
D2
SMAJ5.0A
SW4 SD3
1
SCL
TP6
C
SD1
SW3 SD2
RL1
300
TP17
DGND
TP20
DGND
VDD
SW2
VEE
RPW1
300
HI
3
1
VEE
D7
VDD
ORANGE
APPROVED
AUTO
2
VDD
2
D23
SMAJ5.0A
C16
+ 10uF
16V
DESCRIPTION
REBUILD WITH CHANGE
JP4
C66
4.7uF
100V
1206
OPT
2
1
1
+3.3V
D28
SMBJ64A
OPT
2
+3.3V
TP16
1
JP5
REV
2
1
3
EXT VDD
D
R36
10
2
+3.3V SOURCE
1
USB VDD
2
ECO
SD4
SD3
SD2
SD1
AUTO
PSMN075-100MSE
2
D27
S1B
VEE
CUSTOMER NOTICE
A
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
TECHNOLOGY
KIM T.
DILIAN R.
TITLE: SCHEMATIC
IEEE802.3AT PoE QUAD PSE CONTROLLER
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
4
3
2
N/A
SCALE = NONE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
IC NO.
LTC4266CUHF
REV.
2
DEMO CIRCUIT 1366B
Wednesday, August 12, 2015
1
SHEET
1
OF
3
A
5
4
3
2
J5A
8
8
7
7
5
5
4
4
ETH1-230LD
6
3
6
6
9
5
10
2
13
1
14
3
2
RJ45 - 4 PORTS
A
RJ45 - 4 PORTS
J4A
1
PORT 1
2
1
R1N2
75
11
2kV
12
R1P2
75
3
C19
1000pF
4
D
1
T1
D
R1P1 75
C20 0.01uF 200V
R1N1 75
C27 0.01uF 200V
C17 1000pF 2kV
L1 BEAD
OUT1
B
RJ45 - 4 PORTS
J4B
J5B
8
8
7
7
5
5
4
4
ETH1-230LD
6
3
6
6
3
9
2
RJ45 - 4 PORTS
L2 BEAD
PORT 2
2
1
5
10
2
13
1
14
2kV
R2N2
75
11
R2P2
75
12
C34
1000pF
3
IN
FROM
PHY
4
C
1
T2
C
R2P1
75
C31 0.01uF 200V
R2N1
75
C38 0.01uF 200V
OUT
TO
PD
C28 1000pF 2kV
L3 BEAD
RJ45 - 4 PORTS
C
OUT2
J5C
8
8
7
7
5
5
4
4
ETH1-230LD
6
3
6
6
9
5
10
2
13
1
14
3
PORT 3
R3P2
75
2kV
R3N2
75
11
C40
1000pF
12
B
3
2
1
4
2
RJ45 - 4 PORTS
L4 BEAD
J4C
1
T3
B
R3P1
75
C45 0.01uF 200V
R3N1
75
C52 0.01uF 200V
C42 1000pF 2kV
L5 BEAD
RJ45 - 4 PORTS
D
OUT3
8
7
7
5
5
4
4
ETH1-230LD
6
3
6
6
9
5
10
2
13
1
14
3
PORT 4
J5
SHIELD
C49
1000pF
TP15
2kV
R4P2
75
R4N2
75
11
J4
SHIELD
12
A
3
2
1
4
2
CHASSIS GND
J5D
8
RJ45 - 4 PORTS
L6 BEAD
J4D
R4P1
R4N1
75
75
1
T4
A
CUSTOMER NOTICE
C56 0.01uF 200V
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
C53 1000pF 2kV
C60 0.01uF 200V
L7 BEAD
4
TITLE: SCHEMATIC
IEEE802.3AT PoE QUAD PSE CONTROLLER
SIZE
L8 BEAD
5
TECHNOLOGY
KIM T.
DILIAN R.
OUT4
3
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
2
N/A
SCALE = NONE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
IC NO.
LTC4266CUHF
REV.
2
DEMO CIRCUIT 1366B
Wednesday, August 12, 2015
1
SHEET
2
OF
3
5
4
Q12
Si2343DS
VDDP
D
2
R22
1.1M
3
R24
300
3
1
2
OUT4
1%
Q11
Si2343DS
VDDP
2
R19
1.1M
R21
300
3
1
2
Q10
Si2343DS
2
C
R16
1.1M
R18
300
3
1
D13
OUT2
Q9
Si2343DS
2
R6
1.1M
R8
300
3
R7
18M
1
REP1
5.1K
2
4
5
6
7
8
9
10
11
12
13
14
REP2
5.1K
REP3
5.1K
8
7
6
OUT2
1%
VDDP
2
3
USBVDD
SCL
SDAIN
C4
0.1uF
GREEN
R17
18M
1
1
OUT3
1%
VDDP
SDAOUT
D
GREEN
R20
18M
1
D14
OUT3
1
J6
GREEN
R23
18M
1
D15
OUT4
2
1
D12
OUT1
5
U3
24LC025
VCC
A0
WP
A1
SCL
A2
SDA
VSS
1
2
C
3
4
TP29
2
GREEN
OUT1
1%
OPTIONAL LED DRIVE
QUICKEVAL FOR DEMO ONLY
B
B
J7
VDD
AUTO
SD4
SD3
SD2
SD1
A1
A0
RX1
OPT
RX2
OPT
RX3
OPT
RX4
OPT
RX5
OPT
RX6
OPT
1
3
5
7
9
11
13
15
OPT
2
4
6
8
10
12
14
16
DEMO PURPOSES ONLY
CUSTOMER NOTICE
A
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
APP ENG.
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
TECHNOLOGY
KIM T.
DILIAN R.
TITLE: SCHEMATIC
IEEE802.3AT PoE QUAD PSE CONTROLLER
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
4
3
2
N/A
SCALE = NONE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
IC NO.
LTC4266CUHF
REV.
2
DEMO CIRCUIT 1366B
Wednesday, August 12, 2015
1
SHEET
3
OF
3
A