DEMO CIRCUIT 1599A LTC5583 QUICK START GUIDE LTC5583 DUAL 6GHz RMS POWER DETECTOR DESCRIPTION Demonstration circuit 1599A is a Mean-Squared Power Detector featuring the LTC®5583 IC. LTC5583 is a dual-channel RMS power detector, capable of measuring two AC signals. It provides 40dB of channel to channel isolation with no frequency separation at 2140MHz that is suited for measuring VSWR. The LTC5583 is a wide dynamic range Mean Squared RF Power Detector, operational from 40MHz to 6GHz. The input dynamic range with ±1dB nonlinearity is 60dB depending on frequency(from –58dBm to +2dBm, single-ended 50 input). The detector output voltage slope is normally 30mV/dB, and the typical output variation over temperature is ±0.5dB at 880MHz. The DC1599A Demo Circuit is ideal for frequency operation below 3.0GHz. It has the single ended input drive to LTC5583. The input A to output B (or input B to output A) isolation is 33dB at 2.7GHz, and degrades as input frequency increases. As a result, operating above 3GHz may require differential input matching for improved isolation. Temperature performance is optimized for 2140MHz. Contact LTC applications for more information. LTC is a trademark of Linear Technology Corporation Design files for this circuit board are available. Call the LTC factory. Typical Performance Summary (VCC = 3.3V, EN = HIGH, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1.) PARAMETER CONDITION Supply Voltage Supply Current VALUE 3.1V to 3.5V Envelope detector off 80.5mA Envelope detector on 90.1mA Shutdown Current EN = Lo 0.1μA EN Voltage Low, Chip Disabled HIGH, Chip Enabled 0.3V max 2V min EN Input Current VEN = 0V VEN = 3.3V 0μA 100μA Output Start Voltage No Input Signal Present 0.45V Rise Time 0.5V to 2.2V, 10% to 90%, CFLTRA=CFLTRB = 8.2nF, FRF = 100 MHz 140nS Fall Time 2.2V to 0.5V, 90% to 10%, CFLTRA=CFLTRB =8.2nF, FRF = 100 MHz 3.5uS Input Frequency Range Operation over wider frequency range with reduced performance 40MHz to 6GHz Linear Dynamic Range ±1 dB linearity error 63 dB RF Input Power Range CW, 50Ω, ±1dB Linearity Error -59 to 4 dBm f =450MHz Slope 29.6mV/dB Logarithmic Intercept -78.5dBm 1 LTC5583 Deviation from CW Response 12 dB peak-to-average ratio (4 carrier WCDMA) 0.4 INA to VOB isolation PINB = -45dBm, VOB= VOB pINB ±1 dB, Frequency Separation=0Hz 50dB INB to VOA isolation PINA = -45dBm, VOA= VOA pINA ±1 dB, Frequency Separation=0Hz 50dB Linear Dynamic Range ±1 dB linearity error 60 dB RF Input Power Range CW, 50Ω, ±1dB Linearity Error -58 to 2 dBm f =2140MHz Slope 29.6mV/dB Logarithmic Intercept -77.4dBm Deviation from CW Response 12 dB peak-to-average ratio (4 carrier WCDMA) 0.3 INA to VOB isolation PINB = -45dBm, VOB= VOB pINB ±1 dB, Frequency Separation=0Hz 40dB INB to VOA isolation PINA = -45dBm, VOA= VOA pINA ±1 dB, Frequency Separation=0Hz 40dB Linear Dynamic Range ±1 dB linearity error 59 dB RF Input Power Range CW, 50Ω, ±1dB Linearity Error -56 to 3 dBm f =2700MHz Slope 30mV/dB Logarithmic Intercept -74.9dBm Deviation from CW Response 12 dB peak-to-average ratio (WiMAX OFDM) 0.6dB INA to VOB isolation PINB = -45dBm, VOB= VOB pINB ±1 dB, Frequency Separation=0Hz 33dB INB to VOA isolation PINA = -45dBm, VOA= VOA pINA ±1 dB, Frequency Separation=0Hz 33dB Table 1. Jumper Description JUMPER FUNCTION JP1 Chip Enable. EN for High, DIS for Lo JP2 VCCN. Power supply to the envelop detector for both channels. HI=on, LO=off JP3 INV. Swap control for the polarity of VODF. HI=(VOB-VOA)+VOS, LO=(VOA-VOB)+VOS RANGE/SETTING (DEFAULT) EN LO LO QUICK START PROCEDURE Demonstration circuit 1599A is easy to set up to evaluate the performance of the LTC5583. Refer to Figure 1 for measurement equipment setup and follow the procedure below: 1. Connect voltmeter’s negative (-) lead to demo board GND test point(TP8 or TP9). 2. Connect voltmeter’s positive (+) lead to the demo board VOA(TP2) and VOB(TP5) to measure channel A and channel B output respectively. 3. Connect DC power supply’s negative (-) output to demo board GND(TP8 or TP9). 2 4. Connect DC power supply’s positive (+) output (3.1V to 3.5V) to demo board VCC test point(TP7). Do not exceed 3.8V, the absolute maximum supply voltage. Set VCCN jumper to LO, to turn off the envelope detector if not needed. Set the Swap jumper to LO for: VODF= (VOA-VOB)+VOS. Set swap to HI for: VODF=(VOB-VOA)+VOS 5. Connect signal generator’s output to demo board INPUT port (SMA connector J1 for channel A input, or J2 for channel B input) via coaxial cable. LTC5583 6. A 3dB attenuator may be inserted for broadband input match, the detected power range is shifted higher by 3dB. 7. Set the JP1 to EN to enable the IC. Now the detector is enabled (on) and is ready for measurement. 8. Apply RF input signal and measure OUTPUT DC voltages at VOA and VOB. Do not exceed +18dBm, the absolute maximum RF input power. NOTES: 1. The voltage on the EN test point must never exceed VCC + 0.3V. 2. For digitally modulated signals, an oscilloscope can be used to observe the AC components of the output. 3. Suggest to set VCCN LO when envelope detector is not used. This will result in lower power consumption. 4. Temperature compensation values for RT1 and RT2 may be different at different frequencies. See table 1 for additional information. Figure 1. Proper Test Equipment Setup 3 LTC5583 Frequency (MHz) RP1 (kΩ) RP2 RT1 (kΩ) (kΩ) RT2 (kΩ) 450 Open 0 11.5 1.13 880 Open 0 11.5 1.13 900 Open 0 11 0.953 1800 Open 0 12.1 1.5 2140 Open 0 9.76 1.1 2300 Open 0 10.5 1.43 2500 Open 0 10.5 1.43 2700 Open 0 8.87 1.21 Table 2. Suggested RT1 and RT2 values for the optimum temperature performance at various RF input frequencies. 4 TP7 GND GND TP9 TP8 3.1V - 3.5V VCC INB J2 J1 1 1 0603 R3 1 0.3pF C29 0.3pF C24 VCC 1nF C11 1uF C27 L2 0 DIS 1 EN C28 10nF JP1 VCC L1 0 3 INA 2 C22 1nF 1nF C17 VCC C15 1nF 1nF C12 C4 1nF VCC C21 1nF C18 20pF C9 20pF C6 1nF 75 R10 DECB VCCB EN VCCR VCCA DECA C26 20pF C25 1nF 6 5 4 3 2 1 75 R2 C3 20pF INPA 24 INPB 7 R8 OPT R11 0 RP1 23 INNB 8 INNA 22 RP2 9 FLTRA 21 FLTRB 10 100nF C2 13 14 15 16 17 18 1nF C23 100nF C30 100pF VCC 1nF C20 R4 OPT LO 1 1nF R9 0 R7 OPT 1% R6 1.10k 1% R5 9.76k R13 OPT 1. ALL CAPACITORS AND RESISTORS ARE 0402. NOTE: UNLESS OTHERWISE SPECIFIED, HI INV VCC C16 1nF C32 OPT 1nF 1nF 1 1nF C19 1 C14 C13 1 1 1nF C8 C5 OPT LO C10 R12 OPT 1 1 JP3 2 C7 1 R1 0 HI VCCN VCC JP2 2 U1 LTC5583IUF VOB RT2 VOS VODF RT1 VOA C31 100pF ENVA 20 ENVB 11 VCCN 19 INV 12 3 C1 1nF 3 VCC ENVA ENVB VOB VOS VODF VOA TP6 TP5 TP4 TP3 TP2 TP1 LTC5583 5 LTC5583 Bill of Materials: 6