MC33984PNATAD, Dual Intelligent High-Current Self-Protected Silicon High-Side Switch (4.0 ohm)

MC33984PNATAD
Rev 3.0, 05/2012
Freescale Semiconductor
Technical Data
Dual Intelligent High-Current
Self-Protected Silicon
High-Side Switch (4.0 mOhm)
33984
Thermal Addendum
High-Side Switch
Introduction
This thermal addendum is provided as a supplement to the MC33984 technical
datasheet. The addendum provides thermal performance information that may be
critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the datasheet.
Packaging and Thermal Considerations
This package is a dual die package. There are two heat sources in the package
independently heating with P1 and P2. This results in two junction temperatures,
TJ1 and TJ2, and a thermal resistance matrix with RθJAmn.
For m, n = 1, RθJA11 is the thermal resistance from Junction 1 to the reference
temperature while only heat source 1 is heating with P1.
98ARL10521D
16-TERMINAL PQFN
12 mm x 12 mm
For m = 1, n = 2, RθJA12 is the thermal resistance from Junction 1 to the
reference temperature while heat source 2 is heating with P2. This applies to RθJ21
and RθJ22, respectively.
Note For package dimensions, refer to
98ARL10521D.
TJ1
TJ2
=
RθJA11 RθJA12
.
RθJA21 RθJA22
P1
P2
The stated values are solely for a thermal performance comparison of one package to another in a standardized environment.
This methodology is not meant to and will not predict the performance of a package in an application-specific environment. Stated
values were obtained by measurement and simulation according to the standards listed below.
Standards
Table 1. Thermal Performance Comparison
1 = Power Chip, 2 = Logic Chip [°C/W]
Thermal
Resistance
m = 1,
n=1
m = 1, n = 2
m = 2, n = 1
m = 2,
n=2
RθJAmn (1) (2)
20
16
39
(2) (3)
6.0
2.0
26
RθJAmn (1) (4)
53
40
72
<0.5
0.0
1.0
RθJBmn
RθJCmn (5)
Notes:
1. Per JEDEC JESD51-2 at natural convection, still air
condition.
2. 2s2p thermal test board per JEDEC JESD51-7 and
JESD51-5.
3. Per JEDEC JESD51-8, with the board temperature on the
center trace near the power outputs.
4. Single layer thermal test board per JEDEC JESD51-3 and
JESD51-5.
5. Thermal resistance between the die junction and the
exposed pad; “infinite” heat sink attached to exposed pad.
1.0
0.2
1.0
0.2
* All measurements
are in millimeters
Note: Recommended via diameter is 0.5 mm. PTH (plated through
hole) via must be plugged / filled with epoxy or solder mask in order
to minimize void formation and to avoid any solder wicking into the
via.
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2006-2012. All rights reserved.
Figure 1. Surface Mount for Power PQFN
with Exposed Pads
AA
Transparent Top View
RST
CSNS
4
WAKE
6 5
FS
FSI
7
IN0
CS
SI
SCLK
SO
VDD
IN1
12 11 10 9 8
3
2
1
A
13
GND
14
VPWR
15
HS1
16
HS0
33984 Terminal Connections
16-Terminal PQFN
0.90 mm Pitch
12.0 mm x 12.0 mm Body
Figure 2. Thermal Test Board
Device on Thermal Test Board
Material:
Outline:
Single layer printed circuit board
FR4, 1.6 mm thickness
Cu traces, 0.07 mm thickness
80 mm x 100 mm board area,
including edge connector for
thermal testing
Area A:
Cu heat-spreading areas on board
surface
Ambient Conditions:
Natural convection, still air
Table 2. Thermal Resistance Performance
1 = Power Chip, 2 = Logic Chip (°C/W)
Thermal
Resistance
RθJAmn
Area A
(mm2)
m = 1,
n=1
m = 1, n = 2
m = 2, n = 1
m = 2,
n=2
0
55
42
74
300
41
31
66
600
38
29
64
RθJA is the thermal resistance between die junction and
ambient air.
This device is a dual die package. Index m indicates the
die that is heated. Index n refers to the number of the die
where the junction temperature is sensed.
33984
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
80
Thermal Resistance [ºC/W]
70
60
50
40
30
x
20
10
RθJA11
RθJA22
RθJA12 = RθJA21
0
0
300
600
Heat spreading area A [mm²]
Figure 3. Device on Thermal Test Board RθJA
Thermal Resistance [ºC/W]
100
10
x
1
0.1
1.00E-03
1.00E-02
RθJA11
RθJA22
RθJA12 = RθJA21
1.00E-01 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04
Time[s]
Figure 4. Transient Thermal Resistance RθJA (1 W Step Response)
Device on Thermal Test Board Area A = 600 (mm2)
33984
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
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Document Number: MC33984PNATAD
Rev 3.0
05/2012