AN5109, Parallel Mode for the Dual SOIC 24 V High-side Switch Family - Application Note

Freescale Semiconductor, Inc.
Application Note
Document Number: AN5109
Rev. 1.0, 5/2015
Parallel Mode
for the Dual SOIC 24 V High-side Switch Family
1
Introduction
This application note describes parallel mode operations and
sensing configurations for the following devices:
•
MC06XS4200
•
MC10XS4200
•
MC20XS4200
•
MC22XS4200
•
MC50XS4200
These intelligent high-side switches are designed for use in 24 V
systems such as trucks, busses, and special engines. They are
applicable to other industrial and 12 V applications as well. The low
RDS(on) channels can be used to control incandescent lamps,
LEDs, solenoids, or DC motors. Control, device configuration, and
diagnostics are performed through a 16-bit SPI interface, allowing
easy integration into existing applications. For complete feature
descriptions, refer to the individual data sheets for the devices.
Freescale analog ICs are manufactured using the SMARTMOS
process, a combinational BiCMOS manufacturing flow that
integrates precision analog, power functions and dense CMOS
logic together on a single cost-effective die.
© Freescale Semiconductor, Inc., 2015. All rights reserved.
Contents
1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Parallel Mode Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Output Parallel Mode Configuration . . . . . . . . . . . . . . . . . . . 3
4 Current Sense in Parallel Mode . . . . . . . . . . . . . . . . . . . . . . 3
5 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Parallel Mode Description
2
Parallel Mode Description
For the devices listed above, parallel mode provides a means of increasing output current beyond the capabilities of a single channel. In
parallel mode, current may be driven up to twice the maximum capability of a single channel. Output current is equally distributed between
the two channels.
Features
•
2x max. current of a single channel
•
Direct input control or SPI control with output synchronization
•
Open load ON, open load OFF and short to battery diagnostics, each channel reports its own diagnostics in FAULT_x registers
•
Current sensing up to overcurrent low threshold (OCLx)
In parallel mode, all active protections apply to both channels. Any activation on one channel turns off both channels:
•
Overcurrent detection based on Channel 0 configuration
•
Severe short-circuit
•
Overtemperature
•
Auto retry capability based on Channel 0 configuration
2.1
Pin Configuration for Parallel Mode
The pin configuration for parallel mode is as follows:
•
For direct input control: IN0 and IN1 connected together
•
CONF0 & CONF1 have same configuration either Motor or Bulb
•
HS0 and HS1 are connected together
Direct input control:
IN0 & IN1
connected together
Same overcurrent
profile: either both
CONFx connected
to GND or both left
open
VDD
CLOCK
RSTB
IN0
IN1
CSB
SCLK
SI
SO
CONF0
CONF1
FSOB
FSB
SYNC
CSNS
VPWR
HS0
HS0 and HS1
connected together
HS1
GND
Note: only
pins
that require
Note: only pins that require
specific
connection
for specific connections
for
parallel
operation
are
represented here
parallel operation are represented here
Figure 1. Pin Configuration for Parallel Mode
AN5109 Application Note Rev. 1.0 5/2015
2
Freescale Semiconductor, Inc.
Output Parallel Mode Configuration
3
Output Parallel Mode Configuration
Bit PARALLEL of register GCR has to be set to 1 to enable the parallel mode.
The switching configuration is defined by Channel 0 only. All contents on Channel 1 configuration is replaced by contents from Channel 0.
Only channel diagnostics remain independent. The enabling / disabling of each diagnostics is set separately for each channel (Bit D8, D7,
and D6 of CONFR_x register).
SI
Register
GCR
SI Data
D15
D14 D13 D12 D11 D10 D9
WDIN P
0 1
1
0
0
D8
D7
D6
PWM_en_1 PWM_en_0 PARALLEL
to enable
PWM
D5
D4
T_H_en
WD_dis
D3
D2
D1
VDD_FAIL_en CSNS1_en CSNS0_en
D0
OV_dis
set to 1
Figure 2. Parallel Mode Register Settings
4
Current Sense in Parallel Mode
Be aware that, in parallel mode, the current sense output might reflect either the sum of both channels’ current or the current from one
channel only. The low level overcurrent threshold depends on the current sense method used.
4.1
Current Sense: Sum of HS0 and HS1 Currents
VDD
CLOCK
RSTB
IN0
IN1
CSB
SCLK
SI
SO
CONF0
CONF1
FSOB
FSB
SYNC
CSNS
RCSNS
VPWR
HS0
IHS0 x CSRx
HS1
IHS1 x CSRx
+
GND
ICSNS = (IHS0 + IHS1) X CSRx
Figure 3. Current Sense: Sum of the Channels
AN5109 Application Note Rev. 1.0 5/2015
Freescale Semiconductor, Inc.
3
Current Sense in Parallel Mode
Figure 4 illustrates the configuration causing the CSNS pin to reflect the sum of the currents from both the HS0 and HS1 channels.
SI
Register
GCR
SI Data
D15
D14 D13 D12 D11 D10 D9
WDIN P
0 1
1
0
0
D8
D7
D6
PWM_en_1 PWM_en_0 PARALLEL
D5
D4
T_H_en
WD_dis
D3
D1
VDD_FAIL_en CSNS1_en CSNS0_en
set to 0
set to 1
to enable
PWM
D2
D0
OV_dis
set to 1
to sum current of
channels 0 and 1
set to 1
OCR_s WDIN P A0 1
0
0
0
HOCR_s
PR_s
Clock_int_s CSNS_ratio_s
TOCH_s
tOCM_s
OCH_s
OCM_s
OCL_s
High current (bit = 0)
or low current (bit = 1)
sensing mode
Figure 4. SPI Settings for Configuration for Current Sense Sum
NOTE
When selecting bit HOCR = 1 (bit D8 of OCR_s register) to sum two HSx currents, the level
overcurrent threshold is subsequently selected to either IOCL2 or IOCL3.
Activated Function
as CSNS Pin
D8
D6
D2
D1
x
x
0
0
Disabled
0
x
0
1
Current sensing on Channel 0
0
x
1
0
Current sensing on Channel 1
0
x
1
1
Temperature sensing
1
0
0
1
1
x
1
1
1
0
HOCR (D8)
OCL_s (bit D0)
Selected OCL Current Level
Current sensing on Channel 0
0
0
I_OCL1_x (default)
1
Temperature
0
1
I_OCL1_x
1
Current sensing summed currents of
channels 0 and 1
1
0
I_OCL2_x
1
1
I_OCL3_x
AN5109 Application Note Rev. 1.0 5/2015
4
Freescale Semiconductor, Inc.
Current Sense in Parallel Mode
Example
VDD
CLOCK
RSTB
IN0
IN1
CSB
SCLK
SI
SO
CONF0
CONF1
FSOB
FSB
SYNC
CSNS
VPWR
HS0
IHS0 x CSRx
IHS0 = 1.25 A
HS1
VPWR
RCSNS
VCSNS
Icontrol
IHS1
IHS2
=
=
=
=
=
=
20.2 V
1.0 kΩ
4.19 V
2.5 A
1.25 A
1.25 A
High current mode selected (CSR0)
CSR0 = 1/600 (MC50XS4200)
IHS1 x CSRx
IHS1 = 1.25 A
+
ICSNS = VCSNS/RCSNS = 4.19/1000
ICSNS = 4.19 mA
IHS0 + IHS1 = ICSNS/CSRx
IHS0 + IHS1 = 4.19 X 600 = 2.514 A
GND
RCSNS
ICSNS = (IHS0 + IHS1) X CSRx
VCSNS
A
IControl
Figure 5. Example of Current Sum
4.2
Current Sense: One Channel Only
VDD
CLOCK
RSTB
IN0
IN1
CSB
SCLK
SI
SO
CONF0
CONF1
FSOB
FSB
SYNC
CSNS
RCSNS
VPWR
HS0
IHS0 x CSRx
HS1
+
GND
ICSNS = IHS0 X CSRx
Figure 6. Current Sense on One Channel
AN5109 Application Note Rev. 1.0 5/2015
Freescale Semiconductor, Inc.
5
Current Sense in Parallel Mode
SI
Register
GCR
SI Data
D15
D14 D13 D12 D11 D10 D9
WDIN P
0 1
1
0
0
D8
D7
D6
PWM_en_1 PWM_en_0 PARALLEL
to enable
PWM
D5
D4
T_H_en
WD_dis
D3
D2
D1
VDD_FAIL_en CSNS1_en CSNS0_en
D0
OV_dis
set to 1
D2 D1 Activated Function at CSNS Pin
0
1
Current sensing on Channel 0
1
0
Current sensing on Channel 1
set to 0
OCR_s WDIN P A0 1
0
0
0
HOCR_s
PR_s
Clock_int_s CSNS_ratio_s
TOCH_s
tOCM_s
OCH_s
OCM_s
OCL_s
High current (bit = 0)
or low current (bit = 1)
sensing mode
Figure 7. SPI Settings for Current Sensing on One Channel
When selecting bit HOCR = 0, current sensing is either on Channel 0 or on Channel (HOCR bit is set to 1 to sum currents) 1. The low-level
overcurrent threshold is selected to IOCL1.
Activated Function
as CSNS Pin
D8
D6
D2
D1
x
x
0
0
Disabled
0
x
0
1
0
x
1
0
x
1
HDCR (D8)
OCL_s (bit D0)
Selected OCL Current Level
Current sensing on Channel 0
0
0
I_OCL1_x (default)
0
Current sensing on Channel 1
0
1
I_OCL1_x
1
1
Temperature sensing
1
0
I_OCL2_x
0
0
1
Current sensing on Channel 0
1
1
I_OCL3_x
1
x
1
1
Temperature
1
1
0
1
Current sensing summed currents of
channels 0 and 1
AN5109 Application Note Rev. 1.0 5/2015
6
Freescale Semiconductor, Inc.
Revision History
5
Revision History
Revision
Date
1.0
5/2015
Description
• Initial release
AN5109 Application Note Rev. 1.0 5/2015
Freescale Semiconductor, Inc.
7
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© 2015 Freescale Semiconductor, Inc.
Document Number: AN5109
Rev. 1.0
5/2015
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