DC981A/B - Schematic

5
+C6
4.7UF
63V
_
1
15V
15V
D
VDD48
E11
E7
C1
0.1UF
1
2
3
ENFORCE CLASS
EN
DIS
5
6
ENFCLS
VDD5
VDD48
SD
LEGACY
MIDSPAN
ENFCLS
11
OSC 7
ACCOUT 8
OUT 10
OUT 9
VSS
VSS
R2
1K
LED 1
PWRMGT 4
R6
1K
D3
CMLSH05-4
1
3
2
5
4
6
R5
510K
E3
VSS
CUSTOMER NOTICE
NOTES: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE IN OHMS, 0603.
ALL CAPACITORS ARE 0603.
2. INSTALL SHUNTS ON JP1-JP6 PIN 1 AND 2.
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
4
J5
SS-6468-NF-K1
RJ45
DS1608C-106
COILCRAFT
C7
0.47UF
100V
0805
3
J6
SS-6468-NF-K1
RJ45
1
2
3
6
C5
0.1UF
C4
0.1UF
100V
1
2
3
6
4
5
7
8
D2
SMAJ58A
4
5
7
8
MIDSPAN
PSE
B
JP5
JP4
ACCOMP DISCON
AC
DC
MIDSPAN OUT
APPROVALS
DRAWN:
CHECKED:
ENGINEER: DILIAN R.
DESIGNER:
TECHNOLOGY
KIM T.
APPROVED:
MIDSPAN IN
E9
CONTRACT NO.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
L1
10000UH
D1
BAS19
CHS
CHS
12
13
JP1 VDD5
PWRMGT
DIS
2
2
DIS
PM
E6
C
U1
LTC4263CS
14
JP2 VDD5
MIDSPAN
EN
MIDSPAN
CPM
1UF
JP6
PWRMGT
EN
LED
1
SW1
SD
3
JP3 VDD5
LEGACY
EN
LEGACY
C3
0.1UF
100V
RPM
12.4K
1%
0805
1
E8
MIDPSE
LED2
LN1351C-TR
GRN
2
R3
10K
DIS
A
C13
0.1UF
E5
VDD48
E1
VDD5
SD
B
VSS
E2
VSS
C
VDD5
VDD5
E4
1
VDD48
D7
D8
CMDZ15L CMDZ15L
2
1 2
1
VDD48
LED1
LN1451C-TR
AMBR
1
VDD48
(EXTERNAL 5V SUPPLY OPTIONAL)
2
VSS
2
J2
D
D6
S3BB
1
CHS
CHS
46V-57V
+
2
R4
5.1K
PANASONIC
EEVFK1J4R7R
1
VDD48
VDD48
3
2
J1
4
VOUT_MID
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
TITLE: SCHEMATIC
A
MAIN BOARD, SINGLE PORT AUTONOMOUS PSE
SIZE
A
DWG NO.
REV
DC981A-2 * LTC4263CS/LTC4263CDE
Thursday, June 22, 2006
DATE:
2
SHEET
1
A-2
1 OF 2
5
4
3
2
1
ENDPOINT PSE OPTIONS
VDD48
VDD48
D
PM
D
J3
PM
E10
VOUT_EP
2
3
13
5
VDD48
LED 1
PWRMGT 4
LEGACY
OSC 7
ACCOUT 8
MIDSPAN
ENFCLS
VSS
VSS
OUT 10
OUT 9
15
6
VDD5
SD
C11
0.1UF
1
2
5
6
C
R8
1K
3
4
1
7
8
2
9
C12
0.47UF
100V
0805
C10
0.1UF
100V
0603
D4
SMAJ58A
5
10
6
11
VO-
D5
CMLSH05-4
TD+
CT
TDRD+
RDVC1+
VC1VC2+
VC2-
12
R7
510K
B
J4
JK0-0044
OPTIONAL UNDER CONNECTOR LAYOUT
CHS
12
R1
2K
0805
CHS
C8
0.1UF
11
1
C
GND
14
2
C9
0.1UF
100V
0603
U2
LTC4263CDE
ENDPSE
LED3
LN1351C-TR
GRN
1
2
3
4
5
6
7
8
1
3
5
JP7
OPT
2
4
6
HD2X3-079
TO PHY
OUT TO PD
ENDPOINT PSE
13
1
LED 65
PM 4
X
VDD48 32
VOGND 1
HD1X6-079
2
TO
DAUGHTER
CARD
B
C2
1000PF,2KV
1206
CUSTOMER NOTICE
CONTRACT NO.
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
A
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
5
4
3
APPROVALS
DRAWN:
CHECKED:
APPROVED:
ENGINEER: DILIAN R.
DESIGNER:
TECHNOLOGY
KIM T.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
TITLE: SCHEMATIC
A
MAIN BOARD, SINGLE PORT AUTONOMOUS PSE
SIZE
A
DWG NO.
DC981A-2 - LTC4263CS/LTC4263CDE
Thursday, June 22, 2006
DATE:
2
SHEET
1
REV
A-2
2 OF 2
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