PDF Data Sheet Rev. SpA

Dual-Channel, 14-Bit CCD Signal Processor
and Precision Timing Core
AD9990
FEATURES
GENERAL DESCRIPTION
1.8 V AFETG core
Internal LDO regulators
24 programmable vertical clock signals
Correlated double sampler (CDS) with
−3 dB, 0 dB, +3 dB, and +6 dB gain
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)
14-bit, 32 MHz analog-to-digital converter (ADC)
Black level clamp with variable level control
Complete on-chip timing generator
Precision Timing core with ~488 ps resolution
On-chip 3 V horizontal and RG drivers
General-purpose outputs (GPOs) for shutter and
system support
On-chip driver for external crystal
On-chip sync generator with external sync input
112-ball CSP_BGA package, 8 mm × 8 mm, 0.65 mm pitch
The AD9990 is a highly integrated CCD signal processor for
digital still camera applications. It includes a complete analog
front end with analog-to-digital conversion and a full-function,
programmable timing generator for a 2-channel output CCD.
Each channel is specified up to 32 MHz. The timing generator is
capable of supporting up to 24 vertical clock signals to control
advanced CCDs. A Precision Timing® core allows adjustment of
high speed clocks with ~488 ps resolution at 32 MHz operation.
The AD9990 also contains eight general-purpose outputs that
can be used for shutter and system functions.
Each analog front end includes black level clamping, a CDS, a
VGA, and a 14-bit ADC. The timing generator provides all the
necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate
pulses, substrate clock, and substrate bias control.
The AD9990 is specified over an operating temperature range
of −25°C to +85°C.
APPLICATIONS
For more information about the AD9990, contact Analog Devices
via email at [email protected].
Digital still cameras
FUNCTIONAL BLOCK DIAGRAM
REFT_A REFB_A
REFT_B REFB_B
VREF_A
VREF_B
AD9990
–3dB, 0dB, +3dB, +6dB
CCDIN_A
CDS
14-BIT
ADC
VGA
14
6dB TO 42dB
CLAMP
–3dB, 0dB, +3dB, +6dB
CCDIN_B
CDS
3V INPUT
LDO
REG_A
1.8V OUTPUT
3V INPUT
HL_A, HL_B
H1A TO H4A, H1B TO H4B
XV1 TO XV24
SUBCK
14
CLAMP
DCLK
INTERNAL CLOCKS
2
2
DOUT
14
6dB TO 42dB
LDO
REG_B
1.8V OUTPUT
RG_A, RG_B
14-BIT
ADC
VGA
DATA
OUTPUT
MUX
SL
PRECISION
TIMING
GENERATOR
HORIZONTAL
DRIVERS
8
INTERNAL
REGISTERS
SCK
SDATA
24
VERTICAL
TIMING
CONTROL
SYNC
GENERATOR
GPO1 TO GPO8
HD
VD SYNC CLI
CLO
RST
06894-001
8
Figure 1.
Rev. SpB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2010 Analog Devices, Inc. All rights reserved.
AD9990
NOTES
©2007–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06894F-0-6/10(SpB)
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