5 D 4 3 2 1 Notes: - 4 layer PCB: 2 layers for Customer Reference and 2 layers for Evaluation. - 20 mil trace (minimum) on all power and ground routes. - Decoupling capacitors are physically close to U1 VDD and U2 VCC, respectively. - Designed for TSL4531FN. - All passive components are EIA0603 except C1 which is EIA0402. - Assembly drawing: - PCB drawing: D Evaluation Schematic Components mounted on bottom-side of PCB C2 CAP NP U2 1 2 3 4 C R2 Open A0 A1 A2 VSS VCC WP SCL SDA R3 Open 8 7 6 5 R4 10K EVDD C R1 O ohm 24LC04B Ground Customer Reference Schematic Components mounted on top-side of PCB J1 1 2 3 4 5 6 7 VDD I2C SDA DB Detect 5V0 3V0 GND SDA SCL INT IO DB Connector U1 B 1 2 C1 1 uF VDD GND SCL 4 SDA 3 B Ground TSL4531FN TP1 TP2 Ground A A Title TSL4531 Daughterboard 5 4 3 2 Size B Document Number Date: Tuesday, September 27, 2011 Rev C 07-07-XXXXX Sheet 1 1 of 1