NTMFS4898NF D

NTMFS4898NF
Power MOSFET
30 V, 117 A, Single N−Channel, SO−8FL
Features
•
•
•
•
•
Integrated Schottky Diode
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
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V(BR)DSS
RDS(ON) MAX
3.0 mW @ 10 V
30 V
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
N−CHANNEL MOSFET
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
D
Symbol
Value
Unit
VDSS
30
V
VGS
±20
V
ID
22.5
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.72
W
Continuous Drain
Current RqJA v
10 sec
TA = 25°C
ID
36.7
A
Continuous Drain
Current RqJA
(Note 2)
TA = 85°C
TA = 25°C
PD
7.23
W
TA = 25°C
ID
13.2
A
TA = 85°C
9.5
TA = 25°C
PD
0.93
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
117
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
73.5
W
TA = 25°C
IDM
234
A
TA = 25°C
IDmaxpkg
100
A
TJ,
TSTG
−55 to
+150
°C
IS
92
A
TC = 85°C
tp=10ms
Current limited by package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
84.4
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 39 Apk, L = 0.3 mH, RG = 25 W)
EAS
228
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 3
S
MARKING
DIAGRAM
26.5
Power Dissipation
RqJA (Note 2)
Pulsed Drain
Current
G
16.2
TA = 85°C
Steady
State
117 A
4.8 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Power Dissipation
RqJA, t v 10 sec
ID MAX
1
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
W
ZZ
S
S
S
G
4898NF
AYWZZ
D
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4898NFT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4898NFT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4898NF/D
NTMFS4898NF
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
1.7
Junction−to−Ambient – Steady State (Note 1)
RqJA
46
Junction−to−Ambient – Steady State (Note 2)
RqJA
134.2
Junction−to−Ambient − t v 10 sec
RqJA
17.3
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 1.0 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
V
26
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V,
VDS = 24 V
TJ = 25 °C
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 1.0 mA
40
mV/°C
500
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
4
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
1.5
gFS
ID = 30 A
2.2
ID = 15 A
2.2
ID = 30 A
3.4
ID = 15 A
3.4
VDS = 1.5 V, ID = 15 A
77
mV/°C
3.0
4.8
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
310
Total Gate Charge
QG(TOT)
24.5
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
3233
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
700
3.2
10
pF
nC
9
QG(TOT)
VGS = 10 V, VDS = 15 V,
ID = 30 A
49.5
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
17.6
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
23
28
8.3
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4898NF
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
td(ON)
Turn−On Delay Time
Rise Time
11.3
tr
Turn−Off Delay Time
td(OFF)
Fall Time
17.8
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
ns
37.3
tf
5.6
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
VGS = 0 V,
IS = 2.0 A
TJ = 25°C
0.38
TJ = 125°C
0.31
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
0.70
V
26.7
13.7
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
ns
13.0
QRR
17.3
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
0.20
TA = 25°C
1.5
1.4
W
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
TYPICAL CHARACTERISTICS
200
180
160
VGS = 4.4 V
TJ = 25°C
4.2 V
160
140
4.0 V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
7.5 V
10 V
140
120
3.8 V
100
3.6 V
80
3.4 V
60
40
3.2 V
20
0
3.0 V
2.8 V
0
0.5
1
1.5
2
2.5
3
3.5
4.5
4
VDS = 10 V
120
100
80
TJ = 125°C
60
TJ = 25°C
40
TJ = −55°C
20
0
5
1
1.5
2
2.5
3
3.5
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
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3
4.5
NTMFS4898NF
0.019
ID = 30 A
TJ = 25°C
0.017
0.015
0.013
0.011
0.009
0.007
0.005
0.003
0.001
3
4
6
5
7
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TYPICAL CHARACTERISTICS
0.005
TJ = 25°C
0.004
VGS = 4.5 V
0.003
VGS = 10 V
0.002
0.001
10
1.3
1.2
1.1
1.0
0.9
0.7
0.6
−50
−25
0
25
50
75
100
125
150
80
90
TJ = 125°C
1.0E−03
1.0E−04
TJ = 25°C
1.0E−06
5
10
15
20
25
30
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
VGS = 0 V
3000
2500
2000
Coss
500 Crss
4
100
TJ = 150°C
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Ciss
1000
70
Figure 5. On−Resistance Variation with
Temperature
4000
1500
60
TJ, JUNCTION TEMPERATURE (°C)
4500
C, CAPACITANCE (pF)
VGS = 0 V
1.0E−05
0.8
0
50
1.0E−02
IDSS, LEAKAGE (A)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
1.0E−01
ID = 30 A
VGS = 10 V
1.5
1.4
0
40
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.8
3500
30
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.7
1.6
20
8
12
16
20
24
28
32
11
QT
10
9
8
7
6
5
Qgs
Qgd
4
ID = 30 A
TJ = 25°C
VDD = 15 V
VGS = 10 V
3
2
1
0
0
5
10
15
20
25
30
35
40
45
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
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4
50
NTMFS4898NF
TYPICAL CHARACTERISTICS
30
1000
VDD = 15 V
ID = 15 A
VGS = 10 V
tf
100
t, TIME (ns)
IS, SOURCE CURRENT (A)
td(off)
tr
td(on)
10
1
1
10
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
10 ms
100 ms
1 ms
10 ms
VGS = 30 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
0.1
dc
1
10
100
250
ID = 39 A
200
150
100
50
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
160
140
120
100
gFS (S)
ID, DRAIN CURRENT (A)
5
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
10
0.01
10
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100
0.1
15
RG, GATE RESISTANCE (W)
1000
1
20
0
100
VGS = 0 V
TJ = 25°C
25
80
60
40
20
0
VDS = 1.5 V
0
15
30
45
60
75
90
DRAIN CURRENT (A)
Figure 13. gFS vs. Drain Current
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5
105
120
150
NTMFS4898NF
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE G
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
2X
0.20 C
4X
E1
2
3
q
E
2
1
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.10 C
SIDE VIEW
SOLDERING FOOTPRINT*
DETAIL A
3X
8X
0.10
C A B
0.05
c
4X
e/2
1
4
0.965
K
G
0.750
1.000
L
PIN 5
(EXPOSED PAD)
4X
1.270
b
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
1.20
1.35
1.50
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
1.330
2X
0.905
2X
E2
L1
M
0.495
4.530
3.200
0.475
D2
2X
BOTTOM VIEW
1.530
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NTMFS4898NF/D