PHILIPS PUMD6

DISCRETE SEMICONDUCTORS
DATA SHEET
ndbook, halfpage
MBD128
PUMD6
NPN/PNP resistor-equipped
transistor
Product specification
Supersedes data of 1997 Dec 15
1999 May 28
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistor
PUMD6
FEATURES
• Transistors with different polarity, each with a built-in
bias resistor R1 (typ. 4.7 kΩ)
6
handbook, halfpage
• No mutual interference between the transistors
• Simplification of circuit design
6
5
5
4
4
R1
• Reduces number of components and board space.
TR2
TR1
R1
APPLICATIONS
1
• Especially suitable for space reduction in interface and
driver circuits
2
3
Top view
• Inverter circuit configurations without use of external
resistors.
Fig.1
1
MAM381
2
Simplified outline (SC-88; SOT363)
and symbol.
DESCRIPTION
NPN/PNP resistor-equipped transistors in an SC-88
(SOT363) plastic package.
PINNING
PIN
DESCRIPTION
1, 4
emitter
TR1; TR2
2, 5
base
TR1; TR2
6, 3
collector
TR1; TR2
1
3
2
MGA893 - 1
MARKING
TYPE NUMBER
PUMD6
1999 May 28
MARKING CODE
Fig.2 Equivalent inverter symbol.
Dt6
2
3
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistor
PUMD6
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
−
50
V
VCEO
collector-emitter voltage
open base
−
50
V
VEBO
emitter-base voltage
open collector
−
10
V
VI
input voltage
positive
−
+40
V
negative
−
−10
V
IO
output current (DC)
−
100
mA
ICM
peak collector current
−
100
mA
Ptot
total power dissipation
−
200
mW
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
−
150
°C
Tamb
operating ambient temperature
−65
+150
°C
−
300
mW
Tamb ≤ 25 °C; note 1
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
Note
1. Transistor mounted on an FR4 printed-circuit board.
1999 May 28
3
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistor
PUMD6
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
VALUE
UNIT
416
K/W
note 1
Note
1. Transistor mounted on an FR4 printed-circuit board.
CHARACTERISTICS
Tamb = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Per transistor; for the PNP transistor with negative polarity
ICBO
collector cut-off current
IE = 0; VCB = 50 V
−
−
100
nA
ICEO
collector cut-off current
IB = 0; VCE = 30 V
−
−
1
µA
IB = 0; VCE = 30 V; Tj = 150 °C
−
−
50
µA
nA
IEBO
emitter cut-off current
IC = 0; VEB = 5 V
−
−
100
hFE
DC current gain
IC = 1 mA; VCE = 5 V
200
−
−
VCEsat
collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA
−
−
100
mV
R1
input resistor
3.3
4.7
6.1
kΩ
−
−
2.5
pF
IE = ie = 0; VCB = −10 V; f = 1 MHz −
−
3
pF
NPN transistor
Cc
collector capacitance
IE = ie = 0; VCB = 10 V; f = 1 MHz
PNP transistor
Cc
1999 May 28
collector capacitance
4
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistor
MGS329
103
handbook, halfpage
PUMD6
MGS330
103
VCEsat
hFE
(V)
(1)
(2)
102
(1) (2) (3)
(3)
102
10−1
1
10
IC (mA)
10
10−1
102
TR1 (NPN); VCE = 5 V.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −40 °C.
TR1 (NPN); IC/IB = 20.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −40 °C.
Fig.3
Fig.4
DC current gain as a function of collector
current; typical values.
MGS331
103
handbook, halfpage
hFE
1
10
VCEsat
(2)
(V)
102
Collector-emitter saturation voltage as a
function of collector current; typical values.
MGS330
103
(1)
IC (mA)
(3)
102
102
(1) (2) (3)
10
10−1
1
10
IC (mA)
10
10−1
102
TR2 (PNP); VCE = −5 V.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −40 °C.
TR2 (PNP); IC/IB = 20.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −40 °C.
Fig.5
Fig.6
DC current gain as a function of collector
current; typical values.
1999 May 28
5
1
10
IC (mA)
102
Collector-emitter saturation voltage as a
function of collector current; typical values.
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistor
PUMD6
PACKAGE OUTLINE
Plastic surface mounted package; 6 leads
SOT363
D
E
B
y
X
A
HE
6
v M A
4
5
Q
pin 1
index
A
A1
1
2
e1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
SOT363
1999 May 28
REFERENCES
IEC
JEDEC
EIAJ
SC-88
6
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
Philips Semiconductors
Product specification
NPN/PNP resistor-equipped transistor
PUMD6
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 May 28
7
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© Philips Electronics N.V. 1999
SCA 65
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Printed in The Netherlands
115002/02/pp8
Date of release: 1999 May 28
Document order number:
9397 750 05342