INTEGRATED CIRCUITS DATA SHEET TDA4800 Vertical deflection circuit for monitor applications Product specification Supersedes data of February 1992 File under Integrated Circuits, IC02 1997 Mar 27 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 FEATURES GENERAL DESCRIPTION • Fully integrated, few external components The TDA4800 is an integrated circuit for vertical deflection primarily in monitors (and TV receivers). The complete circuit consists of 11 main functional blocks as shown in Fig.1. • RC oscillator with wide sync range of 1 : 3 (e.g. 50 to 150 Hz) • Synchronization by positive or negative going sync pulse • Blanking pulse duration is determined externally • Dual frequency criterion for automatic amplitude switch-over (e.g. 50 to 60 Hz) • Guard circuit for screen protection • Sawtooth generator with buffer stage supplied by external voltage • Preamplifier • Power output stage with thermal and SOAR protection • Flyback generator • Internal voltage stabilizer. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP1 supply voltage (pin 6) 10 − 30 V VP2 supply voltage (pin 10) 10 − 45 V − 215 − mA − − 2.6 A − − 135 Hz 1.0 − 6.0 V −0.5 − −0.7 V −20 − +70 °C IP supply current (pins 6 and 10) I7(p-p) output current (peak-to-peak value) fsync picture frequency V3 positive sync input pulse V3 negative sync input pulse Tamb operating ambient temperature note 1 notes 1 and 2 note 3 Notes 1. Measured in Fig.4. 2. fo = 45 Hz (fsync(max) = 3fo). 3. Ptot = 3.6 W for Rth(j-a) = 20 K/W. ORDERING INFORMATION TYPE NUMBER TDA4800 1997 Mar 27 PACKAGE NAME DESCRIPTION VERSION DBS13P plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6 2 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 BLOCK DIAGRAM handbook, full pagewidth TDA4800 BLANKING PULSE GENERATOR SYNC CIRCUIT VOLTAGE STABILIZER GUARD CIRCUIT +2 V RAMP BUFFER GENERATOR STAGE OSCILLATOR POWER OUTPUT STAGE PREAMPLIFIER FLYBACK GENERATOR THERMAL AND SOAR PROTECTION FREQUENCY DETECTOR 1 2 3 4 5 6 7 8 9 10 11 12 13 C8 R3 P1 frequency criterion C4 R4 C1 R1 (frequency) R17 R2 D1 1N4148 linearity vertical deflection unit 6.5 Ω R6 R5 C2 C10 amplitude R8 sync input blank output C9 R15 R16 R11 R14 C12 R12 Vamplitude R9 VP2 = 23 V Fig.1 Block diagram. 1997 Mar 27 C6 C7 P2 or R13 C5 R10 C11 R7 D2 BAX18 6.5 mH 3 MHA590 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 PINNING SYMBOL PIN DESCRIPTION OSCR 1 oscillator resistor OSCC 2 oscillator capacitor SYBO 3 sync input; blanking pulse output SOUT 4 sawtooth output PREI 5 preamplifier input VP1 6 supply voltage 1 SOUT 4 OUTP 7 deflection output PREI 5 GND 8 ground CFLY 9 pin for the flyback generator capacitor VP2 10 supply voltage 2 SGEN 11 sawtooth generator BPDU 12 blanking pulse duration FRQC 13 frequency criterion handbook, halfpage OSCR 1 OSCC 2 SYBO 3 VP1 6 OUTP 7 TDA4800 GND 8 CFLY 9 VP2 10 SGEN 11 BPDU 12 FRQC 13 MHA584 Fig.2 Pin configuration. 1997 Mar 27 4 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 The blanking pulse duration is determined by the values of external components R13 and C6 at pin 12: tbl = R13 × C6 × Ln2. FUNCTIONAL DESCRIPTION The complete circuit consists of the following functional blocks as shown in Fig.1: 1. Oscillator Frequency detector with storage (pin 13) 2. Synchronization circuit At the end of the scanning period a frequency detector detects the oscillator frequency (see “Note” below). 3. Blanking pulse generator 4. Frequency detector and storage When this frequency is above the threshold a flip-flop is set to store this information. The output is an open collector output. 5. Ramp generator 6. Buffer stage 7. Preamplifier NOTE 8. Power output stage Frequency detector change-over at pin 13 from low (= low frequency) to high (= high frequency) is determined by fo: fthreshold = 1.23 × fo. 9. Flyback generator 10. Guard circuit 11. Voltage stabilizer. Ramp generator (pin 11) Oscillator (pins 1 and 2) The ramp generator consists of two external series capacitors C4 and C5, external charge resistor R12 (connected to pin 11), and an internal differential amplifier which is synchronously switched by the oscillator. The oscillator is an RC-oscillator with a threshold value switch, which ensures very good frequency stability. The upper and lower threshold voltages are defined by an internal voltage divider. External capacitors C4 and C5 at pin 11 are charged by the charging current via the external charge resistor R12 until oscillator flyback starts. C4 and C5 are then discharged via pin 11 by an internal resistor and transistor. This generates a positive-going ramp voltage. An external capacitor C1 at pin 2 is charged by a constant current source. When the scan voltage of C1 reaches the upper threshold voltage, oscillator flyback starts. Capacitor C1 discharges via an internal resistor and transistor until the lower threshold is reached. Buffer stage (pin 4) The constant charge current and free-running frequency fo are adjusted by an external resistor R1 at pin 1: 1 f o = -------------------------------- with K = 0.68. K × R1 × C1 The buffer stage consists of two emitter followers. The ramp voltage is fed via the buffer stage and is available at pin 4 with a low ohmic output impedance. With R4 and P1 it generates a ramp function, which, together with the feedback network of the deflection yoke, gives a high degree of linearity at the picture tube. The linearity can be adjusted by P1. Synchronization circuit (pin 3) A positive- or negative-going pulse fed to pin 3 synchronizes the oscillator by lowering the upper threshold voltage. The synchronizing range is fo to 3fo. For example: fo = 50 Hz → fsync(max) = 150 Hz. Preamplifier (pin 5) The preamplifier is a differential amplifier. The non-inverting input is fixed at about 2 V by an internal voltage divider. The inverting input at pin 5 is connected to the ramp voltage via R3 and feedback network P2, R5 to R11, R15, R16, C7, C10 and C11. Blanking pulse generator (pin 3) Also at pin 3 a blanking pulse is available. Diode D1 separates the synchronization pulse from the blanking pulse. During scanning, the external capacitor C6 at pin 12 is charged to an internal stabilized voltage Vstab2. The blanking pulse starts with the beginning of oscillator flyback; then capacitor C6 discharges via the external resistor R13 at pin 12. The blanking pulse stops when the capacitor voltage is 1⁄2Vstab2. 1997 Mar 27 Power output stage (pin 7) The power output stage is an amplifier with a quasi-complementary class-B output. The output is connected to pin 7. The power stage includes SOAR and thermal protection. 5 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 Flyback generator (pin 9) Voltage stabilizer The flyback generator has an external capacitor C8 at pin 9. During scanning, the internal circuit switches pin 9 almost to ground; thereby C8 is charged by the supply voltage via external components R14 and D2. The voltage stabilizer circuit provides a stable operating voltage of about 7.5 V for several internal circuits of the TDA4800. During the flyback time pin 9 is switched almost to the supply voltage, so that the supply voltage for the power output stage (pin 6) is nearly doubled. This high flyback voltage ensures a very short flyback time. Guard circuit (pin 3) When the vertical deflection current is absent (e.g. short-circuited, or open-circuited of the yoke) the guard circuit changes the blanking pulse at pin 3 into a DC signal which blanks the beam current to protect the screen. Also an oscillator defect (C1 short-circuited or R1 disconnected from pin 1) switches on the guard circuit. INTERNAL CIRCUITRY handbook, full pagewidth 10 11 12 13 Vstab TDA4800 1 2 3 4 5 6 7 8 9 MHA588 Fig.3 Internal circuitry. 1997 Mar 27 6 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MAX. UNIT 0 6 V V11 0 24 V V12 0 6 V V13 0 50 V 0 50 V V9 0 50 V V7 0 60 V V6 0 60 V V5 0 6 V V4 0 24 V V3 −0.7 +6 V 0 −1 mA I3 +3 −10 mA I4 0 −5 mA V2 V10 I1 voltages MIN. supply voltages (VP) currents I6, I7, I8 note 1 I9 −1.5 +1.5 A I11 −0.1 +30 mA −25 +150 °C Tstg storage temperature Tamb operating ambient temperature note 2 −20 +70 °C Tj junction temperature note 3 − 150 °C Ptot total power dissipation note 2 − − W VESD ESD sensitivity note 4 −2000 +2000 V Notes 1. I6, I7 and I8 are limited by SOAR protection circuit that ensures that short-circuiting between the output pin 7 and supply voltage or ground does not destroy the output stage. A short-circuit may be soldered into the printed-circuit board or may sometimes (non-periodically) occur in the applied circuit. 2. The maximum value for the operating ambient temperature range and the power dissipation depends on the heatsink. 3. Internally limited by thermal protection: switching temperature point at Tj = 150 ±8 °C. 4. Human body model: 1.5 kΩ, 100 pF, 5 pulses. THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT Rth(j-a) thermal resistance from junction to ambient 20 K/W Rth(j-mb) thermal resistance from junction to mounting base 5 K/W 1997 Mar 27 7 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 CHARACTERISTICS All voltages are measured to GND (ground; pin 8); Tamb = 25 °C; VP = 23 V; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP1 supply voltage (pin 6) 10 − 30 V VP2 supply voltage (pin 10) 10 − 45 V I10 supply current V10 = 25 V; V5 = 3 V without load − 12 − mA I6 supply current V6 = 25 V; V5 = 1 V without load − 20 − mA I6 supply current V6 = 25 V; V5 = 3 V without load − 5 − mA V7(min) minimum output voltage I7 = 1 A − 1.4 1.65 V V7(max) maximum output voltage I7 = −1 A V6 − 2.3 V6 − 2.0 − V V9 output voltage during flyback I9 = −1 A − V10 − 2.2 − V I7 output current − − ±1.3 A I9 output current − − ±1.3 A I5 preamplifier input current − −0.1 − µA V1 stabilized voltage 6.1 6.8 7.3 V V3 blanking pulse output voltage − 5.7 − V R3 blanking pulse output resistance − 300 − Ω I3 blanking pulse output current 0 − −3 mA tbl blanking pulse duration 640 680 730 µs V11 output voltage ramp generator 0.3 − 20 I11 output current ramp generator −2 − 15 × V13 output voltage frequency detector − − 1.0 V I13 leakage current frequency detector higher frequency V13 = 50 V − − 1.0 µA V4 output voltage buffer stage 0 − 20 V R = 100 kΩ; C = 10 nF (pin 12) lower frequency I13 = 1 mA V 103 µA I4 output current buffer stage − − −4.0 mA V3 synchronizing input voltage positive sync 1.0 − 6.0 V V3 synchronizing input voltage negative sync −0.5 − −0.7 V tolerance of free running oscillator without sync −3.0 − +3.0 % − K−1 K−1 ∆f 1 ----- × -------------f ∆T mb oscillator temperature dependency Tmb = 20 to 100 °C − 10−4 ∆f 1 ----- × ---------f ∆V P oscillator voltage dependency − 4 × 10−4 − fo -----------f sync synchronizing ratio 1 : 2.9 1:3 − 1997 Mar 27 VP = 10 to 30 V 8 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 TEST AND APPLICATION INFORMATION handbook, full pagewidth TDA4800 BLANKING PULSE GENERATOR SYNC CIRCUIT VOLTAGE STABILIZER GUARD CIRCUIT +2 V RAMP BUFFER GENERATOR STAGE OSCILLATOR PREAMPLIFIER POWER OUTPUT STAGE FLYBACK GENERATOR THERMAL AND SOAR PROTECTION FREQUENCY DETECTOR 1 2 3 4 5 6 7 8 9 100 µF 47 kΩ 100 kΩ 100 nF 100 kΩ 15 kΩ 12 13 frequency criterion 50 Hz: low 60 Hz: high linearity 1N4148 10 kΩ 47 nF 10 µF or vertical deflection unit 6.5 Ω 15 kΩ 4.7 kΩ amplitude sync input 2.2 kΩ blank output 100 Ω 120 Ω BAX18 6.5 mH 560 Ω (0.5 W) 2200 µF 0.82 Ω (0.5 W) 100 nF 5.6 Ω 1.5 kΩ 100 µF 3.3 Ω (4 W) 100 nF 562 kΩ Vamplitude VP2 = 23 V 9 180 kΩ (R) 100 nF Fig.4 Test and application circuit. 1997 Mar 27 11 100 nF 47 kΩ 330 kΩ (frequency) 10 MHA589 10 nF (C) blank pulse duration: tbl = R × C × Ln2 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 TDA4800 in the test and application circuit (see Fig.4) SYMBOL PARAMETER CONDITIONS TYP. UNIT VP2 supply voltage 23 V IP supply current 215 mA V7 DC output voltage 11.8 V V7M peak output voltage 45 V I7 output current 0.8 A IY(p-p) vertical deflection current (peak-to-peak value) 1.5 A tfb flyback time 0.3 ms tbl blanking pulse duration 1.25 ms Ptot total power dissipation 3.3 W fo free running oscillator frequency 45 Hz 1997 Mar 27 without sync 10 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 PACKAGE OUTLINE DBS13P: plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6 non-concave Dh x D Eh view B: mounting base side d A2 B j E A L3 L Q c 1 13 e1 Z e e2 m w M bp 0 5 v M 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A2 bp c D (1) d Dh E (1) e e1 e2 Eh j L L3 m Q v w x Z (1) mm 17.0 15.5 4.6 4.2 0.75 0.60 0.48 0.38 24.0 23.6 20.0 19.6 10 12.2 11.8 3.4 1.7 5.08 6 3.4 3.1 12.4 11.0 2.4 1.6 4.3 2.1 1.8 0.8 0.25 0.03 2.00 1.45 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-03-11 SOT141-6 1997 Mar 27 EUROPEAN PROJECTION 11 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 MOUNTING INSTRUCTIONS FOR 13-LEAD DBS13P POWER PACKAGE The rise in temperature caused by power dissipation in the circuit is reduced by adding a heatsink with a sufficiently low thermal resistance: Rth(mb-h) + Rth(h-a) = Rth(mb-a) (e.g. the heatsink of Fig.5). It is possible to attach the package to the heatsink by screws (Fig.6) or by a compression spring (Fig.7). A layer of silicon grease between the heatsink and the mounting base optimizes thermal contact. 86 50 1.5 18.5 10.5 27 3.5 3.5 10 27 5 MHA585 M2.5 (2x) 22.5 63.5 Dimensions in mm. Fig.5 Heatsink made of black-leaded Aluminium. page ,, ,, ,, ,, ,, ,, ,, ,, ,, Fig.6 heatsink handbook, halfpage 6 8.5 4.5 12 22 0.4 PC board 30° MHA587 MHA586 Package and heatsink attached by screws. 1997 Mar 27 27 Dimensions in mm. Fig.7 Compression spring for easily attaching the package to the heatsink of Fig.5. 12 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Mar 27 13 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 NOTES 1997 Mar 27 14 Philips Semiconductors Product specification Vertical deflection circuit for monitor applications TDA4800 NOTES 1997 Mar 27 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547047/1200/02/pp16 Date of release: 1997 Mar 27 Document order number: 9397 750 01396