AN-1085 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Multiplying DACs—AC/Arbitrary Reference Applications by Liam Riordan INTRODUCTION Multiplying DACs offer an ideal building block for multiplying an arbitrary or ac voltage signal. The buffered current output DAC architecture is based on a noninverting gain amplifier structure. A multiplying DAC uses an R-2R architecture to replicate the functionality of the variable RDAC resistor shown in Figure 1. The input impedance to the DAC seen at the VREF pin is fixed, and the output impedance is code dependent to give the equivalent variable RDAC value. A multiplying digital-to-analog converter (DAC) differs from the conventional fixed reference DAC by having the ability to operate with an arbitrary or ac reference signal. This application note details the basic theory behind current output multiplying DACs, and why these DACs are so suitable for ac voltage and arbitrary voltage conditioning. BASIC WAVEFORM ATTENUATION The terms AD55xx and AD54xx used in this application note reference the multiplying DACS listed on www.analog.com/MultiplyingDAC. A simple method of adjusting the gain of an ac signal is to use the classic inverter op amp stage, choose an amplifier with sufficient bandwidth, and adjust the gain by using the following equation: VOUT = −[RDAC/RFB(VIN)] FUNCTIONAL BLOCK DIAGRAM AC REFERENCE IOUT DAC RFB 0V A1 0V ATTENUATED REFERENCE Figure 1. Inverting Gain Configuration Rev. A | Page 1 of 8 09275-001 RDAC AN-1085 Application Note TABLE OF CONTENTS Introduction ...................................................................................... 1 Key DAC Specifications for Signal Conditioning .........................5 Basic Waveform Attenuation .......................................................... 1 Multiplying Bandwidth ................................................................5 Functional Block Diagram .............................................................. 1 Analog Total Harmonic Distortion.............................................5 Multiplying DACs ............................................................................. 2 Multiplying Feedthrough Error ...................................................5 Adding Gain .................................................................................. 3 Choosing the Correct Op Amp .......................................................6 Positive Voltage In/Positive Voltage Out ................................... 3 Single-Ended-to-Differential Configuration ............................ 4 Stability Issues ............................................................................... 4 REVISION HISTORY 2/13—Rev. 0 to Rev. A Changes to Equation in Stability Issues Section ........................... 4 9/10—Revision 0: Initial Version Rev. A | Page 2 of 8 Application Note AN-1085 MULTIPLYING DACS ADDING GAIN In a multiplying DAC, current is steered to either the virtual ground connected to the IOUT1 node or the ground node (in some parts this is the IOUT2 node), which allows for a very low glitch output voltage (see Figure 2). In applications where the output voltage must be greater than VIN, gain can be added with an additional external amplifier, or it can be achieved in a single stage. One of the key advantages in using an IOUT DAC in this configuration is that the integrated RFB resistor is matched to the RDAC equivalent resistor allowing for very low gain temperature coefficient errors. Increase the gain of the circuit by using the recommended configuration shown in Figure 3. R1, R2, and R3 should have similar temperature coefficients, but they must not match the temperature coefficients of the DAC. When an output amplifier is connected in unipolar mode, as shown in Figure 2, the output voltage is given by D VOUT = − n × V REF 2 POSITIVE VOLTAGE IN/POSITIVE VOLTAGE OUT To generate a positive voltage output from a multiplying DAC configuration, an extra inverting amplifier can be added to the signal chain to reinvert the output. Another option is to select a part with uncommitted resistors, as shown in Figure 4. The advantage with uncommitted resistors is that they have very similar temperature coefficients. where: D is the fractional representation of the digital word loaded to the DAC. D = 0 to 255 (8-bit AD5450). = 0 to 1023 (10-bit AD5451). = 0 to 4095 (12-bit AD5452). = 0 to 16,383 (14-bit AD5453). = 0 to 65,536 (16-bit AD5543). n is the number of bits. In brief, the output signal of a multiplying DAC is proportional to the product of the reference input and the digital input number. AC REFERENCE VREF 0V C1 RFB IOUT1 AD55xx SYNC SCLK A1 0V GND SDIN ATTENUATED REFERENCE GND MICROCONTROLLER 09275-002 VDD Figure 2. Multiplying DAC, VOUT = 0 V to −VREF AC REFERENCE VREF SYNC AD55xx SCLK IOUT1 A1 0V GND SDIN R3 R2 GND GAINED OUTPUT MICROCONTROLLER R2 + R3 R1 R2 × R3 R1 = R2 + R3 GAIN = Figure 3. Signal Gain Using Multiplying DACs Rev. A | Page 3 of 8 09275-003 R1 0V C1 RFB VDD AN-1085 Application Note A2 C2 ROFS VREF RCOM RFB C1 AC REFERENCE ATTENUATED REFERENCE AD55xx R1 IOUT1 0V VDD A1 0V GND SCLK SDN GND 09275-004 SYNC MICROCONTROLLER Figure 4. Multiplying DAC, VOUT = 0 V to VREF A2 A3 C2 VREF RCOM ROFS 1.5V RFB C1 AC REFERENCE DIFFERENTIAL OUTPUT VOLTAGE AD55xx R1 IOUT1 1.5V VDD A1 GND SCLK A4 SDN 1.5V GND 09275-005 SYNC MICROCONTROLLER Figure 5. Single-Ended-to-Differential Configuration SINGLE-ENDED-TO-DIFFERENTIAL CONFIGURATION To generate a differential output from this configuration, two extra op amps are required. See the CN-0143 Circuit Note, Single-Ended-to-Differential Converters for Voltage Output and Current Output DACs Using the AD8042 Op Amp, for detailed information on this. with the internal RFB of the DAC (see Figure 2). If the value of C1 is too small, it can produce waveform distortion at the output, and if the value of C1 is too large, it can adversely affect the bandwidth of the system. Because the internal output capacitance of the DAC varies with code, it is difficult to fix a precise value for C1. The value is best approximated according to the following equation: STABILITY ISSUES C1 = An important component to take into account in achieving the desired waveform conditioning signal is the compensation capacitor. The internal output capacitance of the DAC introduces a pole into the open-loop response that can cause ringing or instability in the closed-loop ramp profiling circuit. To compensate for this, an external feedback capacitor, C1, is usually connected in parallel 2CO π × RFB × GBW where: GBW is the small signal unity-gain bandwidth product of the op amp in use. CO is the output capacitance of the DAC. Rev. A | Page 4 of 8 Application Note AN-1085 KEY DAC SPECIFICATIONS FOR SIGNAL CONDITIONING MULTIPLYING BANDWIDTH 3 TA = 25°C VDD = 5V GAIN (dB) 0 –3 V1 V2 V3 V4 V5 FREQUENCY (Hz) Figure 7. Total Harmonic Distortion MULTIPLYING FEEDTHROUGH ERROR The multiplying feedthrough error is defined as the error due to capacitive feedthrough from the reference input to the DAC output when all 0s are loaded to the DAC. Ideally, every time a bit drops 6 dB loss incurs in the gain extending to DB0 (see Figure 8). However, for lower bits, the multiplying feedthrough affects the gain of the part. This is shown in Figure 8 by the flat lines tailing upward for the lower bits. For example, at DB2 for a 14-bit DAC at 1 MHz, it should be 72 dB; however, because of feedthrough, it is actually 66 dB. 10 = ±2V, AD8038 C COMP = 1pF = ±2V, AD8038 C COMP = 1.5pF = ±15V, AD8038 C COMP = 1pF = ±15V, AD8038 C COMP = 1.5pF = ±15V, AD8038 C COMP = 1.8pF 100k 0 –10 1M 10M FREQUENCY (Hz) Figure 6. Multiplying Bandwidth ANALOG TOTAL HARMONIC DISTORTION 2 2 2 V2 + V3 + V4 + V5 THD = 20 log V1 2 DB12 DB11 DB10 –30 DB9 DB8 –40 –50 Analog total harmonic distortion is a mathematical representation of the harmonic content in the multiplied waveform signal. It is the rms sum of the harmonics (V2, V3, V4, and V5) of the DAC output to the fundamental value, V1, given by TA = 25°C LOADING ZS TO FS ALL ON DB13 –20 100M GAIN (dB) –9 10k VREF VREF VREF VREF VREF 09275-079 –6 DB7 DB6 DB5 –60 DB4 DB3 –70 DB2 –80 10k VDD = 5V VREF = ±3.5V CCOMP = 1.8pF AD8038 AMPLIFIER 100k 1M 10M FREQUENCY (Hz) Figure 8. Multiplying Feedthrough Error Rev. A | Page 5 of 8 09275-108 The multiplying bandwidth is the reference input frequency at which the gain is −3 dB. For a given device, it is a function of amplitude and the choice of compensation capacitance. Figure 6 shows multiplying bandwidth plots for the AD5544, AD5554, or AD545x current output DACs, which can multiply signals up to 12 MHz. The 350 MHz bandwidth of the accompanying low power AD8038 op amp insures that the op amp introduces insignificant dynamic errors on this scale. 09275-007 MAGNITUDE (dB) Some of the key selected ac specifications that must be taken into account when multiplying an ac/arbitrary reference input signal include multiplying bandwidth, analog total harmonic distortion, and multiplying feedthrough error. 100M AN-1085 Application Note CHOOSING THE CORRECT OP AMP Multiplying DAC circuit performance is strongly dependent on the ability of the selected op amp to maintain the voltage null at the ladder output and perform the current-to-voltage conversion. For best dc accuracy, it is important to select an operational amplifier with low offset voltage and bias current to keep errors commensurate with the resolution of the DAC. Detailed op amp specifications are included in device data sheets. For applications where the reference input is a relatively high speed signal, a wide bandwidth, high slew rate op amp is required to avoid degrading the signal. The gain bandwidth (GBW) of an op amp circuit is limited by the impedance level of the feedback network and the gain configuration. To determine what GBW is required, a useful guideline is to select an op amp with a −3 dB bandwidth that is 10 times the frequency of the reference signal. The slew rate specification of the op amp must be considered to limit distortion of large high frequency signals. For the AD54xx and AD55xx families, an op amp with a slew rate of 100 V/µs is generally sufficient. Table 1 provides a selection of operational amplifiers that are useful for multiplying applications. For additional information, see the multiplying DAC product page at www.analog.com/MultiplyingDAC. Table 1. Selection of Suitable Analog Devices High Speed Op Amps Part No. AD8065 AD8066 AD8021 AD8038 Supply Voltage (V) 5 to 24 5 to 24 5 to 24 3 to 12 BW @ ACL (MHz) 145 145 490 350 Slew Rate (V/µs) 180 180 120 425 VOS (Maximum) (µV) 1500 1500 1000 3000 IB (Max) (nA) 0.006 0.006 10,500 750 ADA4899-1 AD8057 AD8058 AD8061 AD8062 AD9631 5 to 12 3 to 12 3 to 12 2.7 to 8 2.7 to 8 ±3 to ±6 600 325 325 320 320 320 310 850 850 650 650 1300 35 5000 5000 6000 6000 10,000 100 500 500 350 350 7000 Rev. A | Page 6 of 8 Packages SOIC-8, SOT-23-5 SOIC-8, MSOP-8 SOIC-8, MSOP-8 SOIC-8, SC70-5, SOT-23-5 LFCSP-8, SOIC-8 SOT-23-5, SOIC-8 SOIC-8, MSOP-8 SOT-23-5, SOIC-8 SOIC-8, MSOP-8 SOIC-8, PDIP-8 Application Note AN-1085 NOTES Rev. A | Page 7 of 8 AN-1085 Application Note NOTES ©2010–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN09275-0-2/13(A) Rev. A | Page 8 of 8

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