Document Number: MC33996DWBTAD Rev. 2.0, 3/2007 Freescale Semiconductor Technical Data 16-Output Switch with SPI Control 33996EK Thermal Addendum Introduction This thermal addendum is provided as a supplement to the MC33996 technical datasheet. The addendum provides thermal performance information that may be critical in the design and development of system applications. All electrical, application, and packaging information is provided in the datasheet. 32-PIN SOICW-EP Packaging and Thermal Considerations The MC33996 is offered in a 32 pin SOICW exposed pad, single die package. There is a single heat source (P), a single junction temperature (TJ), and thermal resistance (RθJA). TJ = RθJA . P The stated values are solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and will not predict the performance of a package in an application-specific environment. Stated values were obtained by measurement and simulation according to the standards listed below. EK (PB-FREE) SUFFIX 98ARL10543D 32-PIN SOICW-EP Note For package dimensions, refer to the 33996 data sheet. Standards Table 1. Thermal Performance Comparisons Thermal Resistance [°C/W] RθJA (1), (2) 29 RθJB (2), (3) 9.0 RθJA (1), (4) 69 RθJC (5) 2.0 Notes: 1. Per JEDEC JESD51-2 at natural convection, still air condition. 2. 2s2p thermal test board per JEDEC JESD51-5 and JESD51-7. 3. Per JEDEC JESD51-8, with the board temperature on the center trace near the center lead. 4. Single layer thermal test board per JEDEC JESD51-3 and JESD51-5. 5. Thermal resistance between the die junction and the exposed pad surface; cold plate attached to the package bottom side, remaining surfaces insulated. © Freescale Semiconductor, Inc., 2007. All rights reserved. *All Measurements are in Millimeters 1.0 1.0 0.2 0.2 32 Pin SOICW-EP 0.65 Pitch 11.0 mm x 7.5mm Body 4.6 mm x 5.7 mm Exposed Pad Figure 1. Surface Mount for SOICW Exposed Pad Document Number: MC33996DWBTAD Rev. 2.0, 3/2007 Freescale Semiconductor Technical Data A OUT0 OUT1 SOPWR OUT2 OUT3 VPWR GND GND GND GND SCLK OUT4 OUT5 CS OUT6 OUT7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OUT15 OUT14 PWM OUT13 OUT12 RST GND GND GND GND SO OUT11 OUT10 SI OUT9 OUT8 33996 Pin Connections 32-Pin SOICW EP 0.65 mm Pitch 11.0 mm x 7.5 mm Body 4.6 x 5.7 mm exposed pad Device on Thermal Test Board Material: Outline: Figure 2. Thermal Test Board Table 2. Thermal Resistance Performance Single layer printed circuit board FR4, 1.6 mm thickness Cu traces, 0.07 mm thickness 80 mm x 100 mm board area, including edge connector for thermal testing Area A: Cu heat-spreading areas on board surface Ambient Conditions: Natural convection, still air © Freescale Semiconductor, Inc., 2007. All rights reserved. A [mm2] RθJA [°C/W] 0 70 300 49 600 47 RθJA is the thermal resistance between die junction and ambient air. Document Number: MC33996DWBTAD Rev. 2.0, 3/2007 Freescale Semiconductor Technical Data 80 Thermal Resistance [ºC/W] 70 60 50 40 30 x 20 RθJA [°C/W] 10 0 0 300 600 Heat Spreading Area A [mm²] Figure 3. Device on Thermal Test Board RθJA Thermal Resistance [ºC/W] 100 10 x 1 0.1 1.00E-03 1.00E-02 1.00E-01 RθJA [°C/W] 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04 Time[s] Figure 4. Transient Thermal Resistance RθJA, 1 W Step response, Device on Thermal Test Board Area A = 600 (mm2) © Freescale Semiconductor, Inc., 2007. All rights reserved. How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. 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