PHILIPS PDTA114ET

DISCRETE SEMICONDUCTORS
DATA SHEET
ook, halfpage
M3D088
PDTA114ET
PNP resistor-equipped transistor
Product specification
Supersedes data of 1998 May 15
1999 Apr 13
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114ET
FEATURES
• Built-in bias resistors R1 and R2
(typ. 10 kΩ each)
• Simplification of circuit design
3
handbook, 4 columns
3
• Reduces number of components
and board space.
R1
1
R2
APPLICATIONS
2
• Especially suitable for space
reduction in interface and driver
circuits
1
2
Top view
MAM100
• Inverter circuit configurations
without use of external resistors.
Fig.1 Simplified outline (SOT23) and symbol.
DESCRIPTION
PNP resistor-equipped transistor in a
SOT23 plastic package.
NPN complement: PDTC114ET.
MARKING
1
3
PINNING
2
PIN
DESCRIPTION
1
base/input
2
emitter/ground (+)
3
collector/output
1999 Apr 13
PDTA114ET
MARKING
CODE(1)
∗03
Note
MGA893 - 1
Fig.2
TYPE
NUMBER
Equivalent inverter
symbol.
2
1. ∗ = p : Made in Hong Kong.
∗ = t : Made in Malaysia.
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114ET
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCBO
collector-base voltage
open emitter
−
−50
V
VCEO
collector-emitter voltage
open base
−
−50
V
VEBO
emitter-base voltage
open collector
−
−10
V
VI
input voltage
positive
−
10
V
negative
−
−40
V
−
−100
mA
IO
output current (DC)
ICM
peak collector current
Ptot
total power dissipation
Tstg
−
−100
mA
−
250
mW
storage temperature
−65
+150
°C
Tj
junction temperature
−
150
°C
Tamb
operating ambient temperature
−65
+150
°C
Tamb ≤ 25 °C; note 1
Note
1. Transistor mounted on an FR4 printed-circuit board.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
VALUE
UNIT
500
K/W
note 1
Note
1. Transistor mounted on an FR4 printed-circuit board.
CHARACTERISTICS
Tamb = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
ICBO
collector cut-off current
ICEO
collector cut-off current
CONDITIONS
MIN.
TYP.
MAX.
UNIT
IE = 0; VCB = −50 V
−
−
−100
nA
IB = 0; VCE = −30 V
−
−
−1
µA
IB = 0; VCE = −30 V; Tj = 150 °C
−
−
−50
µA
µA
IEBO
emitter cut-off current
IC = 0; VEB = −5 V
−
−
−400
hFE
DC current gain
IC = −5 mA; VCE = −5 V
30
−
−
VCEsat
collector-emitter saturation
voltage
IC = −10 mA; IB = −0.5 mA
−
−
−150
mV
Vi(off)
input-off voltage
IC = −100 µA; VCE = −5 V
−
−1.1
−0.8
V
Vi(on)
input-on voltage
IC = −10 mA; VCE = −0.3 V
−2.5
−1.8
−
V
R1
input resistor
7
10
13
kΩ
R2
-------R1
resistor ratio
0.8
1
1.2
Cc
collector capacitance
−
−
3
1999 Apr 13
IE = ie = 0; VCB = −10 V; f = 1 MHz
3
pF
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114ET
MBK780
103
handbook, halfpage
MBK779
−1
handbook, halfpage
hFE
VCEsat
(1)
(2)
102
(V)
(3)
−10−1
(1)
(2)
(3)
10
1
−10−1
−1
−10
IC (mA)
−10−2
−1
−102
−10
VCE = −5 V.
(1) Tamb = 150 °C.
(2) Tamb = 25 °C.
(3) Tamb = −40 °C.
IC/IB = 20.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −40 °C.
Fig.3
Fig.4
DC current gain as a function of collector
current; typical values.
MBK782
−10
Collector-emitter saturation voltage as a
function of collector current; typical values.
MBK781
−102
handbook, halfpage
handbook, halfpage
−102
IC (mA)
Vi(on)
(V)
Vi(off)
(V)
−10
(1)
(2)
−1
(1) (2) (3)
(3)
−1
−10−1
−10−2
−10−1
−1
IC (mA)
−10−1
−10−1
−10
VCE = −5 V.
(1) Tamb = −40 °C.
(2) Tamb = 25 °C.
(3) Tamb = 100 °C.
VCE = −0.3 V.
(1) Tamb = −40 °C.
(2) Tamb = 25 °C.
(3) Tamb = 100 °C.
Fig.5
Fig.6
Input-off voltage as a function of collector
current; typical values.
1999 Apr 13
4
−1
−10
IC (mA)
−102
Input-on voltage as a function of collector
current; typical values.
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114ET
PACKAGE OUTLINE
Plastic surface mounted package; 3 leads
SOT23
D
E
B
A
X
HE
v M A
3
Q
A
A1
1
2
e1
bp
c
w M B
Lp
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max.
bp
c
D
E
e
e1
HE
Lp
Q
v
w
mm
1.1
0.9
0.1
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
1.9
0.95
2.5
2.1
0.45
0.15
0.55
0.45
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-02-28
SOT23
1999 Apr 13
EUROPEAN
PROJECTION
5
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114ET
DEFINITIONS
Data Sheet Status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Apr 13
6
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114ET
NOTES
1999 Apr 13
7
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© Philips Electronics N.V. 1999
SCA63
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Printed in The Netherlands
115002/00/05/pp8
Date of release: 1999 Apr 13
Document order number:
9397 750 05616