PHILIPS 74LV4066PW

INTEGRATED CIRCUITS
74LV4066
Quad bilateral switches
Product specification
Supersedes data of 1996 Jan 01
IC24 Data Handbook
1998 Jun 23
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
• Optimized for Low Voltage applications: 1.0V to 6.0V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
The 74LV4066 has four independent analog switches. Each switch
has two input/output terminals (nY, nZ) and an active HIGH enable
input (nE). When nE is LOW the corresponding analog switch is
turned off.
The 74LV4066 has an on resistance which is dramatically reduced
in comparison with 74HCT4066.
•
FUNCTION TABLE
FEATURES
Tamb = 25 °C.
Very low typ “ON” resistance:
25 at VCC – VEE = 4.5 V
35 at VCC – VEE = 3.0 V
60 at VCC – VEE = 2.0 V
INPUTS
SWITCH
nE
• Output capability: non-standard
• ICC category: SSI
L
off
H
on
NOTES:
H = HIGH voltage level
L = LOW voltage level
DESCRIPTION
The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT4066.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr =tf 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
CL = 15pF
RL = 1K
VCC= 3.3V
tPZH/tPZL
Turn “ON” time: nE to VOS
tPHZ/tPLZ
Turn “OFF” time: nE to VOS
CI
Input capacitance
CPD
Power dissipation capacitance per switch
CS
Maximum switch capacitances
Notes 1, 2
TYPICAL
UNIT
10
ns
13
ns
3.5
pF
11
pF
8
pF
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; Cs = maximum switch capacitance in pF;
{(CL + CS) × VCC2 × Fo} = sum of the outputs.
VCC = supply voltage in V.
2. The condition is VI = GND to VCC.
ORDERING AND PACKAGE INFORMATION
PACKAGES
TYPE NUMBER
PINS
PACKAGE
MATERIAL
CODE
74LV4066N
16
DIL
Plastic
SOT27-1
74LV4066D
16
SO
Plastic
SOT108-1
74LV4066DB
16
SSOP
Plastic
SOT337-1
74LV4066PW
16
TSSOP
Plastic
SOT402-1
PIN CONFIGURATION
PIN DESCRIPTION
1Y
1
14 VCC
1Z
2
13 1E
2Z
3
2Y
PIN
NUMBER
SYMBOL
12 4E
1, 4, 8, 11
1Y – 4Y
Independent inputs/outputs
4
11 4Y
2, 3, 9, 10
1Z – 4Z
Independent inputs/outputs
2E
5
10 4Z
13, 5, 6, 12
1E to 4E
Enable input (active HIGH)
3E
6
9 3Z
7
GND
Ground (0V)
GND 7
8 3Y
14
VCC
Positive supply voltage
FUNCTION
SV01669
1998 Jun 23
2
853-2077 19619
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
FUNCTIONAL DIAGRAM
1Y
1
IEC LOGIC SYMBOL
1Z
2
1
1E
13
2Y
4
2Z
13#
3
4
2E
5
3Z
6
1
6#
4Y
4Z
8
2
3
1
12# X1
12#
(a)
SV01670
9
1
1
6# X1
10 11
11
10
4E
12
4
1
3 5#
X1
9
8
9
3E
11
1
5#
3Y
8
1
1
2 13# X1
1
(b)
10
SV01671
SCHEMATIC DIAGRAM (ONE SWITCH)
nY
nE
VCC
VCC
GND
nZ
SV01672
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
CONDITIONS
MIN
TYP
See Note 1
UNIT
1.0
3.3
6
V
VI
Input voltage
0
–
VCC
V
VO
Output voltage
0
–
VCC
V
+85
+125
°C
500
200
100
50
ns/V
Tamb
tr, tf
DC supply voltage
MAX
Operating ambient temperature range in free air
Input rise and fall times
See DC and AC
characteristics
–40
–40
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V to 5.5V
–
–
–
–
–
–
–
–
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
VCC
DC supply voltage
IIK
DC input diode current
IOK
IO
Tstg
Storage temperature range
PTOT
CONDITIONS
RATING
UNIT
–0.5 to +7.0
V
VI < –0.5 or VI > VCC + 0.5V
20
mA
DC output diode current
VO < –0.5 or VO > VCC + 0.5V
50
mA
DC switch current
–0.5V < VO < VCC + 0.5V
25
mA
–65 to +150
°C
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jun 23
3
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
-40°C to +85°C
TEST CONDITIONS
MIN
VIH
VIL
HIGH level Input
voltage
LOW level Input
voltage
TYP1
-40°C to +125°C
MAX
MIN
VCC = 1.2 V
0.90
0.90
VCC = 2.0 V
1.40
1.4
VCC = 2.7 to 3.6 V
2.00
2.0
VCC = 4.5 V
3.15
3.15
VCC = 6.0 V
4.20
UNIT
MAX
V
4.20
VCC = 1.2 V
0.30
0.30
VCC = 2.0 V
0.60
0.60
VCC = 2.7 to 3.6 V
0.80
0.80
VCC = 4.5 V
1.35
1.35
V
VCC = 6.0 V
1.80
1.80
±II
Input leakage
current
VCC = 3.6 V; VI = VCC or GND
VCC = 6.0 V; VI = VCC or GND
1.0
2.0
1.0
2.0
µA
±IS
Analog switch
OFF-state current
per channel
VCC = 3.6 V; VI = VIH or VIL
VCC = 6.0 V; VI = VIH or VIL
1.0
2.0
1.0
2.0
µA
±IS
Analog switch
ON-state current
per channel
VCC = 3.6 V; VI = VIH or VIL
VCC = 6.0 V; VI = VIH or VIL
1.0
2.0
1.0
2.0
µA
ICC
Quiescent supply
current
VCC = 3.6V; VI = VCC or GND; IO = 0
VCC = 6.0V; VI = VCC or GND; IO = 0
20
40
40
80
µA
∆ICC
Additional
quiescent supply
current per input
VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V
500
850
µA
ON-resistance
(peak)
VCC = 1.2 V; VI = VIH or VIL
VCC = 2.0 V; VI = VIH or VIL
VCC = 2.7 V; VI = VIH or VIL
VCC = 3.0 to 3.6 V; VI = VIH or VIL
VCC = 4.5 V; VI = VIH or VIL
VCC = 6.0 V; VI = VIH or VIL
300
60
41
37
25
23
–
130
60
72
52
47
–
150
90
83
60
54
Ω
ON-resistance
(rail)
VCC = 1.2 V; VI = VIH or VIL
VCC = 2.0 V; VI = VIH or VIL
VCC = 2.7 V; VI = VIH or VIL
VCC = 3.0 to 3.6 V; VI = VIH or VIL
VCC = 4.5 V; VI = VIH or VIL
VCC = 6.0 V; VI = VIH or VIL
75
35
26
24
15
13
–
98
60
52
40
35
–
115
68
60
45
40
Ω
ON-resistance
(rail)
VCC = 1.2 V; VI = VIH or VIL
VCC = 2.0 V; VI = VIH or VIL
VCC = 2.7 V; VI = VIH or VIL
VCC = 3.0 to 3.6 V; VI = VIH or VIL
VCC = 4.5 V; VI = VIH or VIL
VCC = 6.0 V; VI = VIH or VIL
75
40
35
30
22
20
–
110
72
65
47
40
–
130
85
75
55
47
Ω
Maximum variation
of ON-resistance
between any two
channels
VCC = 1.2 V; VI = VIH or VIL
VCC = 2.0 V; VI = VIH or VIL
VCC = 2.7 V; VI = VIH or VIL
VCC = 3.0 to 3.6 V; VI = VIH or VIL
VCC = 4.5 V; VI = VIH or VIL
VCC = 6.0 V; VI = VIH or VIL
–
5
4
4
3
2
RON
RON
RON
∆RON
NOTE:
1. All typical values are measured at Tamb = 25°C.
2. At supply voltage approaching 1.2V, the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital signals only, when using these supply voltages.
1998 Jun 23
4
Ω
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
LOW
(from enable inputs)
HIGH
(from enable inputs)
V
nY
nZ
nY
nZ
A
I
Vis = 0 to VCC – GND
is
A
VI = VCC or GND
VO = GND or VCC
GND
GND
SV01673
SV01674
Figure 1. Test circuit for measuring ON-resistance (Ron).
Figure 2. Test circuit for measuring OFF-state current.
HIGH
(from enable inputs)
VCC= 2.0 V
60
RON
()
nY
40
nZ
A
A
VI = V CC or GND
VO (open circuit)
VCC = 3.0 V
20
VCC = 4.5 V
0
GND
0
1.2
2.4
SV01675
Figure 3. Test circuit for measuring ON-state current.
3.6
Vis (V)
4.8
SV01676
Figure 4. Typical ON-resistance (RON) as a function of input
voltage (Vis) for Vis = 0 to VCC – VEE.
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5ns; CL = 50pF
LIMITS
SYMBOL
–40 to +85 °C
PARAMETER
MIN
TYP1
–40 to +125 °C
MAX
MIN
MAX
VCC(V)
8
tPHL/tPLH
Propagation delay
Vis to Vos
tPZH/tPZL
Turn-on
Turn
on time
nE to Vos
tPHZ/tPLZ
Turn off time
Turn-off
nE to Vos
OTHER
1.2
5
26
31
32
2
2
40
22
122
10
8
50
27
152
13
12
15
13
10
18
15
12
43
25
21
16
51
30
26
20
65
38
32
28
81
47
40
34
NOTES:
1. All typical values are measured at Tamb = 25°C.
2. All typical values are measured at VCC = 3.3V.
1998 Jun 23
CONDITION
UNIT
5
2.0
ns
ns
ns
2.7 to 3.6
4.5
6.0
1.2
2.0
2.7 to 3.6
4.5
6.0
1.2
2.0
2.7 to 3.6
4.5
6.0
RL = ∞;
CL = 50 pF
Figure 12
RL = 1 k;
CL = 50 pF
Fi
Figures
13 and
d 14
RL = 1 k;
CL = 50 pF
Fi
Figures
13 and
d 14
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
ADDITIONAL AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5ns; CL = 50pF
SYMBOL
PARAMETER
TYP
0.04
0.02
0.12
0.06
–50
–50
–60
–60
Sine-wave distortion f = 1 kHz
Sine-wave distortion f = 10 kHz
Switch “OFF”
OFF signal feed through
Crosstalk between any two switches
fmax
Minimum frequency res
response
onse (–3 dB)
CS
Maximum switch capacitance
%
%
dB
dB
110
Crosstalk voltage
g between enable or address
input to any switch (peak-to-peak value)
V(p–p)
(
)
VCC
(V)
3.0
6.0
3.0
6.0
3.0
6.0
3.0
6.0
UNIT
VIS(P–P)
(V)
2.75
5.50
2.75
5.50
Note 1
CONDITIONS
RL = 10 kW; CL = 50 pF
Figure 15
RL = 10 kW; CL = 50 pF
Figure 15
RL = 600 kW; CL = 50 pF; f=1 MHz
Figures 10 and 16
Note 1
RL = 600 kW; CL = 50 pF; f=1 MHz
Figure 12
RL = 600 kW; CL = 50 pF; f=1 MHz
(nE square wave between VCC and
(nE,
GND, Tr = tf = 6 ns) Figure 13
3.0
mV
220
6.0
180
200
8
3.0
6.0
mHz
Note 2
RL = 50 kW; CL = 50 pF
Figures 11 and 14
pF
GENERAL NOTES:
Vis is the input voltage at nY or nZ terminal, whichever is assigned as an input.
Vos is the output voltage at nY or nZ terminal, whichever is assigned as an output.
NOTES:
1. Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 W).
2. Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 W).
5
0
(dB)
(dB)
0
–50
–5
–100
102
10
103
104
f (kHz)
105
102
10
106
103
104
105
106
f (kHz)
SV01677
Figure 5. Typical switch “OFF” signal feed-through as a
function of frequency.
SV01678
Figure 6. Typical frequency response.
NOTES TO FIGURES 5 AND 6:
Test conditions: VCC = 3.0 V; GND = 0 V; RL = 50 W; RSOURCE = 1kW.
VCC
0.1 mF
Vis
RL
VCC
2RL
nY/nZ
VCC
2RL
2RL
nY/nZ
nZ/nY
nZ/nY
Vos
channel
2RL
CL
RL
ON
2RL
channel
GND
dB
GND
(a)
(b)
Figure 7. Test circuit for measuring crosstalk between any two switches.
(a) channel ON condition; (b) channel OFF condition.
1998 Jun 23
CL
OFF
6
SV01679
Philips Semiconductors
Product specification
Quad bilateral switches
VCC
nE
74LV4066
VCC
VCC
VCC
GND
2RL
0.1 mF
2RL
nY/nZ
Vis
nZ/nY
DUT
2RL
2RL
nY/nZ
nZ/nY
Vos
sine–wave
2RL
CL
2RL
channel
ON
oscilloscope
CL
dB
GND
GND
SV01681
SV01682
Figure 8. Test circuit for measuring
crosstalk between control and any switch.
Figure 9. Test circuit for measuring
minimum frequency response.
NOTE TO FIGURE 8:
The crosstalk is defined as follows (oscilloscope output):
NOTE TO FIGURE 9:
Adjust input voltage to obtain 0 dBm at VOS when Fin = 1 MHz. After
set-up frequency of fin is increased to obtain a reading of –3 dB at VOS.
V(p–p)
SV01680
VCC
VCC
10 mF
2RL
0.1 mF
nY/nZ
nZ/nY
Vis
fin = 1 kHz
sine–wave
channel
ON
2RL
CL
Vos
2RL
nY/nZ
nZ/nY
Vis
distortion
meter
Vos
channel
OFF
2RL
CL
dB
GND
GND
SV01683
SV01684
Figure 10. Test circuit for measuring sine-wave distortion.
1998 Jun 23
Figure 11. Test circuit for measuring
switch “OFF” signal feed-through.
7
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V
VM = 0.5 × VCC at VCC ≤ 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load
VX = VOL + 0.3 V at VCC ≥ 2.7 V
VX = VOL + 0.1 × VCC at VCC < 2.7 V
VY = VOH – 0.3 V at VCC ≥ 2.7 V
VY = VOH – 0.1 × VCC VCC < 2.7 V
VI
VI
Vis
VM
nE INPUT
VM
GND
GND
tPLZ
tPHL
tPLH
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOH
Vos
tPZL
VCC
VM
VM
VX
VOL
tPZH
tPHZ
VOL
SV01685
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
Figure 12. Input (Vis) to output (Vos) propagation delays.
VY
VM
outputs
enabled
outputs
enabled
outputs
disabled
SV01686
Figure 13. Turn-on and turn-off times
for the inputs (nS, E) to the output (Vos).
TEST CIRCUIT
tW
90%
S1
Vcc
VS1
Open
GND
NEGATIVE
PULSE
90%
VM
VI
VM
10%
10%
0V
Vl
RL = 1k
VO
PULSE
GENERATOR
tTHL (tf)
D.U.T.
tTLH (tr)
tTLH (tr)
RL = 1k
RT
CL= 50pF
tTHL (tf)
90%
POSITIVE
PULSE
VI
90%
VM
VM
10%
tW
Test Circuit for Outputs
10%
0V
VM = 1.5V
Input Pulse Definition
DEFINITIONS
SWITCH POSITION
VI
VS1
< 2.7V
VCC
2 VCC
VS1
2.7–3.6V
2.7V
2 VCC
GND
≥ 4.5 V
VCC
2 VCC
TEST
S1
tPLH/tPHL
Open
tPLZ/tPZL
tPHZ/tPZH
VCC
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of
pulse generators.
SY00044
Figure 14. Load circuitry for switching times.
1998 Jun 23
8
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Document order number:
yyyy mmm dd
9
Date of release: 05-96
Philips Semiconductors
Product specification
Quad bilateral switches
74LV4066
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Document order number:
yyyy mmm dd
10
Date of release: 05-96
9397-750-04659