INFINEON PTFA212401E

PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Thermally-Enhanced High Power RF LDMOS FETs
240 W, 2110 – 2170 MHz
Description
The PTFA212401E and PTFA212401F are 240-watt LDMOS FETs
designed for single- and two-carrier WCDMA power amplifier
applications in the 2110 to 2170 MHz band. Features include input
and output matching, and thermally-enhanced packages with slotted
or earless flanges. Manufactured with Infineon's advanced LDMOS
process, these devices provide excellent thermal performance and
superior reliability.
PTFA212401E
Package H-36260-2
PTFA212401F
Package H-37260-2
Features
-30
35
•
Thermally-enhanced packages, Pb-free and
RoHS compliant
•
Broadband internal matching
•
Typical two-carrier WCDMA performance at
2140 MHz, 30 V, 3GPP signal, PAR = 8 dB
- Average output power = 47.0 dBm
- Linear Gain = 15.8 dB
- Efficiency = 28%
- Intermodulation distortion = –35 dBc
- Adjacent channel power = –40 dBc
•
Typical single-carrier WCDMA performance at
2140 MHz, 30 V, 3GPP signal, PAR = 8.5 dB
- Average output power = 49 dBm
- Linear Gain = 15.8 dB
- Efficiency = 34%
- Adjacent channel power = –33 dBc
•
Typical CW performance, 2140 MHz, 30 V
- Output power at P–1dB = 240 W
- Efficiency = 54%
•
Integrated ESD protection: Human Body Model,
Class 2 (minimum)
•
Excellent thermal stability, low HCI drift
•
Capable of handling 5:1 VSWR @ 30 V,
240 W (CW) output power
30
-35
ACPR Up
25
-40
ACPR Low
-45
20
15
-50
-55
10
Efficiency
Drain Efficiency (%)
Adjacent Channel Power Ratio (dB)
Single-carrier WCDMA Drive-up
VDD = 30 V, IDQ = 1600 mA, ƒ = 2140 MHz,
3GPP WCDMA signal, TM1 w/16 DPCH, 67%
clipping, PAR = 8.5 dB, 3.84 MHz BW
5
-60
36
38
40
42
44
46
48
Average Output Power (dBm)
All published data at TCASE = 25°C unless otherwise indicated
*See Infineon distributor for future availability.
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet
1 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
RF Characteristics
Two-Carrier WCDMA Measurements (tested in Infineon test fixture)
VDD = 30 V, IDQ = 1.6 A, POUT = 50 W average
ƒ1 = 2135 MHz, ƒ2 = 2145 MHz, 3GPP signal, channel bandwidth = 3.84 MHz , peak/average = 8 dB @ 0.01% CCDF
Characteristic
Symbol
Min
Typ
Max
Unit
Gain
Gps
14.8
15.8
—
dB
Drain Efficiency
ηD
26
28
—
%
Intermodulation Distortion
IMD
—
–35.0
–33
dBc
Two-tone Measurements (not subject to production test—verified by design/characterization in Infineon test fixture)
VDD = 30 V, IDQ = 1.6 A, POUT = 220 W PEP, ƒ1 = 2140 MHz, ƒ2 = 2141 MHz, tone spacing = 1 MHz
Characteristic
Symbol
Min
Typ
Max
Unit
Gain
Gps
—
15.8
—
dB
Drain Efficiency
ηD
—
38.5
—
%
Intermodulation Distortion
IMD
—
–28
—
dBc
DC Characteristics
Characteristic
Conditions
Symbol
Min
Typ
Max
Unit
Drain-Source Breakdown Voltage
VGS = 0 V, IDS = 10 mA
V(BR)DSS
65
—
—
V
Drain Leakage Current
VDS = 30 V, V GS = 0 V
IDSS
—
—
1.0
µA
VDS = 63 V, V GS = 0 V
IDSS
—
—
10.0
µA
On-State Resistance
VGS = 10 V, V DS = 0.1 V
RDS(on)
—
0.03
—
Ω
Operating Gate Voltage
VDS = 30 V, IDQ = 1.6 A
VGS
2.0
2.5
3.0
V
Gate Leakage Current
VGS = 10 V, V DS = 0 V
IGSS
—
—
1.0
µA
Maximum Ratings
Parameter
Symbol
Value
Unit
Drain-Source Voltage
VDSS
65
V
Gate-Source Voltage
VGS
–0.5 to +12
V
Junction Temperature
TJ
200
°C
Total Device Dissipation
PD
761
W
4.35
W/°C
Above 25°C derate by
Storage Temperature Range
TSTG
–40 to +150
°C
Thermal Resistance (TCASE = 70°C, 50 W Average WCDMA)
RθJC
0.23
°C/W
Data Sheet
2 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Ordering Information
Type and Version
Package Outline
Package Description
Shipping
PTFA212401E V4
H-36260-2
Thermally-enhanced slotted flange, single-ended
Tray
PTFA212401F V4
H-37260-2
Thermally-enhanced earless flange, single-ended
Tray
Typical Performance (data taken in a production test fixture)
Two-carrier WCDMA at Selected Biases
Broadband Performance
VDD = 30 V, ƒ = 2140 MHz, 3GPP WCDMA signal,
PAR = 8 dB, 10 MHz carrier spacing,
series show IDQ
VDD = 30 V, IDQ = 1600 mA, POUT = 50 W
40
2.0 A
2.2 A
1.8 A
-40
-45
1.4 A
-50
1.6 A
34
36
38
40
42
44
35
46
-10
Return Loss
30
-15
25
-20
Efficiency
20
-25
15
10
2050
-55
-5
-30
Gain
2080
2110
2140
2170
Input Return Loss (dB)
-35
Gain (dB), Efficiency (%)
3rd Order IMD (dBc)
-30
-35
2200
Frequency (MHz)
Output Power, PEP (dBm)
*See Infineon distributor for future availability.
Data Sheet
3 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Typical Performance (cont.)
Intermodulation Distortion Products
vs. Tone Spacing
Power Sweep, CW Conditions
VDD = 30 V, IDQ = 1600 mA, ƒ = 2140 MHz
65
16
55
Gain
15
45
14
35
TCASE = 25°C
13
25
Efficiency TCASE = 90°C
12
0
40
80
120
160
200
15
240
Intermodulation Distortion (dBc)
17
Drain Efficiency (%)
Gain (dB)
VDD = 30 V IDQ = 1600 mA , ƒ = 2140 MHz,
POUT = 53 dBm PEP
-20
-25
3rd Order
-30
-35
7th
-40
-45
-50
5th
-55
0
5
10
IDQ = 1600 mA, ƒ = 2140 MHz,
tone spacing = 1 MHz,
Output Power (PEP) = 53 dBm
50
30
-30
IM3 Up
-40
20
Gain
-50
10
30
Intermodulation Distortion (dBc)
40
40
Up
Low
-30
IM3
IM5
-40
-50
IM7
-60
10
32
100
1000
Output Power, PEP (W)
Supply Voltage (V)
Data Sheet
35
ƒ 1 = 2137.5 MHz, ƒ2 = 2142.5 MHz
-20
Gain (dB), Drain Efficiency (%)
3rd Order IMD (dBc)
-20
28
30
VDD = 30 V, IDQ = 1600 mA,
Efficiency
26
25
Intermodulation Distortion Products
vs. Output Power
Voltage Sweep
24
20
Tone Spacing (MHz)
Output Power (W)
-10
15
4 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Typical Performance (cont.)
Output Peak-to-Average Ratio Compression
(PARC) at various Power Levels
Power Gain vs. Power Sweep (CW) over
Temperature
VDD = 30 V, IDQ = 1600 mA, ƒ = 2170 MHz,
single-carrier WCDMA input PAR = 7.5 dB
VDD = 30 V, IDQ = 1500 mA, ƒ = 2140 MHz
100
18
Power Gain (dB)
48 dBm
1
46 dBm
52 dBm
0.1
Input
51 dBm
0.01
25C
16
85C
15
14
13
50 dBm
0.001
12
1
2
3
4
5
6
7
8
1
10
Two-tone Drive-up
Two-carrier WCDMA Drive-up
VDD = 30 V, IDQ = 1600 mA,
ƒ = 2140 MHz, tone spacing = 1 MHz
VDD = 30 V, IDQ = 1600 mA, ƒ = 2140 MHz,
3GPP WCDMA signal, PAR = 8 dB,
10 MHz carrier spacing
-25
-25
50
45
Efficiency
-35
40
IM3
-40
35
IM5
-45
30
-50
25
-55
20
IM7
-60
IM3 (dBc), ACPR (dBc)
-30
15
-65
46
48
50
52
35
30
IM3
-35
25
-40
20
-45
15
ACPR
-50
10
5
34
54
Output Power, PEP (dBm)
Data Sheet
Efficiency
-30
-55
10
44
1000
Output Power (W)
Drain Efficiency (%)
Intermodulation Distortion (dBc)
Peak-to-Average (dB)
100
Drain Efficiency (%)
Probability (%)
-15C
17
10
36
38
40
42
44
46
48
Output Power, avg. (dBm)
5 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Typical Performance (cont.)
Bias Voltage vs. Temperature
Normalized Bias Voltage (V)
Voltage normalized to typical gate voltage,
series show current
1.03
0.44 A
1.02
1.32 A
2.20 A
1.01
3.30 A
1.00
6.61 A
0.99
9.91 A
0.98
13.22 A
0.97
16.52 A
0.96
0.95
-20
0
20
40
60
80
100
Case Temperature (°C)
-->
Broadband Circuit Impedance
Z0 = 50 Ω
GEN
E
RA
T
OR
-
0.2
D
Z Load
A RD
Z Source
Z Load
0 .1
2200 M H z
G
R
jX
2080
10.050
–4.250
1.140
2.07
2110
9.750
–4.320
1.080
2.38
2140
9.500
–4.380
1.090
2.65
2170
9.280
–4.350
1.130
2.89
2200
9.000
–4.460
1.450
3.11
Data Sheet
6 of 11
0.1
0.1
W
jX
<---
R
2080 M H z
2200 M H z
AV
MHz
Z Source
S
NGT H
E LE
Z Load Ω
D LOA D T OW AR
Z Source Ω
Frequency
0.0
S
0.2
2080 M H z
0.2
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Reference Circuit
0.001µF
R2
1.3K V
R1
1.2K V
QQ1
LM7805
VDD
Q1
BCP56
C2
0.001µF
C3
0.001µF
R3
2K V
R6
5.1K V
R8
2K V
C5
0.1µF
C4
4.7µF
16V
R5
2K V
L1
VDD
C6
8.2pF
C13
8.2pF
l8
l1
l2
C7
0.7pF
C27
0.3pF
DUT
l3
l4
l5
l6
l7
C9
1.3pF
C16
2.2µF
l13
l10
l9
l12
l14
C29
0.5pF
l15
C28
0.3pF
C11
0.1µF
C18
10µF
50V
C31
0.7pF
l 16
l 17
C30
0.5pF
C32
0.7pF
R7
5.1K V
C10
4.7µF
16V
C17
0.1µF
C19
100µF
50V
l11
C8
8.2pF
J1
C15
1µF
C14
1µF
C33
8.2pF
l18
l19
L2
C12
8.2pF
C20
8.2pF
C21
1µF
C22
1µF
C23
2.2µF
C24
0.1µF
C25
10µF
50V
C26
100µF
50V
Reference circuit schematic for ƒ = 2140 MHz
Circuit Assembly Information
DUT
PTFA212401E or PTFA212401F
PCB
0.76 mm [.030"] thick, εr = 3.5
LDMOS Transistor
RF–35
1 oz. copper
Microstrip
Dimensions: L x W ( mm)
Dimensions: L x W (in.)
l1
l2
l3
l4
l5
l6 (taper)
l7,
l8, l9
l10
l11, l12
l13
l14
l15 (taper)
l16 (taper)
l17 (taper)
l18
l19
Data Sheet
Electrical Characteristics at 2140 MHz
0.018
0.022
0.047
0.034
0.024
0.063
0.043
0.134
0.029
0.262
0.042
0.032
0.014
0.026
0.025
0.017
0.123
λ, 49.9 Ω
λ, 49.9 Ω
λ, 49.9 Ω
λ, 49.9 Ω
λ, 42.8 Ω
λ, 42.8 Ω / 6.9 Ω
λ, 6.9 Ω
λ, 59.9 Ω
λ, 6.9 Ω
λ, 51.0 Ω
λ, 5.0 Ω
λ, 5.0 Ω
λ, 5.0 Ω / 6.65 Ω
λ, 6.65 Ω / 11.68 Ω
λ, 11.68 Ω / 40.7 Ω
λ, 40.7 Ω
λ, 49.9 Ω
1.55 x 1.70
1.91 x 1.70
3.99 x 1.70
2.90 x 1.70
2.01 x 2.16
5.28 x 2.16 / 20.32
3.33 x 20.32
11.48 x 1.04
2.21 x 20.32
22.10 x 1.65
3.18 x 28.91
2.41 x 28.91
1.04 x 28.91 / 21.89
2.03 x 21.89 / 11.43
2.13 x 11.43 / 2.34
1.40 x 2.34
10.24 x 1.70
7 of 11
0.061
0.075
0.157
0.114
0.079
0.208
0.131
0.452
0.087
0.870
0.125
0.095
0.041
0.080
0.084
0.055
0.403
x 0.067
x 0.067
x 0.067
x 0.067
x 0.085
x 0.085 /
x 0.800
x 0.041
x 0.800
x 0.065
x 1.138
x 1.138
x 1.138 /
x 0.862 /
x 0.450 /
x 0.092
x 0.067
0.800
0.862
0.450
0.092
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Reference Circuit (cont.)
C14
C2
L1
C1
R3
QQ1
C5
R5
C4
C7
J1
C15
C16
C19
C3
R8
C13
Q1
R6
C6 R1
R2
C27
C29
C18
C17
C31
C9
C33
C8
C24
C32
C10
C11
C12
C30
C28
R7
J2
C23
C25
C22
C21
C26 L2
C20
Reference circuit assembly diagram* (not to scale)
Component
Description
Suggested Manufacturer
P/N or Comment
C1, C2, C3
C4, C10
C5, C11, C17, C24
C6, C12
C7, C31, C32
C8, C33
C9
C13, C20
C14, C15, C21, C22
C16, C23
C18, C25
C19, C26
C27, C28
C29, C30
L1, L2
Q1
QQ1
R1
R2
R3, R5
R4
R6, R7
R8
Capacitor, 0.001 µF
Capacitor, 4.7 µF, 16 V
Capacitor, 0.1 µF
Ceramic capacitor, 8.2 pF
Capacitor, 0.7 pF
Ceramic capacitor, 8.2 pF
Capacitor, 1.3 pF
Capacitor, 8.2 pF
Ceramic capacitor, 1 µF
Capacitor, 2.2 µF
Tantalum capacitor, 10 µF, 50 V
Electrolytic capacitor, 100 µF, 50 V
Capacitor, 0.3 pF
Capacitor, 0.5 pF
Ferrite, 8.9 mm
Transistor
Voltage regulator
Chip resistor 1.2 k-ohms
Chip resistor 1.3 k-ohms
Chip resistor 2 k-ohms
Chip resistor 10 ohms
Chip resistor 5.1 k-ohms
Variable resistor 2 k-ohms
Digi-Key
Digi-Key
Digi-Key
ATC
AVX
ATC
ATC
AVX
Digi-Key
Digi-Key
Garrett Electronics
Digi-Key
AVX
AVX
Elna Magnetics
Infineon Technologies
National Semiconductor
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
PCC1772CT-ND
PCS3475CT-ND
PCC104BCT-ND
100A 8R2
08051J0R7BBTTR
100B 8R2
600S1R3BT
100A 8R2
445-1411-1-ND
445-1447-2-ND
TPSE106K050R0400
P5571-ND
08051J0R3BBTTR
08051J0R5BBTTR
BDS 4.6/3/8.9-4S2
BCP56
LM7805
P1.2KGCT-ND
P1.3KGCT-ND
P2KECT-ND
P10ECT-ND
P5.1KECT-ND
3224W-202ETR-ND
Data Sheet
8 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Package Outline Specifications
Package H-36260-2
2X 12.70
[.500]
45° X 2.031
45° X [.080]
4.83±0.50
[.190±.020]
CL
D
4X R1.52
[R.060]
S
23.37±0.51
[.920±.020]
LID 13.21+0.10
-0.15
.520+.004
-.006
[
CL
]
13.72
[.540]
2X R1.63
[R.064]
G
C66065-A2324-C001-01-0027
27.94
[1.100]
LID 22.35±0.23
[.880±.009]
1.02
[.040]
4.11±0.38
[.162±.015]
0.0381 [.0015] -ACL
34.04
[1.340]
SPH 1.57
[.062]
Diagram Notes—unless otherwise specified:
1.
Interpret dimensions and tolerances per ASME Y14.5M-1994.
2.
All tolerances ± 0.127 [.005] unless specified otherwise.
3.
Primary dimensions are mm. Alternate dimensions are inches.
4.
Pins: D = drain, S = source, G = gate.
5.
Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
6.
Gold plating thickness:
S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch]
Data Sheet
9 of 11
Rev. 04, 2009-10-05
PTFA212401E
PTFA212401F
Confidential, Limited Internal Distribution
Package Outline Specifications (cont.)
Package H-37260-2
2X 12.70
[.500]
45° X 2.03
[45° X .080]
4.83±0.50
[.190±.020]
D
23.37±0.51
[.920±.020]
LID 13.21+0.10
-0.15
.520+.004
-.006
[
CL
R0.508+0.381
-0.127
R.020+.015
-.005
[
]
13.72
[.540]
G
]
C66065-A2325-C001-01-0027
CL
LID 22.35±0.23
[.880±.009]
1.02
[.040]
4.11±0.38
[.162±.015]
0.0381 [.0015] -ACL
S
SPH 1.57
[.062]
23.11
[.910]
Diagram Notes—unless otherwise specified:
1.
Interpret dimensions and tolerances per ASME Y14.5M-1994.
2.
All tolerances ± 0.127 [.005] unless specified otherwise.
3.
Primary dimensions are mm. Alternate dimensions are inches.
4.
Pins: D = drain, S = source, G = gate.
5.
Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001].
6.
Gold plating thickness:
S, D, G - flange & leads: 1.14 ± 0.38 micron [45 ± 15 microinch]
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet
10 of 11
Rev. 04, 2009-10-05
PTFA212401E/F V4
Confidential, Limited Internal Distribution
Revision History:
2009-10-05
2009-04-01 Data Sheet
Previous Version:
Data Sheet
Page
Subjects (major changes since last revision)
2
Updated characteristics
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GOLDMOS® is a registered trademark of Infineon Technologies AG.
Edition 2009-10-05
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of
any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com/rfpower).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of
that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices
or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect
human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet
11 of 11
Rev. 04, 2009-10-05