INFINEON PTFA091201GL

PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Thermally-Enhanced High Power RF LDMOS FETs
120 W, 920 – 960 MHz
Description
The PTFA091201GL and PTFA091201HL are 120-watt LDMOS FETs
designed for ultra-linear GSM/EDGE power amplifier applications in
the 920 to 960 MHz band. Features include input and output matching,
and thermally-enhanced plastic open-cavity packages with copper
flanges. Manufactured with Infineon's advanced LDMOS process,
these devices provide excellent thermal performance and superior
reliability.
PTFA091201GL
Package PG-63248-2
PTFA091201HL
Package PG-64248-2
Features
EDGE Modulation Spectrum Performance
•
Thermally-enhanced plastic open-cavity (EPOC™)
packages with copper flanges, Pb-free and RoHS
compliant
0
55
•
Broadband internal matching
-10
50
•
-20
45
Typical EDGE performance
- Average output power = 50 W
- Gain = 18.5 dB
- Efficiency = 44%
•
Typical CW performance
- Output power at P–1dB = 135 W
- Gain = 17 dB
- Efficiency = 64%
•
Integrated ESD protection: Human Body Model,
Class 2 (minimum)
•
Excellent thermal stability, low HCI drift
•
Capable of handling 10:1 VSWR @ 28 V,
120 W (CW) output power
Efficiency
-30
40
-40
35
-50
30
400 KHz
-60
25
-70
20
-80
600 KHz
-90
Drain Efficiency (%)
Modulation Spectrum (dB)
VDD = 28 V, IDQ = 750 mA, ƒ = 959.8 MHz
15
10
36
38
40
42
44
46
48
50
Output Power, avg. (dBm)
RF Characteristics
EDGE Measurements (not subject to production test—verified by design/characterization in Infineon test fixture)
VDD = 28 V, IDQ = 750 mA, POUT = 50 W (AVG), ƒ = 959.8 MHz
Characteristic
Symbol
Min
Typ
Max
Unit
EVM (RMS)
—
2.5
—
%
Modulation Spectrum @ 400 kHz
ACPR
—
–60
—
dBc
Modulation Spectrum @ 600 kHz
ACPR
—
–74
—
dBc
Gain
Gps
—
18.5
—
dB
Drain Efficiency
ηD
—
44
—
%
Error Vector Magnitude
All published data at TCASE = 25°C unless otherwise indicated
*See Infineon distributor for future availability.
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet
1 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
RF Characteristics (cont.)
Two–tone Measurements (tested in Infineon test fixture)
VDD = 28 V, IDQ = 750 mA, POUT = 110 W PEP, ƒ = 960 MHz, tone spacing = 1 MHz
Characteristic
Symbol
Min
Typ
Max
Unit
Gain
Gps
18.0
18.5
—
dB
Drain Efficiency
ηD
45
48
—
%
Intermodulation Distortion
IMD
—
–28
–26
dBc
DC Characteristics
Characteristic
Conditions
Symbol
Min
Typ
Max
Unit
Drain-Source Breakdown Voltage
VGS = 0 V, IDS = 10 mA
V(BR)DSS
65
—
—
V
Drain Leakage Current
VDS = 28 V, V GS = 0 V
IDSS
—
—
1.0
µA
VDS = 63 V, V GS = 0 V
IDSS
—
—
10.0
µA
RDS(on)
—
0.07
—
Ω
On-State Resistance
VGS = 10 V, V DS = 0.1 V
Operating Gate Voltage
VDS = 28 V, IDQ = 750 mA
VGS
2.0
2.5
3.0
V
Gate Leakage Current
VGS = 10 V, V DS = 0 V
IGSS
—
—
1.0
µA
Maximum Ratings
Parameter
Symbol
Value
Unit
Drain-Source Voltage
VDSS
65
V
Gate-Source Voltage
VGS
–0.5 to +12
V
Junction Temperature
TJ
200
°C
Total Device Dissipation
PD
625
W
3.57
W/°C
Above 25°C derate by
Storage Temperature Range
TSTG
–40 to +150
°C
Thermal Resistance (TCASE = 70°C, 120 W CW, soldered)
RθJC
0.28
°C/W
Ordering Information
Type and Version
Package
Package Description
Shipping
Marking
PTFA091201GL
V1
PG-63248-2
Thermally-enhanced slotted flange,
single-ended
Tray
PTFA091201GL
PTFA091201HL
V1
PG-64248-2
Thermally-enhanced earless flange,
single-ended
Tray
PTFA091201HL
*See Infineon distributor for future availability.
Data Sheet
2 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Typical Performance (data taken in a production test fixture)
Broadband Performance
Intermodulation Distortion vs. Output Power
VDD = 28 V, IDQ = 750 mA, POUT = 120 W
VDD = 28 V, IDQ = .750 mA, ƒ1 = 959 MHz, ƒ2 = 960 MHz
60
Gain
18
55
-10
Return Loss
17
-15
50
-20
16
900
910
920
930
940
950
-25
45
960
-20
IMD (dBc)
Efficiency
19
Gain (dB)
-10
65
Return Loss (dB), Efficiency (%)
20
-30
3rd Order
-40
5th
-50
-60
7th
-70
36 37 38 39 40 41 42 43 44 45 46 47 48 49
Output Power, Avg (dBm)
Frequency (MHz)
IM3 vs. Output Power at Selected Biases
Gain vs. Output Power
VDD = 28 V, ƒ1 = 959 MHz, ƒ2 = 960 MHz
VDD = 28 V, ƒ = 960 MHz
series show Idq
-20
20.0
-25
Power Gain (dB)
-30
IMD (dBc)
IDQ = 1125 mA
19.5
525 mA
-35
750 mA
-40
-45
-50
940 mA
-55
19.0
IDQ = 750 mA
18.5
18.0
17.5
IDQ = 375 mA
17.0
16.5
-60
-65
16.0
37
39
41
43
45
47
49
38
42
44
46
48
50
52
54
Output Power (dBm)
Output Power, Avg (dBm)
Data Sheet
40
3 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
EDGE Performance
Gain & Efficiency vs. Output Power
VDD = 28 V, IDQ = 750 mA, ƒ = 959.8 MHz
VDD = 28 V, IDQ = 750 mA, ƒ = 960 MHz
7
55
Efficiency
45
6
40
5
35
4
30
3
25
2
20
EVM
1
40
42
44
46
48
19
60
17
40
16
30
Efficiency
20
10
14
50
40
42
Output Power, Avg. (dBm)
44
46
48
50
52
Output Power (dBm)
Output Power (P–1dB) vs. Supply Voltage
IS-95 CDMA Performance
IDQ = 750 mA, ƒ = 960 MHz
VDD = 28 V, IDQ = 750 mA, ƒ = 960 MHz
52.5
40
-10
Efficiency
35
Drain Efficiency (%)
52.0
Output Power (dBm)
50
Gain
15
10
38
70
18
15
0
36
20
50
51.5
51.0
50.5
50.0
49.5
-20
30
-30
25
-40
Adj 750 kHz
20
-50
15
-60
10
-70
Alt1 1.98 MHz
5
24
26
28
30
-80
32
Supply Voltage (V)
Data Sheet
Drain Efficiency (%)
8
TCASE = 25°C
TCASE = 90°C
Adj. Ch. Power Ratio (dBc)
TCASE = –25°C
Gain (dB)
9
Drain Efficiency (%)
RMS EVM (Average %) .
Typical Performance (cont.)
34
36
38
40
42
44
46
Output Power (dBm), Avg.
4 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Typical Performance (cont.)
Bias Voltage vs. Temperature
Voltage normalized to typical gate voltage,
series show current
0.4 A
Normalized Bias Voltage (V)
1.03
1.2 A
1.02
3.0 A
1.01
6.0 A
1.00
9.0 A
0.99
12.0 A
16.0 A
0.98
0.97
0.96
-20
0
20
40
60
80
100
Case Temperature (°C)
Broadband Circuit Impedance
Z Source Ω
Frequency
D
Z Source
Z Load
G
MHz
R
jX
R
jX
920
5.86
–0.32
2.20
0.69
930
5.84
–0.27
2.17
0.69
940
5.85
–0.02
2.16
0.85
950
5.82
0.10
2.15
0.92
960
5.79
0.27
2.13
1.02
Z0 = 50 Ω
0 .1
Z Load
0.5
0.4
960 MHz
0.3
0.1
0 .0
D-
920 MHz
0.2
Z Source
960 MHz
920 MHz
0.1
W AV
T OW ARD L OA
GT HS
EL E N
- W AV E LE NGT H
S T OW
A
R
S
Z Load Ω
Data Sheet
5 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Reference Circuit
C1
0.001µF
R2
1.3K V
R1
1.2K V
QQ1
LM7805
VDD
Q1
BCP56
C2
0.001µF
R3
2KV
C3
0.001µF
R4
2KV
R5
5.1K V
C4
10µF
35V
R6
10 V
C5
0.1µF
L1
V DD
R7
5.1K V
C6
33pF
C7
0.1µF
C8
0.01µF
C9
33pF
C14
33pF
C15
1µF
C16
10µF
50V
l5
C17
0.1µF
C18
10µF
50V
l6
C10
33pF
RF_IN
l1
C24
1.0pF
R8
10 V
C27
33pF
DUT
l2
l3
l4
C11
1.2pF
C12
7.5pF
C13
0.7pF
l9
l 10
C25
1.0pF
C26
2.4pF
l8
l7
l11
l 12
l13
RF_OUT
C28
0.5pF
C19
33pF
C20
1µF
C21
10µF
50V
a09
1201ef_sch
L2
C22
0.1µF
C23
10µF
50V
Reference circuit schematic for ƒ = 960 MHz
Circuit Assembly Information
DUT
PTFA091201GL or PTFA091201HL
PCB
0.76 mm [.030"] thick, εr = 4.5
Microstrip
l1
l2
l3
l4
l5
l6, l7
l8
l9
l10
l11
l12
l13
Electrical Characteristics at 960 MHz1
0.072
0.115
0.029
0.062
0.149
0.122
0.027
0.103
0.072
0.155
0.013
0.015
Rogers TMM4
LDMOS Transistor
2 oz. copper
Dimensions: L x W ( mm) Dimensions: L x W (in.)
λ, 50.0 Ω
λ, 50.0 Ω
λ, 50.0 Ω
λ, 7.5 Ω
λ, 70.0 Ω
λ, 55.0 Ω
λ, 7.9 Ω
λ, 7.9 Ω
λ, 7.9 Ω
λ, 38.0 Ω
λ, 50.0 Ω
λ, 50.0 Ω
12.27 x 1.40
19.53 x 1.40
5.08 x 1.40
9.53 x 16.15
26.31 x 0.71
20.96 x 1.17
4.06 x 15.24
15.75 x 15.24
11.02 x 15.24
25.78 x 2.13
2.24 x 1.40
2.59 x 1.40
0.483
0.769
0.200
0.375
1.036
0.825
0.160
0.620
0.434
1.015
0.088
0.102
x
x
x
x
x
x
x
x
x
x
x
x
0.055
0.055
0.055
0.636
0.028
0.046
0.600
0.600
0.600
0.084
0.055
0.055
1Electrical characteristics are rounded.
Data Sheet
6 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Reference Circuit (cont.)
R5
C4
C5
C9 C8
R4
C3
R3
C6
R1
R6 R7
C7
C1
LM
R2
C18
VDD
QQ1
C2
C14
C15
Q1
C16
C17
R8
C24
RF_IN
C10
C11
VDD
L1
C28
RF_OUT
C12
C25
C27
C26
C13
C22
C21
C19
C20
VDD
L2
C23
A091201in_01
A091201out_01
a 0 9 1 2 0 1 e f_ a s s y
Reference circuit assembly diagram (not to scale)*
Component
Description
Suggested Manufacturer
P/N or Comment
C1, C2, C3
C4
C5, C7 C17, C22
C6, C9, C10, C14,
C19, C27
C8
C11
C12
C13
C15, C20
C16, C18, C21, C23
C24, C25
C26
C28
L1, L2
Q1
QQ1
R1
R2
R3
R4
R5, R7
R6, R8
Capacitor, 0.001 µF
Tantalum capacitor, 10 µF, 35 V
Capacitor, 0.1 µF
Ceramic capacitor, 33 pF
Digi-Key
Digi-Key
Digi-Key
ATC
PCC1772CT-ND
399-1655-2-ND
PCC104BCT-ND
100B 330
Capacitor, 0.01 µF
Ceramic capacitor, 1.2 pF
Ceramic capacitor, 7.5 pF
Ceramic capacitor, 0.7 pF
Capacitor, 1.0 µF
Tantalum capacitor, 10 µF, 50 V
Ceramic capacitor, 1.0 pF
Ceramic capacitor, 2.4 pF
Ceramic capacitor, 0.5 pF
Ferrite, 8.9 mm
Transistor
Voltage regulator
Chip Resistor 1.2 k-ohms
Chip Resistor 1.3 k-ohms
Chip Resistor 2 k-ohms
Potentiometer 2 k-ohms
Chip Resistor 5.1 k-ohms
Chip Resistor 10 ohms
ATC
ATC
ATC
ATC
ATC
Garrett Electronics
ATC
ATC
ATC
Elna Magnetics
Infineon Technologies
National Semiconductor
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
Digi-Key
200B 103
100B 1R2
100B 7R5
100B 0R7
920C105
TPSE106K050R0400
100B 1R0
100B 2R4
100B 0R5
BDS 4.6/3/8.9-4S2
BCP56
LM7805
P1.2KGCT-ND
P1.3KGCT-ND
P2KECT-ND
3224W-202ETR-ND
P5.1KECT-ND
P10ECT-ND
*Gerber files for this circuit available on request
Data Sheet
7 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Package Outline Specifications
Package PG-63248-2
4.83±0.51
[.190±.020]
CL
45° X 2.72
[45° X .107]
6.
45° X 1.78
[45° X .070]
2X R1.63
[R.064]
9.78 ± 0.08
[.385 ± .003]
CL
3X R0.51+1.14
–0.25
[R.020+.045
–.010 ]
20.27
[.798]
3.63+0.25
–0.13
[.143 +.010
–.005 ]
CL
0.064 (.0025) –A–
PG-63248-2(G)_po_8-28-08
34.04 ± 0.08
[1.340 ± .003]
Diagram Notes—unless otherwise specified:
1.
Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
Data Sheet
3.
Pins: D = drain, S = source, G = gate.
4.
Lead thickness: 0.10 + 0.051/–0.025 mm [.004 +0.002/–0.001 inch].
5.
Gold plating thickness: < 0.254 micron [< 10 microinch]
6.
Tabs may protrude 0.13 [.005] max from body.
7.
All tolerances ± 0.25 [.01] / ± 0.127 [.005] unless specified otherwise.
8 of 10
Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Package Outline Specifications (cont.)
Package PG-64248-2
9.78 ± 0.08
[.385 ± .003]
pg-64248-2(h)_po_8-28-08
20.57 ± 0.08
[.810 ± .003]
Diagram Notes—unless otherwise specified:
1.
Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3.
Pins: D = drain, S = source, G = gate.
4.
Lead thickness: 0.10 + 0.051/–0.025 mm [.004 +0.002/–0.001 inch].
5.
Gold plating thickness: < 0.254 micron [< 10 microinch]
6.
Tabs may protrude 0.13 [.005] max from body.
7.
All tolerances ± 0.25 [.01] / ± 0.127 [.005] unless specified otherwise.
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet
9 of 10
Rev. 02, 2008-08-27
PTFA091201GL/HL-V1
Confidential, Limited Internal Distribution
Revision History:
2008-08-27
2008-06-16, Preliminary Data Sheet
Previous Version:
Page
all
Subjects (major changes since last revision)
Remove Preliminary designation
8, 9
Revise package diagrams and notes
Data Sheet
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GOLDMOS® is a registered trademark of Infineon Technologies AG.
Edition 2008-08-27
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of
any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com/rfpower).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of
that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices
or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect
human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet
10 of 10
Rev. 02, 2008-08-27