INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT241 Octal buffer/line driver; 3-state Product specification File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 FEATURES GENERAL DESCRIPTION • Output capability: bus driver The 74HC/HCT241 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. • ICC category: MSI The 74HC/HCT241 are octal non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPHL/ tPLH propagation delay 1An to 1Yn; 2An to 2Yn CI input capacitance CPD power dissipation capacitance per buffer CL = 15 pF; VCC = 5 V notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. September 1993 2 HCT 7 11 ns 3.5 3.5 pF 30 30 pF Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 1OE output enable input (active LOW) 2, 4, 6, 8 1A0 to 1A3 data inputs 3, 5, 7, 9 2Y0 to 2Y3 bus outputs 10 GND ground (0 V) 17, 15, 13, 11 2A0 to 2A3 data inputs 18, 16, 14, 12 1Y0 to 1Y3 bus outputs 19 20E output enable input (active HIGH) 20 VCC positive supply voltage Fig.1 Pin configuration. September 1993 Fig.2 Logic symbol. 3 Fig.3 IEC logic symbol Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 FUNCTION TABLES INPUTS OUTPUT 1OE 1An 1Yn L L H L H X L H Z INPUTS OUTPUT 20E 2An 2Yn H H L L H X L H Z Note 1. H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state Fig.4 Functional diagram. September 1993 4 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. −40 to +85 typ. max. min. max. −40 to +125 UNIT VCC WAVEFORMS (V) min. max. tPHL/ tPLH propagation delay 1An to 1Yn; 2An to 2Yn 25 9 7 100 20 17 125 25 21 150 30 26 ns 2.0 4.5 6.0 Fig.5 tPZH/ tPZL 3-state output enable time 1OE to 1Yn; 2OE to 2Yn 30 11 9 150 30 26 190 38 33 225 45 38 ns 2.0 4.5 6.0 Fig.6 tPHZ/ tPLZ 3-state output disable time 1OE to 1Yn; 2OE to 2Yn 39 14 11 150 30 26 190 38 33 225 45 38 ns 2.0 4.5 6.0 Fig.6 tTHL/ tTLH output transition time 14 5 4 60 12 10 75 15 13 90 18 15 ns 2.0 4.5 6.0 Fig.5 September 1993 5 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT 1An 2An 1OE 2OE 0.70 0.70 0.70 1.50 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. UNIT VCC (V) WAVEFORMS max. tPHL/ tPLH propagation delay 1An to 1Yn; 2An to 2Yn 13 22 28 33 ns 4.5 Fig.5 tPZH/ tPZL 3-state output enable time 1OE to 1Yn; 2OE to 2Yn 15 30 38 45 ns 4.5 Fig.6 tPHZ/ tPLZ 3-state output disable time 1OE to 1Yn; 2OE to 2Yn 18 30 38 45 ns 4.5 Fig.6 tTHL/ tTLH output transition time 5 12 15 18 ns 4.5 Fig.5 September 1993 6 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.5 Waveforms showing the input (1An, 2An) to output (1Yn, 2Yn) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveform showing the 3-state enable and disable times for input 1OE. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveform showing the 3-state enable and disable times for input 2OE. September 1993 7 Philips Semiconductors Product specification Octal buffer/line driver; 3-state 74HC/HCT241 PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. September 1993 8