INTEGRATED CIRCUITS DATA SHEET TEA6324T Sound control circuit Preliminary specification File under Integrated Circuits, IC01 1997 Mar 13 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T FEATURES • Source selector for two stereo and one mono inputs • Interface for noise reduction circuits • Interface for external equalizer • Volume and balance control • Bass control with equalizer filters GENERAL DESCRIPTION • Treble control The sound control circuit TEA6324T is an I2C-bus controlled stereo preamplifier for car radio hi-fi sound applications. • Mute control at audio signal zero crossing • Fast mute control via I2C-bus • Fast mute control via pin • I2C-bus control for all functions • Power supply with internal power-on reset. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage ICC supply current VCC = 8.5 V Vo(rms) maximum output voltage level VCC = 8.5 V; THD ≤ 0.1% − 2000 − mV Gv voltage gain −86 − +20 dB Gstep(vol) step resolution (volume) − 1 − dB Gbass bass control −18 − +18 dB Gtreble treble control −12 − +12 dB Gstep(treble) step resolution (treble) − 1.5 − dB (S+N)/N signal-plus-noise to noise ratio Vo = 2.0 V; Gv = 0 dB; unweighted − 105 − dB RR100 ripple rejection Vr(rms) < 200 mV; f = 100 Hz; Gv = 0 dB − 75 − dB αcs channel separation 250 Hz ≤ f ≤ 10 kHz; Gv = 0 dB 90 96 − dB 7.5 8.5 9.5 V − 26 − mA ORDERING INFORMATION TYPE NUMBER TEA6324T 1997 Mar 13 PACKAGE NAME SO24 DESCRIPTION plastic small outline package; 24 leads; body width 7.5 mm 2 VERSION SOT137-1 1997 Mar 13 3 input right source input mono source input left source GND CKIN 5 × 220 nF 47 µF 13 14 10 11 12 15 2 23 Vref 16 POWER SUPPLY 17 7 18 VOLUME I RIGHT +20 to −31 dB VOLUME I LEFT +20 to −31 dB CKVL 220 nF SOURCE SELECTOR 8 220 nF BASS RIGHT ±18 dB 20 5.6 nF 21 TREBLE RIGHT ±12 dB TREBLE LEFT ±12 dB 4 5.6 nF MUTE FUNCTION ZERO CROSS DETECTOR 9 Cm 10 nF 22 1 24 3 MGK105 VOLUME II 0 to −55 dB BALANCE OUTPUT RIGHT I2C-BUS RECEIVER VOLUME II 0 to −55 dB BALANCE OUTPUT LEFT TEA6324T SDA SCL MUTE Sound control circuit Fig.1 Block diagram. 3.4 kΩ 270 nF 270 nF 19 5 LOGIC BASS LEFT ±18 dB 6 270 nF 270 nF handbook, full pagewidth VCC 100 µF CKVL 3.4 kΩ Philips Semiconductors Preliminary specification TEA6324T BLOCK DIAGRAM Philips Semiconductors Preliminary specification Sound control circuit TEA6324T PINNING SYMBOL PIN DESCRIPTION SDA 1 serial data input/output (I2C-bus) GND 2 ground OUTL 3 output left TL 4 treble control capacitor left channel or input from an external equalizer B2L 5 bass control left channel or output to an external equalizer B1L 6 bass control, left channel B1L 6 IVL 7 input volume I, left control part IVL 7 18 IVR QSL 8 output source selector, left channel QSL 8 17 QSR MUTE 9 mute control IMO 10 input mono source IBL 11 input B left source IAL 12 input A left source IAR 13 input A right source IBR 14 input B right source CAP 15 electronic filtering for supply Vref 16 reference voltage (0.5VCC) QSR 17 output source selector right channel IVR 18 input volume I, right control part B1R 19 bass control right channel B2R 20 bass control right channel or output to an external equalizer TR 21 treble control capacitor right channel or input from an external equalizer OUTR 22 output right VCC 23 supply voltage SCL 24 serial clock input (I2C-bus) 1997 Mar 13 handbook, halfpage SDA 1 24 SCL GND 2 23 VCC OUTL 3 22 OUTR TL 4 21 TR B2L 5 20 B2R 19 B1R TEA6324T MUTE 9 16 Vref IMO 10 15 CAP IBL 11 14 IBR IAL 12 13 IAR MGK104 Fig.2 Pin configuration. 4 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T 3. Fast mute via I2C-bus either by general mute (GMU, see Tables 2 and 8) or volume II block setting (see Table 4). FUNCTIONAL DESCRIPTION The source selector selects one of 2 stereo inputs or the mono input. The maximum input signal voltage is Vi(rms) = 2 V. The outputs of the source selector and the inputs of the following volume control parts are available at pins 7 and 8 for the left channel and pins 17 and 18 for the right channel. This offers the possibility of interfacing a noise reduction system. The mute function is performed immediately if ZCM is cleared (ZCM = 0). If the bit is set (ZCM = 1) the mute is activated after changing the GMU bit. The actual mute switching is delayed until the next zero crossing of the audio frequency signal. Two comparators are built-in to provide independent mute switches to control each of the audio channels (left and right). The volume control function is split into two sections: volume I control block and volume II control block. To avoid a large delay of mute switching when very low frequencies are processed, the maximum delay time is limited to typically 100 ms by an integrated timing circuit and an external capacitor (Cm = 10 nF, see Fig.9). This timing circuit is triggered by reception of a new data word for the switch function which includes the GMU bit. After a discharge and charge period of an external capacitor the muting switch follows the GMU bit, only if no zero crossing was detected during that time. The control range of volume I is between +20 dB and −31 dB in steps of 1 dB. The volume II control range is between 0 dB and −55 dB in steps of 1 dB. The recommended control range to be used is 86 dB (+20 to −66 dB) although in theory, a range of 106 dB (+20 to −86 dB) can be attained. The gain/attenuation setting of the volume I control block is common for both channels. The volume I control block is followed by the bass control block. The frequency response of the bass control (see Fig.3) is provided for each channel by an external filter in combination with internal resistors. The adjustable range is between −18 and +18 dB in steps of 1.8 dB at 46 Hz. The mute function can also be controlled externally (see Fig.9). If the mute pin is switched to ground all outputs are muted immediately (hardware mute). This mute request overwrites all mute controls via the I2C-bus for the time the pin is held LOW. The hardware mute position is not stored in the TEA6324T. The treble control block offers a control range between −12 and +12 dB in steps of 1.5 dB at 15 kHz. The filter characteristic is determined by a single capacitor of 5.6 nF for each channel in combination with internal resistors (see Fig.4). Typically, the turn on/off can be used to avoid AF output. This can be caused by the input signal from preceding stages, which may produce output during a drop of VCC. To avoid this, the mute must be set prior to a VCC drop and can be achieved either by I2C-bus control, or by grounding the MUTE pin. The basic step width of treble control is 3 dB. The intermediate steps are obtained by switching 1.5 dB boost and 1.5 dB attenuation steps. In cases where there is no mute in the application before turn off, a supply voltage drop of more than 1 × VBE will result in a mute during the voltage drop. The bass and treble control functions can be switched off via I2C-bus. In this event the internal signal flow is disconnected. The connections B2L and B2R are outputs and TL and TR are inputs for inserting an external equalizer. The power supply should include a VCC buffer capacitor, which provides a discharging time constant. If the input signal does not disappear after turn off the input will become audible after a certain time. A 4.7 kΩ resistor discharges the VCC buffer capacitor, because the internal current of the IC does not discharge it completely. The last section of the circuit is the volume II block. The balance function uses the same control block. This is achieved by 2 independently controllable attenuators, one for each output. The control range of these attenuators is 55 dB in steps of 1 dB with an additional mute step. The hardware mute function is ideal for use in Radio Data System (RDS) applications. The zero crossing mute avoids modulation plops. This feature is an advantage for mute during changing presets and/or sources (e.g. traffic announcement during cassette playback). The circuit provides 3 mute modes: 1. Zero crossing mode mute via I2C-bus using 2 independent zero crossing detectors (ZCM, see Tables 2 and 8 and Fig.15) 2. Fast mute via MUTE pin (see Fig.9) 1997 Mar 13 5 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 0 10 V Vn voltage at all pins relative to pin 2 0 VCC V Tamb operating ambient temperature −40 +85 °C Tstg storage temperature −65 +150 °C Ves electrostatic handling − − note 1 Note 1. Human body model: C = 100 pF; R = 1.5 kΩ; V ≥ 2 kV. Machine model: C = 200 pF; R = 0 Ω; V ≥ 500 V. 1997 Mar 13 6 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T CHARACTERISTICS VCC = 8.5 V; RS = 600 Ω; RL = 10 kΩ; CL = 2.5 nF; AC coupled; f = 1 kHz; Tamb = 25 °C; gain control Gv = 0 dB; bass linear; treble linear; balance in mid position; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage 7.5 8.5 9.5 V ICC supply current − 26 33 mA VDC internal DC voltage at inputs and outputs 3.83 4.25 4.68 V Vref internal reference voltage at pin 16 − 4.25 − V Gv(max) maximum voltage gain 19 20 21 dB Vo(rms) output voltage level (RMS value) for RS = 0 Ω; RL = ∞ Pmax at the power output stage THD ≤ 0.1%; see Fig.10 − 2000 − mV start of clipping THD = 1% 2300 − − mV RL = 2 kΩ; CL = 10 nF; THD = 1% 2000 − − mV − 200 − mV 60 − − Hz low frequency (−3 dB) 30 − − Hz high frequency (−1 dB) 20000 − − Hz Vi(rms) input sensitivity Vo = 2000 mV; Gv = 20 dB fro roll-off frequency CKIN = 220 nF; CKVL = 220 nF; Zi = Zi(min) low frequency (−1 dB) CKIN = 470 nF; CKVL = 100 nF; Zi = Zi(typ) low frequency (−3 dB) 17 − − Hz 90 96 − dB Vi = 100 mV; Gv = 20 dB − 0.1 − % αcs channel separation Vi = 2 V; frequency range 250 Hz to 10 kHz THD total harmonic distortion frequency range 20 Hz to 12.5 kHz RR (S+N)/N ripple rejection signal-plus-noise to noise ratio Vi = 1 V; Gv = 0 dB − 0.05 0.15 % Vi = 2 V; Gv = 0 dB − 0.1 − % Vi = 2 V; Gv = −10 dB − 0.1 − % f = 100 Hz 70 76 − dB f = 40 Hz to 12.5 kHz − 66 − dB − 105 − dB Gv = 0 dB − 95 − dB Gv = 12 dB − 88 − dB Gv = 20 dB − 81 − dB Vr(rms) < 200 mV unweighted; 20 Hz to 20 kHz RMS; Vo = 2.0 V; see Figs 5 and 6 CCIR468-2 weighted; quasi peak; Vo = 2.0 V 1997 Mar 13 7 Philips Semiconductors Preliminary specification Sound control circuit SYMBOL TEA6324T PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Pno(rms) noise output power (RMS value) only contribution of TEA6324T; power amplifier for 6 W mute position; note 1 − − 10 nW αct crosstalk between bus inputs and V bus ( p – p ) signal outputs 20 log --------------------------V o ( rms ) note 2 − 110 − dB 25 35 45 kΩ Source selector Zi input impedance αS input isolation of one selected source to any other input f = 1 kHz − 105 − dB f = 12.5 kHz − 95 − dB Vi(rms) maximum input voltage (RMS value) THD < 0.5%; VCC = 8.5 V − 2.15 − V THD < 0.5%; VCC = 7.5 V − 1.8 − V Voffset DC offset voltage at source selector output by selection of any inputs − − 10 mV Zo output impedance − 80 120 Ω RL output load resistance 10 − − kΩ CL output load capacity 0 − 2500 pF Gv voltage gain, source selector − 0 − dB Control part (source selector disconnected; source resistance 600 Ω) Zi input impedance volume input 100 150 200 kΩ Zo output impedance − 80 120 Ω RL output load resistance 2 − − kΩ CL output load capacity 0 − 10 nF RDCL DC load resistance at output to ground 4.7 − − kΩ Vi(rms) maximum input voltage (RMS value) THD < 0.5% − 2.15 − V Vn(o) noise output voltage CCIR468-2 weighted; quasi peak Gv = 20 dB − 110 220 µV Gv = 0 dB − 33 50 µV Gv = −66 dB − 13 22 µV mute position − 10 − µV total continuous control range − 106 − dB recommended control range − 86 − dB CRtot Gstep step resolution − 1 − dB step error between any adjoining step − − 0.5 dB Gv = +20 to −50 dB − − 2 dB ∆Ga attenuator set error Gv = −51 to −66 dB − − 3 dB ∆Gt gain tracking error Gv = +20 to −50 dB − − 2 dB αmute mute attenuation see Fig.9 100 110 − dB 1997 Mar 13 8 Philips Semiconductors Preliminary specification Sound control circuit SYMBOL Voffset TEA6324T PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DC step offset between any adjoining step Gv = 0 to −66 dB − 0.2 10 mV Gv = 20 to 0 dB − 2 15 mV DC step offset between any step to mute Gv = 0 to −66 dB − − 10 mV Volume I control − 51 − dB Gv voltage gain −31 − +20 dB Gstep step resolution − 1 − dB CRtot(vol)1 continuous volume control range Bass control Gbass Gstep Voffset bass control, maximum boost f = 46 Hz 16 18 19 dB maximum attenuation f = 46 Hz 16 18 19 dB step resolution (toggle switching) f = 46 Hz − 1.8 − dB step error between any adjoining step f = 46 Hz − − 0.5 dB − − 25 mV DC step offset in any bass position Treble control Gtreble Gstep Voffset treble control, maximum boost f = 15 kHz 11 12 13 dB maximum attenuation f = 15 kHz 11 12 13 dB maximum boost f > 15 kHz − − 15 dB step resolution (toggle switching) f = 15 kHz − 1.5 − dB step error between any adjoining step f = 15 kHz − − 0.5 dB − − 10 mV 53.5 55 56.5 dB step resolution − 1 2 dB attenuation set error − − 1.5 dB − 1.45 − V − − 1.0 V −300 − − µA DC step offset in any treble position Volume II and balance control CRtot(vol)2 continuous attenuation of volume control range Gstep Mute function (see Fig.9) HARDWARE MUTE Vsw mute switch level (2 × VBE) mute active VswLOW input level Ii input current VswLOW = 1 V mute passive: level internally defined VswHIGH saturation voltage − − VCC V td(mute) delay until mute passive − − 0.5 ms ZERO CROSSING MUTE Idch discharge current 0.3 0.6 1.2 µA Ich charge current −300 −150 − µA VswDEL delay switch level (3 × VBE) − 2.2 − V 1997 Mar 13 9 Philips Semiconductors Preliminary specification Sound control circuit SYMBOL PARAMETER td delay time V(w) window for audio signal zero crossing detection TEA6324T CONDITIONS Cm = 10 nF MIN. TYP. MAX. UNIT − 100 − ms − 30 40 mV − V23 − 0.7 − Muting at power supply drop VCCdrop supply drop for mute active V Power-on reset when reset is active the GMU-bit (general mute) is set and the I2C-bus receiver is in reset position VCC increasing supply voltage start of reset − − 2.5 V end of reset 5.2 6.5 7.2 V decreasing supply voltage start of reset 4.2 5.5 6.2 V Digital part (I2C-bus pins); note 3 VIH HIGH-level input voltage 3 − 9.5 V VIL LOW-level input voltage −0.3 − +1.5 V IIH HIGH-level input current −10 − +10 µA IIL LOW-level input current −10 − +10 µA VOL LOW-level output voltage − − 0.4 V IL = 3 mA Notes to the characteristics 1. The indicated values for output power assume a 6 W power amplifier at 4 Ω with 20 dB gain and a fixed attenuator of 12 dB in front of it. Signal-to-noise ratios exclude noise contribution of the power amplifier. 2. The transmission contains: total initialization with MAD and subaddress for volume and 8 data words, see also definition of characteristics, clock frequency = 50 kHz, repetition burst rate = 400 Hz, maximum bus signal amplitude = 5 V (p-p). 3. The AC characteristics are in accordance with the I2C-bus specification. This specification, “The I2C-bus and how to use it”, can be ordered using the code 9398 393 40011. 1997 Mar 13 10 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T I2C-BUS PROTOCOL I2C-bus format S(1) SLAVE ADDRESS(2) A(3) SUBADDRESS(4) A(3) DATA(5) A(3) P(6) Notes 1. S = START condition. 2. SLAVE ADDRESS (MAD) = 0101 0000. 3. A = acknowledge, generated by the slave. 4. SUBADDRESS (SAD), see Table 1. 5. DATA, see Table 1. 6. P = STOP condition. Table 1 Second byte after MAD MSB FUNCTION LSB BIT 7 6 5 4 3 2(1) 1(1) 0(1) Volume V 0 0 0 0 0 0 0 0 Output right OUTR 0 0 0 0 0 0 0 1 Output left OUTL 0 0 0 0 0 0 1 0 No function − 0 0 0 0 0 0 1 1 No function − 0 0 0 0 0 1 0 0 Bass BA 0 0 0 0 0 1 0 1 Treble TR 0 0 0 0 0 1 1 0 Switch S 0 0 0 0 0 1 1 1 Note 1. Significant subaddress. 1997 Mar 13 11 Philips Semiconductors Preliminary specification Sound control circuit Table 2 TEA6324T Definition of third byte after MAD and SAD MSB FUNCTION LSB BIT 7 6 5 4 3 2 1 0 ZCM(1) 1 V5(2) V4(2) V3(2) V2(2) V1(2) V0(2) Volume V Output right OUTR X(3) X(3) OUTR5(4) OUTR4(4) OUTR3(4) OUTR2(4) OUTR1(4) OUTR0(4) Output left OUTL X(3) X(3) OUTL5(5) OUTL4(5) OUTL3(5) OUTL2(5) OUTL1(5) OUTL0(5) No function − X(3) X(3) X(3) X(3) X(3) X(3) X(3) X(3) No function − X(3) X(3) X(3) X(3) X(3) X(3) X(3) X(3) Bass BA X(3) X(3) X(3) BA4(6) BA3(6) BA2(6) BA1(6) BA0(6) Treble TR X(3) X(3) X(3) TR4(7) TR3(7) TR2(7) TR1(7) TR0(7) Switch S GMU(8) X(3) X(3) X(3) X(3) SC2(9) SC1(9) SC0(9) Notes 1. Zero crossing mode. 2. Volume control. 3. Don’t care bits (logic 1 during testing). 4. Output right. 5. Output left. 6. Bass control. 7. Treble control. 8. Mute control for all outputs (general mute). 9. Source selector control. 1997 Mar 13 12 Philips Semiconductors Preliminary specification Sound control circuit Table 3 TEA6324T Volume I setting DATA Gv (dB) V5 V4 V3 V2 V1 V0 +20 1 1 1 1 1 1 +19 1 1 1 1 1 0 +18 1 1 1 1 0 1 +17 1 1 1 1 0 0 +16 1 1 1 0 1 1 +15 1 1 1 0 1 0 +14 1 1 1 0 0 1 +13 1 1 1 0 0 0 +12 1 1 0 1 1 1 +11 1 1 0 1 1 0 +10 1 1 0 1 0 1 +9 1 1 0 1 0 0 +8 1 1 0 0 1 1 +7 1 1 0 0 1 0 +6 1 1 0 0 0 1 +5 1 1 0 0 0 0 +4 1 0 1 1 1 1 +3 1 0 1 1 1 0 +2 1 0 1 1 0 1 +1 1 0 1 1 0 0 0 1 0 1 0 1 1 −1 1 0 1 0 1 0 −2 1 0 1 0 0 1 −3 1 0 1 0 0 0 −4 1 0 0 1 1 1 −5 1 0 0 1 1 0 −6 1 0 0 1 0 1 −7 1 0 0 1 0 0 −8 1 0 0 0 1 1 −9 1 0 0 0 1 0 −10 1 0 0 0 0 1 −11 1 0 0 0 0 0 −12 0 1 1 1 1 1 −13 0 1 1 1 1 0 −14 0 1 1 1 0 1 −15 0 1 1 1 0 0 −16 0 1 1 0 1 1 −17 0 1 1 0 1 0 1997 Mar 13 13 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T DATA Gv (dB) V5 V4 V3 V2 V1 V0 −18 0 1 1 0 0 1 −19 0 1 1 0 0 0 −20 0 1 0 1 1 1 −21 0 1 0 1 1 0 −22 0 1 0 1 0 1 −23 0 1 0 1 0 0 −24 0 1 0 0 1 1 −25 0 1 0 0 1 0 −26 0 1 0 0 0 1 −27 0 1 0 0 0 0 −28 0 0 1 1 1 1 −29 0 0 1 1 1 0 −30 0 0 1 1 0 1 −31 0 0 1 1 0 0 Repetition of steps in a range from −28 dB to −31 dB −28 0 0 1 0 1 1 −29 0 0 1 0 1 0 −30 0 0 1 0 0 1 −31 0 0 1 0 0 0 −28 0 0 0 1 1 1 −29 0 0 0 1 1 0 −30 0 0 0 1 0 1 −31 0 0 0 1 0 0 −28 0 0 0 0 1 1 −29 0 0 0 0 1 0 −30 0 0 0 0 0 1 −31 0 0 0 0 0 0 1997 Mar 13 14 Philips Semiconductors Preliminary specification Sound control circuit Table 4 TEA6324T Volume II setting; note 1 DATA Gv (dB) OUTL5 OUTL4 OUTL3 OUTL2 OUTL1 OUTL0 OUTR5 OUTR4 OUTR3 OUTR2 OUTR1 OUTR0 0 1 1 1 1 1 1 −1 1 1 1 1 1 0 −2 1 1 1 1 0 1 −3 1 1 1 1 0 0 −4 1 1 1 0 1 1 −5 1 1 1 0 1 0 −6 1 1 1 0 0 1 −7 1 1 1 0 0 0 −8 1 1 0 1 1 1 −9 1 1 0 1 1 0 −10 1 1 0 1 0 1 −11 1 1 0 1 0 0 −12 1 1 0 0 1 1 −13 1 1 0 0 1 0 −14 1 1 0 0 0 1 −15 1 1 0 0 0 0 −16 1 0 1 1 1 1 −17 1 0 1 1 1 0 −18 1 0 1 1 0 1 −19 1 0 1 1 0 0 −20 1 0 1 0 1 1 −21 1 0 1 0 1 0 −22 1 0 1 0 0 1 −23 1 0 1 0 0 0 −24 1 0 0 1 1 1 −25 1 0 0 1 1 0 −26 1 0 0 1 0 1 −27 1 0 0 1 0 0 −28 1 0 0 0 1 1 −29 1 0 0 0 1 0 −30 1 0 0 0 0 1 −31 1 0 0 0 0 0 −32 0 1 1 1 1 1 −33 0 1 1 1 1 0 −34 0 1 1 1 0 1 −35 0 1 1 1 0 0 −36 0 1 1 0 1 1 1997 Mar 13 15 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T DATA Gv (dB) OUTL5 OUTL4 OUTL3 OUTL2 OUTL1 OUTL0 OUTR5 OUTR4 OUTR3 OUTR2 OUTR1 OUTR0 −37 0 1 1 0 1 0 −38 0 1 1 0 0 1 −39 0 1 1 0 0 0 −40 0 1 0 1 1 1 −41 0 1 0 1 1 0 −42 0 1 0 1 0 1 −43 0 1 0 1 0 0 −44 0 1 0 0 1 1 −45 0 1 0 0 1 0 −46 0 1 0 0 0 1 −47 0 1 0 0 0 0 −48 0 0 1 1 1 1 −49 0 0 1 1 1 0 −50 0 0 1 1 0 1 −51 0 0 1 1 0 0 −52 0 0 1 0 1 1 −53 0 0 1 0 1 0 −54 0 0 1 0 0 1 −55 0 0 1 0 0 0 Mute 0 0 0 1 1 1 Mute 0 0 0 1 1 0 Mute 0 0 0 1 0 1 Mute 0 0 0 1 0 0 Mute 0 0 0 0 1 1 Mute 0 0 0 0 1 0 Mute 0 0 0 0 0 1 Mute 0 0 0 0 0 0 Note 1. For a particular range the data is always the same, only the subaddress changes. 1997 Mar 13 16 Philips Semiconductors Preliminary specification Sound control circuit Table 5 TEA6324T Bass setting DATA Gbass (dB) BA4 BA3 BA2 BA1 BA0 +18.0 1 1 1 1 1 +16.2 1 1 1 1 0 +18.0 1 1 1 0 1 +16.2 1 1 1 0 0 +18.0 1 1 0 1 1 +16.2 1 1 0 1 0 +14.4 1 1 0 0 1 +12.6 1 1 0 0 0 +10.8 1 0 1 1 1 +9.0 1 0 1 1 0 +7.2 1 0 1 0 1 +5.4 1 0 1 0 0 +3.6 1 0 0 1 1 +1.8 1 0 0 1 0 0(1) 1 0 0 0 1 0(2) 1 0 0 0 0 −1.8 0 1 1 1 1 −3.6 0 1 1 1 0 −5.4 0 1 1 0 1 −7.2 0 1 1 0 0 −9.0 0 1 0 1 1 −10.8 0 1 0 1 0 −12.6 0 1 0 0 1 −14.4 0 1 0 0 0 −16.2 0 0 1 1 1 −18.0 0 0 1 1 0 −16.2 0 0 1 0 1 −18.0 0 0 1 0 0 Note 3 0 0 0 1 1 Note 3 0 0 0 1 0 Note 3 0 0 0 0 1 Notes 3 and 4 0 0 0 0 0 Notes 1. Recommended data word for step 0 dB. 2. Result of 1.8 dB boost and 1.8 dB attenuation. 3. The last four bass control data words mute the bass response. 4. The last bass control and treble control data words (00000) enable the external equalizer connection. 1997 Mar 13 17 Philips Semiconductors Preliminary specification Sound control circuit Table 6 TEA6324T Treble setting DATA Gtreble (dB) TR4 TR3 TR2 TR1 TR0 +12.0 1 1 1 1 1 +10.5 1 1 1 1 0 +12.0 1 1 1 0 1 +10.5 1 1 1 0 0 +12.0 1 1 0 1 1 +10.5 1 1 0 1 0 +12.0 1 1 0 0 1 +10.5 1 1 0 0 0 +9.0 1 0 1 1 1 +7.5 1 0 1 1 0 +6.0 1 0 1 0 1 +4.5 1 0 1 0 0 +3.0 1 0 0 1 1 +1.5 1 0 0 1 0 0(1) 1 0 0 0 1 0(2) 1 0 0 0 0 −1.5 0 1 1 1 1 −3.0 0 1 1 1 0 −4.5 0 1 1 0 1 −6.0 0 1 1 0 0 −7.5 0 1 0 1 1 −9.0 0 1 0 1 0 −10.5 0 1 0 0 1 −12.0 0 1 0 0 0 Note 3 0 0 1 1 1 Note 3 0 0 1 1 0 Note 3 0 0 1 0 1 Note 3 0 0 1 0 0 Note 3 0 0 0 1 1 Note 3 0 0 0 1 0 Note 3 0 0 0 0 1 Notes 3 and 4 0 0 0 0 0 Notes 1. Recommended data word for step 0 dB. 2. Result of 1.5 dB boost and 1.5 dB attenuation. 3. The last eight treble control data words select treble output. 4. The last treble control and bass control data words (00000) enable the external equalizer connection. 1997 Mar 13 18 Philips Semiconductors Preliminary specification Sound control circuit Table 7 TEA6324T Selected input Table 8 Mute mode DATA DATA FUNCTION FUNCTION GMU ZCM Direct mute off 0 0 Mute off delayed until the next zero crossing 0 1 1 0 0 Direct mute 1 0 X(1) X(1) Mute delayed until the next zero crossing 1 1 SC2 SC1 SC0 Stereo inputs IAL and IAR 1 1 1 Stereo inputs IBL and IBR 1 1 0 No function 1 0 No function 1 Mono input IMO 0 Note 1. X = don’t care bits (logic 1 during testing). 1997 Mar 13 19 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T MED840 20 handbook, full pagewidth Gbass (dB) 10 0 −10 −20 10 10 2 10 3 f (Hz) 10 4 Fig.3 Bass control. MED424 15 handbook, full pagewidth Gtreble (dB) 10 5 0 −5 −10 −15 10 2 10 3 10 4 Fig.4 Treble control. 1997 Mar 13 20 f (Hz) 10 5 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T MED426 100 handbook, full pagewidth S/N (dB) (1) 90 (2) (3) 80 70 60 50 10 −4 10 −3 10 −2 10 −1 Po (W) 1 10 (1) Vi = 2.0 V. (2) Vi = 0.5 V. (3) Vi = 0.2 V. Fig.5 Signal-to-noise ratio; noise weighted: CCIR468-2, quasi peak. MED427 110 handbook, full pagewidth S/N (dB) (1) 100 (2) 90 (3) 80 70 60 10 −4 10 −3 10 −2 10 −1 (1) Unweighted RMS. (2) CCIR468-2 RMS. (3) CCIR468-2 quasi peak. Fig.6 Signal-to-noise ratio; Vi = 2 V; Pmax = 6 W. 1997 Mar 13 21 1 Po (W) 10 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T MHA594 200 handbook, full pagewidth noise (µV) 150 100 50 0 −70 −50 −30 −10 10 gain (dB) 30 Stereo/mono inputs. Fig.7 Noise output voltage; CCIR468-2, quasi peak. MED429 −60 handbook, full pagewidth (dB) −80 −100 −120 −140 20 50 10 2 200 500 10 3 Fig.8 Muting. 1997 Mar 13 22 2 x 10 3 5 x 10 3 10 4 2 x 10 4 f (Hz) Philips Semiconductors Preliminary specification Sound control circuit TEA6324T MUTE (pin 9) handbook, full pagewidth hardware mute switch Ich = −150 µA TEA6324T U (V) Idch = 0.6 µA Cm = 10 nF I (µA) td(mute) = 0.5 ms delay until mute passive VCC 8.5 0 delay switch(1) 2.2 level −150 mute switch(2) 1.45 level MHA595 100 ms zero crossing mute start end of delay t (ms) hard mute on hard mute off (1) Typically 2.2 V; referenced to 3 × VBE. (2) Typically 1.5 V; referenced to 2 × VBE. Fig.9 Mute function diagram. 1997 Mar 13 23 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T In cases where at the maximum volume position the 20 dB gain is not needed, it is recommended that the maximum boost gain should be used. This coupled with increased attenuation in the last section (volume II), results in a lower noise and offset voltage. POWER STAGE handbook, halfpage TEA6324T G = 20 dB Vi(min) = 200 mV Vo = 2 V for P(max) P(max) = 100 W at 4 Ω MHA596 a. POWER STAGE handbook, halfpage TEA6324T G = 26 dB Vi(min) = 200 mV Vo = 1 V for P(max) P(max) = 100 W at 4 Ω MHA597 b. a. Gain volume I = 20 dB (Gv(max)); gain volume II = 0 dB; control range = 55 dB. b. Gain volume I = 20 dB (Gv(max)); gain volume II = −6 dB global setting; control range now 49 dB, previously 55 dB. Fig.10 Level diagram. 1997 Mar 13 24 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T VP handbook, full pagewidth VCC 8.5 V 4.7 kΩ +8.5 V to oscilloscope 470 µF 23 13 3 11 14 TEA6324T 10 22 12 2 15 16 inputs 5 × 220 nF 47 µF 5 × 600 Ω outputs to oscilloscope 2 × 4.7 µF 100 µF 2 × 10 kΩ MHA598 Fig.11 Turn-on/off power supply circuit diagram. MED433 10 handbook, full pagewidth (V) 8 (1) 6 4 (2) 2 0 0 1 2 3 (1) VCC. (2) VO. Fig.12 Turn-on/off behaviour. 1997 Mar 13 25 4 t (s) 5 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T 3.4 kΩ 220 nF handbook, full pagewidth 100 µF 8 270 nF 7 270 nF 5.6 nF 6 5 10 nF 4 9 16 VCC = 8.5 V 24 SCL 1 SDA 23 0.1 µF 10 kΩ TEA6324T 2 1000 µF 47 µF VP 4.7 µF output right output left 15 0.2 V (RMS) VO 600 Ω 220 nF input A and B left and right and input mono 17 18 19 20 21 MHA599 5.6 nF 220 nF 270 nF 270 nF 3.4 kΩ Fig.13 Test circuit for power supply ripple rejection (RR). 3.4 kΩ handbook, full pagewidth 100 µF 220 nF 270 nF 8 6 7 270 nF 5.6 nF 5 10 nF 4 9 16 VCC = 8.5 V 470 µF 23 TEA6324T 0.1 µF 24 SCL 1 SDA 2 47 µF VP 15 Vi 600 Ω 220 nF 220 nF 4.7 µF output right output left input A and B right and left VO input A and B left and right and input mono 17 18 19 20 21 MHA600 5.6 nF 220 nF 270 nF 270 nF 3.4 kΩ Fig.14 Test circuit for channel separation (αcs). 1997 Mar 13 26 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T Selection of input signals by using the zero crossing mute mode After a fixed delay time at t2, the microcontroller sends the bits for input switching and mute inactive. The zero cross mute mode provides for a selection of input sources (A and B) for both left and right channels. The following example (see Fig.15), shows a typical selection for the left input source signals IAL and IBL. The initial selection of these channels produces a modulation click. The click is determined by the difference of the signal values at the time of switching. The output signal remains muted until the next signal zero crossing of input B (IBL) occurs, and then follows that signal up to 3 V. With a delay time of 40 ms (t2 − t1), the external capacitor Cm = 3.3 nF. This results with the zero cross function operating at the lowest frequency of 40 Hz determined by the Cm capacitor. At t1 the maximum possible difference between signals is 7 V (p-p) (see Fig.15) and gives a large click. Using the cross detector no modulation click is audible. With the selection enabled at t1, the microcontroller sets the zero cross bit (ZCM = 1) and then the mute bit (GMU = 1) via the I2C-bus. The output signal follows the input A signal from −4 V, until the next zero crossing occurs and then activates mute. handbook, full pagewidth MED436 V 4 (1) 3 2 1 0 −1 (2) t1 t t2 (3) −2 −3 −4 (1) Input A (IAL). (2) Output. (3) Input B (IBL). Fig.15 Zero cross function; only one channel shown. 1997 Mar 13 27 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T INTERNAL PIN CONFIGURATIONS Values shown in Figs 16 to 27 are typical DC values; VCC = 8.5 V. 3 + 4.25 V 1 5V 1.8 kΩ 80 Ω MBE911 MBE912 Fig.16 Pin 1: SDA (I2C-bus data). Fig.17 Pins 3 and 22: output signals. 5 + 4.25 V 4 4.25 V 80 Ω + 2.4 kΩ MHA601 MHA602 Fig.19 Pins 5 and 20: bass control capacitor outputs. Fig.18 Pins 4 and 21: treble control capacitors. 1997 Mar 13 28 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T 6 7 4.25 V 3.52 kΩ 4.25 V + + 150 kΩ 4.25 V MHA604 MHA603 Fig.20 Pins 6 and 19: bass control capacitor inputs. Fig.21 Pins 7 and 18: input volume 1, control part. 8 + + 4.25 V 9 8.5 V 1.3 kΩ 80 Ω constant 2.2 V maximum 200 µA 0.6 µA constant 4.5 kΩ MHA605 MHA606 Fig.22 Pins 8 and 17: output source selector. 1997 Mar 13 Fig.23 Pin 9: mute control. 29 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T + 4.7 kΩ 300 Ω 8.5 V 15 10 4.25 V + + 5 kΩ 3.4 kΩ 4.25 V 16 35 kΩ 3.4 kΩ 4.25 V MHA607 MHA608 Fig.25 Pin 15: filtering for supply; pin 16: reference voltage. Fig.24 Pins 10 to 14: inputs. 23 apply +8.5 V to this pin 24 5V 1.8 kΩ MHA610 MHA609 Fig.27 Pin 24: SCL (I2C-bus clock). Fig.26 Pin 23: supply voltage. 1997 Mar 13 30 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T PACKAGE OUTLINE SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 13 24 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.050 0.42 0.39 0.055 0.043 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 inches 0.10 Z (1) θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013AD 1997 Mar 13 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-24 31 o 8 0o Philips Semiconductors Preliminary specification Sound control circuit TEA6324T SOLDERING Wave soldering Introduction Wave soldering techniques can be used for all SO packages if the following conditions are observed: There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SO packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 1997 Mar 13 32 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1997 Mar 13 33 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T NOTES 1997 Mar 13 34 Philips Semiconductors Preliminary specification Sound control circuit TEA6324T NOTES 1997 Mar 13 35 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547027/1200/01/pp36 Date of release: 1997 Mar 13 Document order number: 9397 750 01599