BUK75/76/7E04-40A TrenchMOS™ standard level FET Rev. 02 — 7 November 2001 Product data 1. Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™ technology, featuring very low on-state resistance. Product availability: BUK7504-40A in SOT78 (TO-220AB); BUK7604-40A in SOT404 (D2-PAK); BUK7E04-40A in SOT226 (I2-PAK). 2. Features ■ ■ ■ ■ TrenchMOS™ technology Q101 compliant 175 °C rated Standard level compatible. 3. Applications ■ Automotive and general purpose power switching: ◆ 12 V loads ◆ Motors, lamps and solenoids. 4. Pinning information Table 1: Pinning - SOT78, SOT404, SOT226 simplified outline and symbol Pin Description 1 gate (g) 2 drain (d) 3 source (s) mb mounting base, connected to drain (d) Simplified outline Symbol mb d mb mb g MBB076 2 1 3 MBK116 MBK106 1 2 3 1 2 3 SOT78 (TO-220AB) SOT404 (D2-PAK) SOT226 MBK112 (I2-PAK) s BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit − 40 V − 198 A − 300 W − 175 °C Tj = 25 °C 3.9 4.5 mΩ Tj = 175 °C − 8.5 mΩ drain-source voltage (DC) VDS ID drain current (DC) Tmb = 25 °C; VGS = 10 V Tmb = 25 °C Ptot total power dissipation Tj junction temperature RDSon drain-source on-state resistance [1] VGS = 10 V; ID = 25 A 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS drain-source voltage (DC) VDGR drain-gate voltage (DC) VGS gate-source voltage (DC) drain current (DC) ID Conditions RGS = 20 kΩ Min Max Unit − 40 V − 40 V − ±20 V Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 [1] − 198 A [2] − 75 A Tmb = 100 °C; VGS = 10 V; Figure 2 [2] − 75 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 − 794 A Ptot total power dissipation Tmb = 25 °C; Figure 1 − 300 W Tstg storage temperature −55 +175 °C Tj operating junction temperature −55 +175 °C [1] − 198 A [2] − 75 A Tmb = 25 °C; pulsed; tp ≤ 10 µs − 794 A unclamped inductive load; ID = 75 A; VDS ≤ 40 V; VGS = 10 V; RGS = 50 Ω; starting Tmb = 25 °C − 1.6 J Source-drain diode reverse drain current (DC) IDR IDRM peak reverse drain current Tmb = 25 °C Avalanche ruggedness WDSS [1] [2] non-repetitive avalanche energy Current is limited by power dissipation chip rating Continuous current is limited by package © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 2 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 03na19 120 Pder 03ne93 200 ID (A) (%) 100 150 80 60 100 40 50 Capped at 75 A due to package 20 0 0 0 25 50 75 100 125 150 175 25 200 50 75 100 125 150 Tmb (ºC) 175 200 Tmb (ºC) VGS ≥ 4.5 V P tot P der = ---------------------- × 100% P ° tot ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 03ne68 RDSon = VDS / ID ID (A) tp = 10 µs 100 µs 102 Capped at 75 A due to package 1 ms 10 ms DC 10 100 ms 1 1 10 VDS (V) 102 Tmb = 25 °C; IDM single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 3 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 7. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Value Unit Rth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 and SOT226 packages 60 K/W mounted on printed circuit board; minimum footprint; SOT404 package 50 K/W Figure 4 0.5 K/W Rth(j-mb) thermal resistance from junction to mounting base 7.1 Transient thermal impedance 03ne69 1 Zth(j-mb) (K/W) δ = 0.5 10-1 0.2 0.1 0.05 10-2 0.02 δ= P tp T Single Shot t tp T 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 4 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 8. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 40 − − V Tj = −55 °C 36 − − V Static characteristics V(BR)DSS VGS(th) IDSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 drain-source leakage current Tj = 25 °C 2 3 4 V Tj = 175 °C 1 − − V Tj = −55 °C − − 4.4 V Tj = 25 °C − 0.05 10 µA Tj = 175 °C − − 500 µA − 2 100 nA Tj = 25 °C − 3.9 4.5 mΩ Tj = 175 °C − − 8.5 mΩ − 117 − nC − 19 − nC − 50 − nC − 4300 5730 pF − 1400 1680 pF − 800 1100 pF − 33 − ns − 110 − ns − 151 − ns VDS = 40 V; VGS = 0 V IGSS gate-source leakage current VGS = ±20 V; VDS = 0 V RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Figure 7 and 8 Dynamic characteristics Qg(tot) total gate charge Qgs gate-to-source charge Qgd gate-to-drain (Miller) charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time tf fall time Ld internal drain inductance Ls internal source inductance VGS = 10 V; VDD = 32 V; ID = 25 A; Figure 14 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VDD = 30 V; RL = 1.2 Ω; VGS = 10 V; RG = 10 Ω; − 76 − ns from drain lead 6mm from package to centre of die − 4.5 − nH from contact screw on mounting base to centre of die SOT78 − 3.5 − nH from upper edge of drain mounting base to centre of die SOT404 / SOT226 − 2.5 − nH from source lead to source bond pad − 7.5 − nH © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 5 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET Table 5: Characteristics…continued Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit − 0.85 1.2 V Source-drain diode VSD source-drain (diode forward) voltage IS = 40 A; VGS = 0 V; Figure 15 trr reverse recovery time Qr recovered charge IS = 20 A; dIS/dt = −100 A/µs VGS = −10 V; VDS = 30 V 03ne65 ID 450 (A) 400 12 10 9 96 − ns 224 − nC 03ne64 6 8.5 RDSon (mΩ) 20 350 − − 7.5 5 300 250 6.5 200 150 4 VGS (V) = 5.5 100 50 4.5 0 3 0 2 4 6 8 10 VDS (V) Tj = 25 °C; tp = 300 µs 5 15 20 VGS (V) Tj = 25 °C; ID = 25 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. 03aa27 03ne66 10 RDSon (mΩ) 10 2 a VGS (V) = 6 7 8 1.6 8 1.2 6 9 10 4 0.8 2 0.4 0 0 0 50 100 150 200 250 300 350 400 ID (A) Tj = 25 °C -60 60 120 o Tj ( C) 180 R DSon a = --------------------------R DSon ( 25 °C ) Fig 7. Drain-source on-state resistance as a function of drain current; typical values. Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data 0 Rev. 02 — 7 November 2001 6 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 03aa32 5 VGS(th) 10-1 03aa35 ID (A) (V) 4 max 10-2 typ 10-3 min 10-4 3 2 typ min max 10-5 1 0 -60 10-6 0 60 120 180 Tj (ºC) 4 2 0 VGS (V) 6 Tj = 25 °C; VDS = VGS ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03ne62 100 03ne67 8000 gfs (S) C (pF) 80 Ciss 6000 60 Coss 4000 40 2000 20 Crss 0 0 0 20 40 60 80 10-1 1 ID (A) Tj = 25 °C; VDS = 25 V VDS (V) 102 VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values. Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data 10 Rev. 02 — 7 November 2001 7 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 03ne63 150 03ne61 10 VGS (V) ID (A) 8 100 VDD = 14 V 6 VDD = 32 V 4 50 Tj = 175 oC 2 Tj = 25 oC 0 0 0 2 4 VGS (V) 0 6 30 60 90 120 QG (nC) Tj = 25 °C; ID = 25 A VDS = 25 V Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values. 03ne60 200 IS (A) 150 100 Tj = 25 oC 50 Tj = 175 oC 0 0.0 0.5 1.0 VSD (V) 1.5 VGS = 0 V Fig 15. Reverse diode current as a function of reverse diode voltage; typical values. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 8 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 9. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78 A A1 p q mounting base D1 D L2 L1(1) Q b1 L 1 2 3 b c e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1(1) L2 max. p q Q mm 4.5 4.1 1.39 1.27 0.9 0.7 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 3.8 3.6 3.0 2.7 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION REFERENCES IEC SOT78 JEDEC EIAJ 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 00-09-07 01-02-16 Fig 16. SOT78 (TO-220AB). © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 9 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped) SOT404 A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.80 14.80 2.60 2.20 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 99-06-25 01-02-12 SOT404 Fig 17. SOT404 (D2-PAK). © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 10 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET Plastic single-ended package; low-profile 3 lead TO-220AB SOT226 A A1 E D1 mounting base D L1 L2 Q b1 L 1 2 3 b c e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) (1) UNIT A A1 b b1 c D D1 E e L L1 L2 max Q mm 4.5 4.1 1.40 1.27 0.9 0.7 1.3 1.0 0.7 0.4 9.65 8.65 1.5 1.1 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT226 REFERENCES IEC JEDEC EIAJ low-profile 3-lead TO-220AB EUROPEAN PROJECTION ISSUE DATE 99-05-27 99-09-13 Fig 18. SOT226 (I2-PAK). © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 11 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 10. Soldering 10.85 10.60 10.50 handbook, full pagewidth 1.50 7.50 7.40 1.70 2.25 2.15 8.15 8.275 8.35 1.50 4.60 0.30 4.85 5.40 7.95 8.075 3.00 0.20 1.20 1.30 1.55 solder lands solder resist 5.08 MSD057 occupied area solder paste Dimensions in mm. Fig 19. Reflow soldering footprint for SOT404. © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 12 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 11. Revision history Table 6: Revision history Rev Date 02 20011107 CPCN Description - Product data; second version; supersedes Rev. 01 of 20011018. • 01 20011018 - Problem during rendering process leading to mΩ being shown as µΩ in table 5. Product data; initial version © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Product data Rev. 02 — 7 November 2001 13 of 15 BUK75/76/7E04-40A Philips Semiconductors TrenchMOS™ standard level FET 12. Data sheet status Data sheet status[1] Product status[2] Definition Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] [2] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 13. Definitions 14. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: [email protected]. Product data Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2001. All rights reserved. 9397 750 09059 Rev. 02 — 7 November 2001 14 of 15 Philips Semiconductors BUK75/76/7E04-40A TrenchMOS™ standard level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 © Koninklijke Philips Electronics N.V. 2001. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 7 November 2001 Document order number: 9397 750 09059