IRF IRF6811STR1PBF

PD-97634
IRF6811SPbF
IRF6811STRPbF
DirectFET®plus Power MOSFET ‚
l
l
l
l
l
l
l
l
l
l
RoHS Compliant and Halogen Free 
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible 
Ultra Low Package Inductance
Optimized for High Frequency Switching 
Ideal for CPU Core DC-DC Converters
Optimized for Control FET Application
Compatible with existing Surface Mount Techniques 
100% Rg tested
Footprint compatible to DirectFET
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
25V max ±16V max 2.8mΩ @ 10V 4.1mΩ @ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
4.2nC
1.4nC
23nC
11nC
1.6V
tot
11nC
D
G
D
S
ISOMETRIC
SQ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF6811STRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET ® packaging to achieve
improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET® package is compatible with
existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET® package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6811STRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in
switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6811STRPbF has been optimized for the control FET socket of synchronous buck
operating from 12 volt bus converters.
Absolute Maximum Ratings
Max.
Parameter
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
Typical RDS(on) (mΩ)
ID = 19A
10
8
6
TJ = 125°C
4
2
T J = 25°C
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
h
12
Units
25
±16
19
15
74
150
32
15
VGS, Gate-to-Source Voltage (V)
VDS
V
A
mJ
A
14.0
ID= 15A
VDS= 20V
12.0
10.0
VDS= 13V
VDS= 5.0V
8.0
6.0
4.0
2.0
0.0
0
5
10
15
20
25
30
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.28mH, RG = 50Ω, IAS = 15A.
1
01/28/11
IRF6811SPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
VGS = 0V, ID = 250µA
V
mV/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 19A
mΩ
VGS = 4.5V, ID = 15A
BVDSS
Drain-to-Source Breakdown Voltage
25
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
–––
–––
22
2.8
–––
3.7
VGS(th)
Gate Threshold Voltage
–––
1.1
4.1
1.6
5.4
2.1
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
-6.2
–––
–––
–––
1.0
150
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
–––
–––
–––
–––
100
-100
Forward Transconductance
Total Gate Charge
180
–––
–––
11
–––
17
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
–––
2.2
1.4
4.2
–––
–––
–––
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
–––
3.2
5.6
–––
–––
Output Charge
Gate Resistance
–––
–––
11
0.4
–––
–––
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
–––
–––
–––
8.7
19
11
–––
–––
–––
Fall Time
Input Capacitance
–––
–––
5.5
1590
–––
–––
Output Capacitance
Reverse Transfer Capacitance
–––
–––
460
110
–––
–––
Min.
Typ. Max. Units
gfs
Qg
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Conditions
Typ. Max. Units
i
i
VDS = VGS, ID = 35µA
mV/°C VDS = VGS, ID = 25µA
µA VDS = 20V, VGS = 0V
VDS = 20V, VGS = 0V, TJ = 125°C
V
nA
GS = 16V
V
S
VGS = -16V
VDS = 13V, ID = 15A
VDS = 13V
nC
VGS = 4.5V
ID = 15A
See Fig. 2 & 15
nC
VDS = 16V, VGS = 0V
Ω
VDD = 13V, VGS = 4.5V
ns
pF
ID = 15A
i
RG = 1.5Ω
See Fig. 17
VGS = 0V
VDS = 13V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
ISM
VSD
trr
Qrr
Continuous Source Current
(Body Diode)
Pulsed Source Current
g
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
40
–––
–––
150
–––
–––
1.0
V
–––
–––
18
23
27
35
ns
nC
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 15A, VGS = 0V
TJ = 25°C, IF = 15A
di/dt = 300A/µs
i
i
Notes:
… Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6811SPbF
Absolute Maximum Ratings
e
e
f
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
Max.
Parameter
Units
2.1
1.3
32
270
-40 to + 150
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
W
°C
Thermal Resistance
Parameter
el
jl
kl
fl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
60
–––
–––
3.9
–––
°C/W
0.017
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
10
1
0.20
0.10
0.05
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
R2
R2
R3
R3
τA
τ2
τ1
τ2
τ3
τ3
τ4
τA
τ4
Ci= τi/Ri
Ci= τi/Ri
0.01
0.001
1E-006
0.0001
21.298
2.002815
24.844
0.296144
3.3632
0.000886
10.411
0.027621
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
τi (sec)
Ri (°C/W)
R4
R4
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
ˆ Used double sided cooling, mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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‰ Mounted to a PCB with
small clip heatsink (still air)
‰ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6811SPbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.8V
2.5V
100
10
1
2.5V
≤60µs PULSE WIDTH
BOTTOM
10
2.5V
≤60µs PULSE WIDTH
Tj = 25°C
Tj = 150°C
0.1
0.1
1
10
100
1
1000
0.1
VDS, Drain-to-Source Voltage (V)
10
100
1000
Fig 5. Typical Output Characteristics
1000
2.0
VDS = 15V
≤60µs PULSE WIDTH
ID = 19A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
100
TJ = 150°C
TJ = 25°C
TJ = -40°C
10
1
0.1
V GS = 10V
V GS = 4.5V
1.5
1.0
0.5
1
2
3
4
45
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
35
Typical RDS(on) ( mΩ)
Ciss
Coss
1000
T J = 25°C
40
C oss = C ds + C gd
10000
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
100000
-60 -40 -20 0
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
VGS
10V
5.0V
4.5V
3.5V
3.3V
3.0V
2.8V
2.5V
Crss
100
30
25
20
15
10
5
0
10
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
0
20
40
60
80
100 120 140 160
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6811SPbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
T J = 150°C
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
T J = 25°C
T J = -40°C
10
1
100µsec
1msec
10
10msec
1
DC
T A = 25°C
T J = 150°C
0.1
VGS = 0V
Single Pulse
0
0.01
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0.01
0.10
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Typical VGS(th) Gate threshold Voltage (V)
ID, Drain Current (A)
70
60
50
40
30
20
10
0
50
75
100
125
10.00
100.00
Fig11. Maximum Safe Operating Area
80
25
1.00
VDS, Drain-to-Source Voltage (V)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
ID = 25µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
0.8
0.6
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
EAS , Single Pulse Avalanche Energy (mJ)
140
ID
1.4A
2.2A
BOTTOM 15A
120
TOP
100
80
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6811SPbF
Id
Vds
Vgs
L
VCC
DUT
0
1K
Vgs(th)
Qgs1 Qgs2
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
D.U.T
VGS
RG
20V
tp
+
- VDD
IAS
I AS
0.01Ω
tp
Fig 16a. Unclamped Inductive Test Circuit
VDS
VGS
RG
RD
Fig 16b. Unclamped Inductive Waveforms
VDS
90%
D.U.T.
+
- VDD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
6
A
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF6811SPbF
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET®plus Board Footprint, SQ Outline
(Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G =G ATE
D = D R A IN
S=SO URCE
D
D
G
D
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S
D
7
IRF6811SPbF
DirectFET®plus Outline Dimension, SQ Outline
(Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.
D IM E N S IO N S
IM P E R IA L
M E T R IC
MAX
M IN
C O D E M IN
MAX
4.8 5
A
0.1 8 7
0.1 9 1
4 .7 5
3.9 5
0.1 4 6
B
3 .7 0
0.1 5 6
2 .85
0.1 0 8
C
0.1 1 2
2 .7 5
0.4 5
D
0.0 1 4
0.0 1 8
0 .3 5
0.5 2
0.0 1 9
E
0 .4 8
0.0 2 0
0.8 2
0.0 3 1
F
0.0 3 2
0 .7 8
0.9 2
G
0.0 3 5
0.0 3 6
0 .8 8
0.8 2
0.0 3 1
H
0 .7 8
0.0 3 2
N /A
N /A
J
N /A
N /A
0.9 7
K
0.0 3 7
0.0 3 8
0 .9 3
2 .10
L
0.0 7 9
2 .0 0
0.0 8 3
M
0.0 2 3
0 .5 35 0.5 9 5 0.0 2 1
R
0 .0 20 0.0 8 0 0.0 0 08 0.0 0 31
0.1 7
P
0.0 0 3
0 .0 8
0.0 0 7
DirectFET®plus Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
8
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IRF6811SPbF
DirectFET®plus Tape & Reel Dimension (Showing component orientation).
E
A
B
D
C
F
G
H
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6811STRPBF). For 1000 parts on 7"
reel, order IRF6811S TR1PBF
S TANDARD OPTION
METRIC
CODE
MIN
MAX
A
330.0
N.C
B
20.2
N.C
C
12.8
13.2
D
1.5
N.C
E
100.0
N.C
F
N.C
18.4
G
12.4
14.4
H
11.9
15.4
REEL DIME NSIONS
(QTY 4800)
TR1 OPTION
IMP ERIAL
METRIC
MIN
MIN
MAX
MA X
12.992
177.77 N.C
N.C
0.795
19.06
N.C
N.C
0.504
13.5
0.520
12.8
0.059
1.5
N.C
N.C
3.937
58.72
N.C
N.C
N.C
N.C
0.724
13.50
0.488
11.9
0.567
12.01
0.469
11.9
0.606
12.01
(QTY 1000)
IMPERIAL
MIN
MAX
6.9
N.C
0.75
N.C
0.53
0.50
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
LOADED TAPE FEED DIRECTION
A
H
F
C
D
B
E
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
G
DIMENSIONS
METRIC
IMPERIAL
MIN
MAX
MIN
MAX
0.311
7.90
0.319
8.10
0.154
4.10
3.90
0.161
0.469
11.90
0.484
12.30
0.215
5.55
5.45
0.219
0.158
4.00
0.165
4.20
0.197
5.20
5.00
0.205
0.059
1.50
N.C
N.C
0.059
1.60
1.50
0.063
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.01/2011
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9