Preliminary PLL701-21 Low EMI Spread Spectrum Multiplier Clock FEATURES • Spread Spectrum Clock Generator with selectable SST mode. Output frequency ranges: 24MHz to 200MHz. Selectable Center Spread Modulation. TTL/CMOS compatible outputs. 3.3V Operating Voltage. Low short-term jitter. Available in 8-Pin 150mil SOIC. FIN 1 S2^ 2 S1^ 3 S0v 4 PLL701-21 • • • • • • PIN CONFIGURATION 8 VDD 7 S3^ 6 FOUT 5 GND FIN = 24 ~ 200 Mhz Note: v: 30kΩ Internal Pull down. ^: 30kΩ Internal Pull up. DESCRIPTION The PLL701-21 is a Spread Spectrum Clock Generator designed for the purpose of reducing EMI in high-speed digital systems, with selectable Center Spread modulation magnitude (see table below). The device operates over a very wide range of input frequencies and provides a 1x modulated clock output. SST BY-PASS SELECTOR S3 Spread Spectrum Mode 0 1 OFF ON (See below) Default Note: S3 has an internal Pull Up. Default=”1” MODULATION MAGNITUDE SELECTION FIN Range (MHz) Spread Spectrum Modulation S2 S1 S0 FOUT 0 0 0 0 0 0 1 1 0 1 0 1 24 24 24 24 - 200 200 200 200 X1 X1 X1 X1 1 1 1 1 0 0 1 1 0 1 0 1 24 24 24 24 - 200 200 200 200 X1 X1 X1 X1 Frequency Fin / 1024 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Magnitude ±0.75% ±1.00% ±1.25% ±0.125% ±0.25% ±0.50% ±0.375% ±0.625% Rev 05/12/05 Page 1 Preliminary PLL701-21 Low EMI Spread Spectrum Multiplier Clock BLOCK DIAGRAM PLL SST FIN FOUT Control S(0:3) Logic PIN DESCRIPTIONS Name Number Type FIN 1 I S2 2 I S1 3 I S0 4 I GND FOUT S3 VDD 5 6 7 8 P O I P Description Input Clock Frequency. 24MHz to 200MHz. Digital control input for SST modulation magnitude selection. Has internal pullup. Digital control input for SST modulation magnitude selection. Has internal pullup. Digital control input for SST modulation magnitude selection. Has internal pulldown. Ground. SST Modulated Clock Frequency Output. SST By-Pass Selector. S3 has internal pull-up. Default =”1” 3.3V Power Supply. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model SYMBOL V DD VI VO TS TA TJ MIN. -0.5 -0.5 -65 -40 MAX. UNITS 4.6 V DD +0.5 V DD +0.5 150 85 125 260 2 V V V °C °C °C °C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 05/12/05 Page 2 Preliminary PLL701-21 Low EMI Spread Spectrum Multiplier Clock 2. DC/AC Specifications PARAMETERS SYMBOL Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage Input Frequency Maximum interruption of F IN Input Capacitance Pull-up Resistor Pull-down Resistor Short Circuit Current 3.3V Dynamic Supply Current V DD V IH V IL I IH I IL V OH V OL F IN C in1 R pu R pd I sc I CC CONDITIONS MIN. TYP. 2.97 0.7* V DD MAX. UNITS 3.63 V V V 0.3* V DD 100 100 I OH =5mA, V DD =3.3V I OL =6mA, V DD =3.3V 2.4 0.4 200 100 24 4 30 30 50 20 PIN 2, 3, 7 PIN 4 No Load µA µA V V MHz µs pF kΩ kΩ mA mA 3. TIMING CHARACTERISTICS PARAMETERS SYMBOL Rise Time Fall Time Output Duty Cycle Input to Output Delay Cycle to Cycle Jitter Tr Tf DT T cyc-cyc CONDITIONS Measured at 0.8V ~ 2.0V @ 3.3V Measured at 2.0V ~ 0.8V @ 3.3V MIN. TYP. MAX. UNITS 0.8 0.78 45 2 0.95 0.85 50 1.1 0.9 55 4 100 ns ns % ns ps Over output frequency range @ 3.3V FUNCTIONAL DESCRIPTION Selectable spread spectrum and modulation rates The PLL701-21 provides Center Spread modulation, as well as a selectable modulation magnitude. Selection is made by connecting pins 2 (S2), 3 (S1) and 4 (S0) to a logical “zero” or “one”, according to the modulation magnitude selection table on page 1. Default values for S(0:3) through internal pull-up and pull-down resistor Selection pin 4 (S0) has an internal pull-down resistor of 30kΩ while pins 2, 3 and 7 (S2, S1 and S3) have an internal pull-up resistor of 30kΩ. This internal pull-down (or pull-up) resistor will pull the input value to a logical “zero” (or “one” respectively) by default, i.e. when no connection is made between the pin and VDD (GND respectively). In order to override the internal pull-down (pull-up), the pin has to be connected to VDD (GND respectively). 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 05/12/05 Page 3 Preliminary PLL701-21 Low EMI Spread Spectrum Multiplier Clock PACKAGE INFORMATION 8 PIN Narrow SOIC ( mm ) SOIC Symbol Min. Max. A 1.47 1.73 A1 B 0.10 0.33 0.25 0.51 C 0.19 0.25 D E 4.80 3.80 4.95 4.00 H 5.80 6.20 L e 0.38 1.27 1.27 BSC E H D A A1 C L e B ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL701-21 S C PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRIAL PACKAGE TYPE S=SOIC Order Number PLL701-21SC-R PLL701-21SC Marking P701-21SC P701-21SC Package Option SOIC -Tape and Reel SOIC -Tube PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 05/12/05 Page 4