74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Rev. 03 — 21 November 2006 Product data sheet 1. General description The 74HC366; 74HCT366 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC366; 74HCT366 has six inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable inputs (OE1, OE2). A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. The 74HC366; 74HCT366 is functionally identical to: • 74HC365; 74HCT365, but has inverted outputs 2. Features n Inverting outputs n Complies with JEDEC standard no. 7A n ESD protection: u HBM EIA/JESD22-A114-D exceeds 2000 V u MM EIA/JESD22-A115-A exceeds 200 V n Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC366D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC366N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HC366PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT366D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT366DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HCT366N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HC366 74HCT366 74HCT366PW −40 °C to +125 °C 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 4. Functional diagram 2 4 6 10 12 14 1A 1Y 2A 2Y 3A 3Y 4A 4Y 5A 5Y 6A 6Y 3 1A 1Y 2A 2Y 3A 3Y 4A 4Y 5 7 11 5A 5Y 13 6Y OE1 OE2 OE1 OE2 001aaf583 Fig 1. Functional diagram & EN 9 6A 1 15 1 15 2 3 4 5 6 7 10 9 12 11 14 13 001aaf581 Fig 2. Logic symbol 001aaf582 Fig 3. IEC logic symbol buffer/line driver 1 VCC 1A 1Y OE1 OE2 GND 2A 3A 4A 5A 6A buffer/line driver 2 2Y buffer/line driver 3 3Y buffer/line driver 4 4Y buffer/line driver 5 5Y buffer/line driver 6 6Y 001aaf584 Fig 4. Logic diagram 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 2 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 5. Pinning information 5.1 Pinning 74HC366 74HCT366 OE1 1 16 VCC 1A 2 15 OE2 1Y 3 14 6A 2A 4 13 6Y 2Y 5 12 5A 3A 6 11 5Y 3Y 7 10 4A GND 8 9 4Y 001aaf580 Fig 5. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description OE1 1 output enable input 1 (active LOW) 1A 2 data input 1 1Y 3 data output 1 2A 4 data input 2 2Y 5 data output 2 3A 6 data input 3 3Y 7 data output 3 GND 8 ground (0 V) 4Y 9 data output 4 4A 10 data input 4 5Y 11 data output 5 5A 12 data input 5 6Y 13 data output 6 6A 14 data input 6 OE2 15 output enable input 2 (active LOW) VCC 16 supply voltage 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 3 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 6. Functional description Table 3. Function table[1] Control Input Output OE1 OE2 nA nY L L L H L L H L X H X Z H X X Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7 V IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V - ±20 mA IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA IO output current VO = −0.5 V to (VCC + 0.5 V) - ±35 mA ICC supply current - 70 mA IGND ground current - −70 mA Tstg storage temperature total power dissipation Ptot −65 +150 °C DIP16 package [1] - 750 mW SO16 package [2] - 500 mW SSOP16 package [3] - 500 mW TSSOP16 package [3] - 500 mW [1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. [3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 74HC366 VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 4 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 5. Recommended operating conditions …continued Symbol Parameter Conditions tr inputs tf rise time fall time Min Typ Max Unit VCC = 2.0 V - - 1000 ns VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns VCC = 2.0 V - - 1000 ns VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns inputs 74HCT366 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C tr rise time inputs; VCC = 4.5 V - 6.0 500 ns tf fall time inputs; VCC = 4.5 V - 6.0 500 ns Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V 9. Static characteristics Table 6. Static characteristics 74HC366 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH VIL VOH VOL II HIGH-level input voltage LOW-level input voltage VCC = 6.0 V 4.2 3.2 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V HIGH-level output voltage VI = VIH or VIL LOW-level output voltage input leakage current - - - IO = −20 µA; VCC = 2.0 V 1.9 2.0 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - V IO = −6.0 mA; VCC = 4.5 V 3.98 4.32 - V IO = −7.8 mA; VCC = 6.0 V 5.48 5.81 - V IO = 20 µA; VCC = 2.0 V - 0 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V VI = VCC or GND; VCC = 6.0 V - - ±0.1 µA VI = VIH or VIL 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 5 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 6. Static characteristics 74HC366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - ±0.5 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 µA CI input capacitance - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V Tamb = −40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −6.0 mA; VCC = 4.5 V 3.84 - - V IO = −7.8 mA; VCC = 6.0 V 5.34 - - V IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 6.0 mA; VCC = 4.5 V - - 0.33 V IO = 7.8 mA; VCC = 6.0 V - - 0.33 V HIGH-level output voltage VI = VIH or VIL LOW-level output voltage VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V; - - ±1.0 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - ±5.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 µA VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −6.0 mA; VCC = 4.5 V 3.7 - - V IO = −7.8 mA; VCC = 6.0 V 5.2 - - V Tamb = −40 °C to +125 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 6 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 6. Static characteristics 74HC366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VOL VI = VIH or VIL LOW-level output voltage Min Typ Max Unit IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 6.0 mA; VCC = 4.5 V - - 0.4 V IO = 7.8 mA; VCC = 6.0 V - - 0.4 V µA II input leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - ±10.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 Conditions Min Typ Max Unit µA Table 7. Static characteristics 74HCT366 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = −20 µA 4.4 4.5 - V IO = −6.0 mA 3.98 4.32 - V IO = 20 µA - 0 0.1 V IO = 6.0 mA - 0.16 0.26 V - - ±0.1 µA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V II input leakage current IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V - - ±0.5 µA ICC supply current - - 8.0 µA ∆ICC additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A pins nA - 100 360 µA pin OE1 - 100 360 µA pin OE2 - 90 320 µA - 3.5 - pF CI VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V input capacitance Tamb = −40 °C to +85 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = −20 µA 4.4 - - V IO = −6.0 mA 3.84 - - V - - 0.1 V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 µA IO = 6.0 mA II input leakage current VI = VCC or GND; VCC = 5.5 V 74HC_HCT366_3 Product data sheet - - 0.33 V - - ±1.0 µA © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 7 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 7. Static characteristics 74HCT366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V ICC supply current ∆ICC additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A Min Typ Max Unit ±5.0 µA - - 80 µA pins nA - - 450 µA pin OE1 - - 450 µA pin OE2 - - 400 µA VI = VCC or GND; IO = 0 A; VCC = 5.5 V Tamb = −40 °C to +125 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = −20 µA 4.4 - - V IO = −6.0 mA 3.7 - - V IO = 20 µA - - 0.1 V IO = 6.0 mA - - 0.4 V - - ±1.0 µA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V II input leakage current VI = VCC or GND; VCC = 5.5 V IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V - - ±10.0 µA ICC supply current - - 160 µA ∆ICC additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A pins nA - - 490 µA pin OE1 - - 490 µA pin OE2 - - 441 µA VI = VCC or GND; IO = 0 A; VCC = 5.5 V 10. Dynamic characteristics Table 8. Dynamic characteristics 74HC366 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - 33 100 ns VCC = 4.5 V - 12 20 ns VCC = 5 V; CL = 15 pF - 10 - ns - 10 17 ns VCC = 2.0 V - 44 150 ns VCC = 4.5 V - 16 30 ns VCC = 6.0 V - 13 26 ns Tamb = 25 °C tpd propagation delay nA to nY; see Figure 6 [1] VCC = 6.0 V ten enable time OEn to nY; see Figure 7 74HC_HCT366_3 Product data sheet [2] © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 8 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 8. Dynamic characteristics 74HC366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter tdis tt CPD disable time transition time power dissipation capacitance Conditions Min Typ Max Unit VCC = 2.0 V - 55 150 ns VCC = 4.5 V - 20 30 ns VCC = 6.0 V - 16 26 ns VCC = 2.0 V - 14 60 ns VCC = 4.5 V - 5 12 ns VCC = 6.0 V - 4 10 ns - 30 - pF VCC = 2.0 V - - 125 ns VCC = 4.5 V - - 25 ns - - 21 ns VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns - - 33 ns VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns - - 33 ns VCC = 2.0 V - - 75 ns VCC = 4.5 V - - 15 ns VCC = 6.0 V - - 13 ns VCC = 2.0 V - - 150 ns VCC = 4.5 V - - 30 ns VCC = 6.0 V - - 26 ns VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns VCC = 6.0 V - - 38 ns VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns VCC = 6.0 V - - 38 ns OEn to nY; see Figure 7 see Figure 6 [3] [4] per buffer; VI = GND to VCC [5] nA to nY; see Figure 6 [1] Tamb = −40 °C to +85 °C tpd propagation delay VCC = 6.0 V ten enable time OEn to nY; see Figure 7 [2] VCC = 6.0 V tdis disable time OEn to nY; see Figure 7 [3] VCC = 6.0 V tt transition time see Figure 6 [4] Tamb = −40 °C to +125 °C tpd ten tdis propagation delay enable time disable time nA to nY; see Figure 6 OEn to nY; see Figure 7 OEn to nY; see Figure 7 74HC_HCT366_3 Product data sheet [1] [2] [3] © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 9 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 8. Dynamic characteristics 74HC366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter tt transition time [1] tpd is the same as tPHL and tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPHZ and tPLZ. Conditions Min Typ Max Unit VCC = 2.0 V - - 90 ns VCC = 4.5 V - - 18 ns VCC = 6.0 V - - 15 ns see Figure 6 [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. [4] Table 9. Dynamic characteristics 74HCT366 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Conditions Min Typ Max Unit - 13 24 ns Tamb = 25 °C propagation delay tpd nA to nY; see Figure 6 [1] VCC = 4.5 V VCC = 5 V; CL = 15 pF enable time ten - 11 - ns OEn to nY; VCC = 4.5 V; see Figure 7 [2] - 16 35 ns tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] - 20 35 ns tt transition time VCC = 4.5 V; see Figure 6 [4] - 5 12 ns power dissipation capacitance per buffer; VI = GND to (VCC − 1.5 V) [5] - 30 - pF nA to nY; VCC = 4.5 V; see Figure 6 [1] - - 30 ns OEn to nY; VCC = 4.5 V; see Figure 7 [2] - - 44 ns OEn to nY; VCC = 4.5 V; see Figure 7 [3] - - 44 ns VCC = 4.5 V; see Figure 6 [4] - - 15 ns nA to nY; VCC = 4.5 V; see Figure 6 [1] - - 36 ns OEn to nY; VCC = 4.5 V; see Figure 7 [2] - - 53 ns - - 53 ns - - 18 ns CPD Tamb = −40 °C to +85 °C propagation delay tpd enable time ten disable time tdis transition time tt Tamb = −40 °C to +125 °C propagation delay tpd enable time ten tdis disable time OEn to nY; VCC = 4.5 V; see Figure 7 [3] tt transition time VCC = 4.5 V; see Figure 6 [4] [1] tpd is the same as tPHL and tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPHZ and tPLZ. 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 10 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 11. Waveforms VI nA input VM VM GND t PHL t PLH VOH nY output VM VM VOL t THL t TLH 001aaf585 Measurement points are given in Table 10. VOL and VOH are typical output voltage drop that occur with the output load. Fig 6. Propagation delay data input (nA) to output (nY) and output transition time VI VM VM OEn input GND tPLZ tPZL VCC nY output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY nY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled 001aaf586 Measurement points are given in Table 10. VOL and VOH are typical output voltage drop that occur with the output load. Fig 7. 3-state enable and disable times 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 11 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting Table 10. Measurement points Type Input Output VM VM VX VY 74HC366 0.5VCC 0.5VCC 0.1 × VCC 0.9 × VCC 74HCT366 1.3 V 1.3 V 0.1 × VCC 0.9 × VCC VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC PULSE GENERATOR VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 11. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor S1 = Test selection switch Fig 8. Load circuitry for measuring switching times Table 11. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC366 VCC 6 ns 15 pF, 50 pF 1 kΩ open GND VCC 74HCT366 3V 6 ns 15 pF, 50 pF 1 kΩ open GND VCC 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 12 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SOT109-1 (SO16) 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 13 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SOT338-1 (SSOP16) 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 14 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.7 1.40 1.14 0.53 0.38 0.32 0.23 21.8 21.4 6.48 6.20 2.54 7.62 3.9 3.4 8.25 7.80 9.5 8.3 0.254 2.2 inches 0.19 0.02 0.15 0.055 0.045 0.021 0.015 0.013 0.009 0.86 0.84 0.26 0.24 0.1 0.3 0.15 0.13 0.32 0.31 0.37 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT38-1 050G09 MO-001 SC-503-16 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 11. Package outline SOT38-1 (DIP16) 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 15 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 16 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 13. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 14. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT366_3 20061121 Product data sheet - 74HC_HCT366_CNV_2 Modifications: 74HC_HCT366_CNV_2 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors • • Legal texts have been adapted to the new company name where appropriate Added family specification 19901201 Product specification 74HC_HCT366_3 Product data sheet - - © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 17 of 19 74HC366; 74HCT366 NXP Semiconductors Hex buffer/line driver; 3-state; inverting 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] 74HC_HCT366_3 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 03 — 21 November 2006 18 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 21 November 2006 Document identifier: 74HC_HCT366_3