INTEGRATED CIRCUITS DATA SHEET 74LVC2G17 Dual non-inverting Schmitt-trigger with 5 V tolerant input Product specification Suppersedes data of 2003 Aug 13 2004 Sep 08 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 FEATURES APPLICATIONS • Wide supply voltage range from 1.65 V to 5.5 V • Wave and pulse shapers for highly noisy environments. • 5 V tolerant input/output for interfacing with 5 V logic • High noise immunity DESCRIPTION • Complies with JEDEC standard: The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. – JESD8-7 (1.65 V to 1.95 V) – JESD8-5 (2.3 V to 2.7 V) Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. – JESD8B/JESD36 (2.7 V to 3.6 V). • ESD protection: – HBM EIA/JESD22-A114-B exceeds 2000 V This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging back flow current through the device when it is powered down. – MM EIA/JESD22-A115-A exceeds 200 V. • ±24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • Latch-up performance exceeds 250 mA The 74LVC2G17 provides two non-inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. • Direct interface with TTL levels • Multiple package options • Specified from −40 °C to +85 °C and −40 °C to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL tPHL/tPLH PARAMETER CONDITIONS propagation delay inputs nA to output nY VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ TYPICAL UNIT 5.6 ns VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 3.7 ns VCC = 2.7 V; CL = 50 pF; RL = 500 Ω 3.8 ns VCC = 3.3 V; CL = 50 pF; RL = 500 Ω 3.6 ns VCC = 5.0 V; CL = 50 pF; RL = 500 Ω 2.7 ns CI input capacitance 3.5 pF CPD power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 16.3 pF Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; ∑(CL × VCC2 × fo) = sum of outputs. 2. The condition is VI = GND to VCC. 2004 Sep 08 2 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 FUNCTION TABLE See note 1. INPUT OUTPUT nA nY L L H H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE MARKING 74LVC2G17GW −40 °C to +125 °C 6 SC-88 plastic SOT363 VV 74LVC2G17GV −40 °C to +125 °C 6 SC-74 plastic SOT457 V17 74LVC2G17GM −40 °C to +125 °C 6 XSON6 plastic SOT886 VV PINNING PIN SYMBOL DESCRIPTION 1 1A data input 2 GND ground (0 V) 3 2A data input 4 2Y data output 5 VCC supply voltage 6 1Y data output 17 1A 1 GND 2 2A 3 17 6 1Y 5 VCC 4 2Y 001aab674 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y 001aab675 Transparent top view Fig.1 Pin configuration SC-88 and SC-74. 2004 Sep 08 Fig.2 Pin configuration XSON6. 3 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input handbook, halfpage handbook, halfpage 1 1A 1Y 6 3 2A 2Y 4 MNB066 handbook, halfpage 1 6 3 4 MNB067 Fig.3 Logic symbol. Fig.4 IEC logic symbol. 1A 1Y 2A 2Y MNB068 Fig.5 Logic diagram. 2004 Sep 08 74LVC2G17 4 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage 0 VCC V Tamb operating ambient temperature −40 +125 °C LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. −0.5 MAX. VCC supply voltage IIK input diode current VI < 0 V − −50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO > VCC or VO < 0 V − ±50 mA VO output voltage active mode; notes 1 and 2 −0.5 VCC + 0.5 V Power-down mode; notes 1 and 2 −0.5 IO output source or sink current VO = 0 V to VCC − +6.5 UNIT V +6.5 V ±50 mA ICC, IGND VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C PD power dissipation − 300 mW Tamb = −40 °C to +125 °C Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. 2004 Sep 08 5 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 °C to +85 °C VOL VOH LOW-level output voltage VI = VIH or VIL HIGH-level output voltage IO = 100 µA 1.65 to 5.5 − − 0.1 V IO = 4 mA 1.65 − − 0.45 V IO = 8 mA 2.3 − − 0.3 V IO = 12 mA 2.7 − − 0.4 V IO = 24 mA 3.0 − − 0.55 V IO = 32 mA 4.5 − − 0.55 V IO = −100 µA 1.65 to 5.5 VCC − 0.1 − − V IO = −4 mA 1.65 1.2 − − V IO = −8 mA 2.3 1.9 − − V IO = −12 mA 2.7 2.2 − − V IO = −24 mA 3.0 2.3 − − V VI = VIH or VIL IO = −32 mA 4.5 3.8 − − V ILI input leakage current VI = 5.5 V or GND 5.5 − ±0.1 ±5 µA Ioff power OFF leakage current VI or VO = 5.5 V 0 − ±0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A 5.5 − 0.1 10 µA ∆ICC additional quiescent supply current per pin 2.3 to 5.5 − 5 500 µA 2004 Sep 08 VI = VCC − 0.6 V; IO = 0 A 6 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 °C to +125 °C VOL VOH LOW-level output voltage VI = VIH or VIL HIGH-level output voltage IO = 100 µA 1.65 to 5.5 − − 0.1 V IO = 4 mA 1.65 − − 0.70 V IO = 8 mA 2.3 − − 0.45 V IO = 12 mA 2.7 − − 0.60 V IO = 24 mA 3.0 − − 0.80 V IO = 32 mA 4.5 − − 0.80 V VI = VIH or VIL IO = −100 µA 1.65 to 5.5 VCC − 0.1 − − V IO = −4 mA 1.65 0.95 − − V IO = −8 mA 2.3 1.7 − − V IO = −12 mA 2.7 1.9 − − V IO = −24 mA 3.0 2.0 − − V IO = −32 mA 4.5 3.4 − − V ILI input leakage current VI = 5.5 V or GND 5.5 − ±0.1 ±20 µA Ioff power OFF leakage current VI or VO = 5.5 V 0 − − ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A 5.5 − − 40 µA ∆ICC additional quiescent supply current per pin 2.3 to 5.5 − − 5000 µA VI = VCC − 0.6 V; IO = 0 A Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2004 Sep 08 7 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 TRANSFER CHARACTERISTICS Voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = −40 °C to +85 °C VT+ VT− VH positive-going threshold negative-going threshold hysteresis (VT+ − VT−) see Figs 6 and 7 see Figs 6 and 7 see Figs 6, 7 and 8 1.8 0.70 1.10 1.50 V 2.3 1.00 1.40 1.80 V 3.0 1.30 1.76 2.20 V 4.5 1.90 2.47 3.10 V 5.5 2.20 2.91 3.60 V 1.8 0.25 0.61 0.90 V 2.3 0.40 0.80 1.15 V 3.0 0.60 1.04 1.50 V 4.5 1.00 1.55 2.00 V 5.5 1.20 1.86 2.30 V 1.8 0.15 0.49 1.00 V 2.3 0.25 0.60 1.10 V 3.0 0.40 0.73 1.20 V 4.5 0.60 0.92 1.50 V 5.5 0.70 1.02 1.70 V Tamb = −40 °C to +125 °C VT+ VT− VH positive-going threshold negative-going threshold hysteresis (VT+ − VT−) see Figs 6 and 7 see Figs 6 and 7 see Figs 6, 7 and 8 Note 1. All typical values are measured at Tamb = 25 °C. 2004 Sep 08 8 1.8 0.70 − 1.70 V 2.3 1.00 − 2.00 V 3.0 1.30 − 2.40 V 4.5 1.90 − 3.30 V 5.5 2.20 − 3.80 V 1.8 0.25 − 1.10 V 2.3 0.40 − 1.35 V 3.0 0.60 − 1.70 V 4.5 1.00 − 2.20 V 5.5 1.20 − 2.50 V 1.8 0.15 − 1.20 V 2.3 0.25 − 1.30 V 3.0 0.40 − 1.40 V 4.5 0.60 − 1.70 V 5.5 0.70 − 1.90 V Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input handbook, halfpage 74LVC2G17 VO VT+ VI VH VT− VO VI VH VT− VT+ mnb070 MNB069 VT+ and VT− are between limits of 20 % and 70 %. Fig.6 Transfer characteristic. Fig.7 Definition of VT+, VT− and VH. mnb071 14 ICC (mA) 12 10 8 6 4 2 0 0 0.5 1 1.5 2 VI (V) VCC = 3.0 V. Fig.8 Typical 74LVC2G17 transfer characteristic. 2004 Sep 08 9 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP.(1) MAX. UNIT VCC (V) Tamb = −40 °C to +85 °C tPHL/tPLH propagation delay nA to nY see Figs 9 and 10 1.65 to 1.95 1.5 5.6 10.5 ns 2.3 to 2.7 1.0 3.7 6.5 ns 2.7 1.0 3.8 6.5 ns 3.0 to 3.6 1.0 3.6 5.7 ns 4.5 to 5.5 1.0 2.7 4.3 ns Tamb = −40 °C to +125 °C tPHL/tPLH propagation delay nA to nY see Figs 9 and 10 1.65 to 1.95 1.5 − 13.1 ns 2.3 to 2.7 1.0 − 8.5 ns 2.7 1.0 − 8.5 ns 3.0 to 3.6 1.0 − 7.1 ns 4.5 to 5.5 1.0 − 5.4 ns Note 1. All typical values are measured at Tamb = 25 °C. AC WAVEFORMS VI nA input VM VM GND tPLH tPHL VOH VM nY output VM VOL mnb072 INPUT VCC VM VI tr = tf 1.65 V to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 V to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 V to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 V to 5.5 V 0.5 × VCC VCC ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.9 The input (nA) to output (nY) propagation delays and the output transition times. 2004 Sep 08 10 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 VEXT VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL mna616 VCC VEXT CL RL VCC 30 pF 1 kΩ open GND 2 × VCC 2.3 V to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6V 3.0 V to 3.6 V 2.7 V 50 pF 500 Ω open GND 6V 4.5 V to 5.5 V VCC 50 pF 500 Ω open GND 2 × VCC 1.65 V to 1.95 V VI tPLH/tPHL tPZH/tPHZ tPZL/tPLZ Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.10 Load circuitry for switching times. 2004 Sep 08 11 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input APPLICATION INFORMATION mnb073 50 ICC (mA) 40 30 20 10 0 2 3 4 5 VCC (V) 6 Linear change of VI between 0.8 V to 2.0 V. All values given are typical unless otherwise specified. Fig.11 Average ICC for 74LVC2G17. 2004 Sep 08 12 74LVC2G17 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 PACKAGE OUTLINES Plastic surface mounted package; 6 leads SOT363 D E B y X A HE 6 v M A 4 5 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION SOT363 2004 Sep 08 REFERENCES IEC JEDEC EIAJ SC-88 13 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 Plastic surface mounted package; 6 leads SOT457 D E B y A HE 6 X v M A 4 5 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION SOT457 2004 Sep 08 REFERENCES IEC JEDEC EIAJ SC-74 14 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× (2) L L1 e 6 5 e1 4 e1 6× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 1.5 1.4 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 2004 Sep 08 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 MO-252 15 Philips Semiconductors Product specification Dual non-inverting Schmitt-trigger with 5 V tolerant input 74LVC2G17 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2004 Sep 08 16 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA76 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/02/pp17 Date of release: 2004 Sep 08 Document order number: 9397 750 13781