Philips Semiconductors Product specification PowerMOS transistor GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope featuring stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications. PINNING - TO220AB PIN QUICK REFERENCE DATA SYMBOL PARAMETER MAX. UNIT VDS ID Ptot RDS(ON) Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance 100 34 175 0.057 V A W Ω PIN CONFIGURATION DESCRIPTION 1 gate 2 drain 3 source tab PHP33N10 SYMBOL d tab g drain s 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT ID Continuous drain current IDM PD ∆PD/∆Tmb VGS Tj, Tstg Pulsed drain current Total dissipation Linear derating factor Gate-source voltage Operating junction and storage temperature range Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C Tmb > 25 ˚C - 55 34 24 136 150 1.167 ± 30 175 A A A W W/K V ˚C THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance junction to mounting base Thermal resistance junction to ambient Rth j-a April 1998 CONDITIONS 1 MIN. TYP. MAX. UNIT - - 1 K/W - 60 - K/W Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor PHP33N10 ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS VGS = 0 V; ID = 0.25 mA 100 - - V ∆V(BR)DSS / ∆Tj RDS(ON) VGS(TO) gfs IDSS Drain-source breakdown voltage Drain-source breakdown voltage temperature coefficient Drain-source on resistance Gate threshold voltage Forward transconductance Drain-source leakage current VDS = VGS; ID = 0.25 mA - 0.15 - V/K IGSS Gate-source leakage current 2.0 12 - 0.052 3.0 16 1 100 10 0.057 4.0 25 250 100 Ω V S µA µA nA Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 17 A; VDD = 80 V; VGS = 10 V - 42 8 20 50 11 30 nC nC nC td(on) tr td(off) tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 50 V; ID = 17 A; RG = 9.1 Ω; RD = 2.9 Ω - 18 40 125 50 - ns ns ns ns Ld Internal drain inductance - 3.5 - nH Ld Internal drain inductance - 4.5 - nH Ls Internal source inductance Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad - 7.5 - nH Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1500 450 130 - pF pF pF MIN. TYP. MAX. UNIT VGS = 10 V; ID = 17 A VDS = VGS; ID = 0.25 mA VDS = 50 V; ID = 17 A VDS = 100 V; VGS = 0 V VDS = 80 V; VGS = 0 V; Tj = 150 ˚C VGS = ±30 V; VDS = 0 V SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IS Tmb = 25˚C - - 34 A Tmb = 25˚C - - 136 A VSD Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage IS = 34 A; VGS = 0 V - - 1.5 V trr Reverse recovery time IS = 17 A; VGS = 0 V; dI/dt = 100 A/µs - 200 - ns Qrr Reverse recovery charge - 1.0 - µC ISM April 1998 2 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor Normalised Power Derating PD% 120 PHP33N10 Zth j-mb / (K/W) 10 BUKx56-lv 110 100 90 D= 1 80 0.5 70 0.2 0.1 0.05 60 0.1 50 0.02 40 30 0.01 tp PD D= 0 20 10 0 0 20 40 60 80 100 Tmb / C 120 140 160 180 1E-05 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 1E-03 t/s 1E-01 1E+01 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Normalised Current Derating ID% 120 t T 0.001 tp T 70 ID / A 110 60 100 90 20 VGS / V = 15 10 BUK456-100A 8 7 50 80 70 40 6 60 30 50 40 20 30 5 20 10 10 0 0 0 20 40 60 80 100 Tmb / C 120 140 160 180 ID / A 2 4 0.2 RDS(ON) / Ohm 4.5 5 VD )= 100 N (O 10 BUK456-100A 5.5 6 6.5 7 VGS / V = A B S RD 8 Fig.5. Typical output characteristics. ID = f(VDS); parameter VGS BUK456-100A,B ID S/ 6 VDS / V Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V 1000 4 0 7.5 8 tp = 10 us 10 0.1 100 us 10 20 1 ms DC 10 ms 100 ms 1 0 1 100 10 1000 VDS / V Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp April 1998 0 20 40 ID / A 60 80 Fig.6. Typical on-state resistance. RDS(ON) = f(ID); parameter VGS 3 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor PHP33N10 ID / A 70 VGS(TO) / V BUK456-100A max. 25 Tj / C = 60 4 150 typ. 50 3 40 min. 2 30 20 1 10 0 0 0 2 4 6 8 10 -60 -20 20 VGS / V 100 140 180 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj gfs / S 60 Tj / C BUK456-100A SUB-THRESHOLD CONDUCTION ID / A 1E-01 20 1E-02 2% 1E-03 10 typ 98 % 1E-04 1E-05 1E-06 0 0 20 40 ID / A 60 0 Fig.8. Typical transconductance. gfs = f(ID); parameter Tj 2.4 2 VGS / V 3 4 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Normalised RDS(ON) = f(Tj) a 1 10000 C / pF BUK4y6-100 2.2 2.0 1.8 Ciss 1.6 1000 1.4 Coss 1.2 1.0 0.8 100 Crss 0.6 0.4 0.2 0 -60 -20 20 60 Tj / C 100 140 10 180 0 40 VDS / V Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 17 A; VGS = 10 V April 1998 20 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 4 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor PHP33N10 BUK456-100 VGS / V 12 120 110 100 90 80 70 VDS / V =20 10 8 80 6 60 50 40 30 20 10 0 4 2 0 0 20 40 20 QG / nC Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS 1.15 EAS, Normalised unclamped inductive energy (%) 40 60 80 100 120 Starting Tj ( C) 160 180 Fig.16. Normalised unclamped inductive energy. EAS% = f(Tj) Normalised Drain-source breakdown voltage V(BR)DSS @ Tj + V(BR)DSS @ 25 C 1.1 VDD L VDS 1.05 - VGS 1 -ID/100 T.U.T. 0 0.95 0.9 RGS 0.85 -100 -50 0 50 Tj, Junction temperature (C) 100 IF / A R 01 shunt 150 Fig.17. Unclamped inductive test circuit. EAS = 0.5 ⋅ LID2 ⋅ V(BR)DSS /(V(BR)DSS − VDD ) Fig.14. Normalised drain-source breakdown voltage. V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj) 70 140 BUK456-100A 60 50 40 Tj / C = 150 25 30 20 10 0 0 1 VSDS / V 2 Fig.15. Source-Drain diode characteristic. IF = f(VSDS); parameter Tj April 1998 5 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor PHP33N10 MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8". April 1998 6 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor PHP33N10 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1998 7 Rev 1.100