PHILIPS 74HC3GU04DP

74HC3GU04
Inverter
Rev. 04. — 11 January 2010
Product data sheet
1. General description
The 74HC3GU04 is a high-speed Si-gate CMOS device. This device provides three
inverter gates with unbuffered outputs.
The 74HC3GU04 has CMOS input switching levels and supply voltage range 2 V to 6 V.
2. Features
„
„
„
„
„
„
„
Wide supply voltage range from 2.0 V to 6.0 V
Symmetrical output impedance
High noise immunity
Low-power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
‹ HBM JESD22-A114F exceeds 2 000 V
‹ MM JESD22-A115-A exceeds 200 V
„ Specified from −40 °C to +85 °C and −40 °C to +125 °C
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC3GU04DP
−40 °C to +125 °C
TSSOP8
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
74HC3GU04DC
−40 °C to +125 °C
VSSOP8
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
74HC3GU04GD
−40 °C to +125 °C
XSON8U
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; UTLP based; body 3 × 2 × 0.5 mm
4. Marking
Table 2.
Marking
Type number
Marking code
74HC3GU04DP
HU4
74HC3GU04DC
HU4
74HC3GU04GD
HU4
74HC3GU04
NXP Semiconductors
Inverter
5. Functional diagram
1
1A
1Y
1
1
7
3
1
5
6
1
2
7
3
2A
2Y
5
6
3A
3Y
2
mna720
Fig 1.
mna721
Logic symbol
Fig 2.
IEC logic symbol
6. Pinning information
6.1 Pinning
74HC3GU04
1A
1
8
VCC
3Y
2
7
1Y
2A
3
6
3A
GND
4
5
2Y
74HC3GU04
1A
1
8
VCC
3Y
2
7
1Y
2A
3
6
3A
GND
4
5
2Y
001aak023
Transparent top view
001aak022
Fig 3.
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
Fig 4.
Pin configuration SOT996-2 (XSON8U)
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
1A, 2A, 3A
1, 3, 6
data input
1Y, 2Y, 3Y
7, 5, 2
data output
GND
4
ground (0 V)
VCC
8
supply voltage
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
2 of 16
74HC3GU04
NXP Semiconductors
Inverter
7. Functional description
Table 4.
Function table [1]
Input
Output
nA
nY
L
H
H
L
[1]
H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
−0.5
+7.0
V
IIK
input clamping current
VI < −0.5 V or VI > VCC + 0.5 V
[1]
-
±20
mA
IOK
output clamping current
VO < −0.5 V or VO > VCC + 0.5 V
[1]
-
±20
mA
IO
output current
VO = −0.5 V to (VCC + 0.5 V)
[1]
-
±25
mA
quiescent supply current
[1]
-
50
mA
IGND
ground current
[1]
−50
-
mA
Tstg
storage temperature
−65
+150
°C
Ptot
total power dissipation
-
300
mW
ICC
[1]
[2]
Tamb = −40 °C to +125 °C
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K.
For XSON8U package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
Conditions
Typ
Max
Unit
2.0
5.0
6.0
V
0
-
VCC
V
0
-
VCC
V
−40
+25
+125
°C
VCC = 2.0 V
-
-
625
ns/V
VCC = 4.5 V
-
1.67
139
ns/V
VCC = 6.0 V
-
-
83
ns/V
74HC3GU04_4
Product data sheet
Min
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
3 of 16
74HC3GU04
NXP Semiconductors
Inverter
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
VIH
Parameter
HIGH-level input
voltage
VIL
LOW-level input
voltage
VOH
VOL
−40 °C to +85 °C
Conditions
HIGH-level output
voltage
−40 °C to +125 °C
Unit
Min
Typ[1]
Max
Min
Max
VCC = 2.0 V
1.7
1.1
-
1.7
-
V
VCC = 4.5 V
3.6
2.4
-
3.6
-
V
VCC = 6.0 V
4.8
3.1
-
4.8
-
V
VCC = 2.0 V
-
0.9
0.3
-
0.3
V
VCC = 4.5 V
-
2.1
0.9
-
0.9
V
VCC = 6.0 V
-
2.9
1.2
-
1.2
V
IO = −20 μA; VCC = 2.0 V
1.9
2.0
-
1.9
-
V
IO = −20 μA; VCC = 4.5 V
4.4
4.5
-
4.4
-
V
IO = −20 μA; VCC = 6.0 V
5.9
6.0
-
5.9
-
V
IO = −4.0 mA; VCC = 4.5 V
4.13
4.32
-
3.7
-
V
IO = −5.2 mA; VCC = 6.0 V
5.63
5.81
-
5.2
-
V
IO = 20 μA; VCC = 2.0 V
-
0
0.1
-
0.1
V
IO = 20 μA; VCC = 4.5 V
-
0
0.1
-
0.1
V
IO = 20 μA; VCC = 6.0 V
-
0
0.1
-
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.33
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.33
-
0.4
V
VI = VIH or VIL
LOW-level output
voltage
VI = VIH or VIL
II
input leakage current
VI = VCC or GND; VCC = 6.0 V
-
-
±1.0
-
±1.0
μA
ICC
supply current
per input pin; VI = VCC or GND;
IO = 0 A; VCC = 6.0 V
-
-
10
-
20
μA
CI
input capacitance
-
3.0
-
-
-
pF
[1]
All typical values are measured at Tamb = 25 °C.
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter
tpd
−40 °C to +85 °C
Conditions
Min
Typ[1]
Max
Min
Max
VCC = 2.0 V
-
13
75
-
90
ns
VCC = 4.5 V
-
6
15
-
18
ns
VCC = 6.0 V
-
5
13
-
15
ns
propagation delay nA to nY; see Figure 5
[2]
74HC3GU04_4
Product data sheet
−40 °C to +125 °C Unit
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
4 of 16
74HC3GU04
NXP Semiconductors
Inverter
Table 8.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter
tt
transition time
−40 °C to +85 °C
Conditions
Min
Max
Min
Max
VCC = 2.0 V
-
18
95
-
125
ns
VCC = 4.5 V
-
6
19
-
25
ns
-
5
16
-
20
ns
-
5
-
-
-
pF
[3]
nY; see Figure 5
VCC = 6.0 V
CPD
[4]
power dissipation VI = GND to VCC
capacitance
[1]
All typical values are measured at Tamb = 25 °C.
[2]
tpd is the same as tPLH and tPHL.
[3]
tt is the same as tTLH and tTHL.
[4]
−40 °C to +125 °C Unit
Typ[1]
CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of outputs.
12. Waveforms
VI
VM
nA input
VM
GND
t PHL
t PLH
VOH
90 %
VM
nY output
VM
10 %
VOL
t THL
t TLH
mna722
Measurement points are given in Table 9.
Fig 5.
Table 9.
Propagation delay data input (nA) to data output (nY) and transition time output (nY)
Measurement points
Type
74HC3GU04
Input
Output
VM
VM
0.5 × VCC
0.5 × VCC
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
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74HC3GU04
NXP Semiconductors
Inverter
VI
tW
90 %
negative
pulse
VM
0V
VI
tf
tr
tr
tf
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VCC
G
VI
VCC
VO
RL
S1
open
DUT
RT
CL
001aad983
Test data is given in Table 10.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 6.
Table 10.
Test circuit for measuring switching times
Test data
Type
74HC3GU04
Input
Load
VI
tr, tf
CL
RL
tPHL, tPLH
GND to VCC
≤ 6 ns
50 pF
1 kΩ
open
74HC3GU04_4
Product data sheet
S1 position
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
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74HC3GU04
NXP Semiconductors
Inverter
12.1 Additional characteristics
Rbias = 560 kΩ
VCC
0.47 μF
input
output
100 μF
VI
(f = 1 kHz)
A IO
GND
mna050
ΔI o
g fs = -------ΔV i
VO is constant.
Fig 7. Test set-up for measuring forward transconductance
mnb124
30
gfs
(mA/V)
20
10
0
0
2
4
6
VCC (V)
8
Tamb = 25 °C.
Fig 8. Typical forward transconductance as a function of supply voltage
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
7 of 16
74HC3GU04
NXP Semiconductors
Inverter
13. Typical transfer characteristics
mnb121
150
ICC
(μA)
120
1.6
90
1.2
60
0.8
30
0.4
0.4
0.8
1.2
1.6
VO
(V)
8
4
6
3
4
2
2
1
0
0
0
0
0
2
2
1
3
4
5
VI (V)
VI (V)
VCC = 2.0 V; IO = 0 A.
Fig 9.
5
I CC
(mA)
VO
(V)
0
mnb122
10
2
VCC = 4.5 V; IO = 0 A.
Typical transfer characteristics VCC = 2.0 V
Fig 10. Typical transfer characteristics VCC = 4.5 V
mnb123
20
6
I CC
(mA)
VO
(V)
16
12
3
8
4
0
0
0
2
4
VI (V)
6
VCC = 6.0 V; IO = 0 A.
Fig 11. Typical transfer characteristics VCC = 6.0 V
14. Application information
Some applications for the 74HC3GU04 are:
• Linear amplifier (see Figure 12)
• Crystal oscillator (see Figure 14).
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
8 of 16
74HC3GU04
NXP Semiconductors
Inverter
Remark: All values given are typical values unless otherwise specified.
R2
VCC
1 μF
R1
U04
ZL
mna052
ZL > 10 kΩ.
R1 ≥ 3 kΩ.
R2 ≤ 1 MΩ.
Open loop amplification: AOL = 20 (typical).
A OL
Voltage amplification: A V = – ----------------------------------------- .
R1
1 + ------- ( 1 + AOL )
R2
Vo(p-p) = VCC − 1.5 V centered at 0.5 × VCC.
Unity gain bandwidth product is 5 MHz (typical).
Input capacitance see Figure 13.
Fig 12. Linear amplifier application
mna054
80
input
capacitance
(pF)
(1)
60
(2)
40
(3)
20
0
0
2
4
6
VI (V)
8
(1) VCC = 2.0 V.
(2) VCC = 4.5 V.
(3) VCC = 6.0 V.
Fig 13. Typical input capacitance as a function of the input voltage
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
9 of 16
74HC3GU04
NXP Semiconductors
Inverter
R1
R2
U04
C1
C2
out
mna053
Test data is given in Table 11 and Table 12.
C1 = 47 pF (typical).
C2 = 22 pF (typical).
R1 = 1 MΩ to 10 MΩ (typical).
R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC
(ICC = 2 mA at VCC = 3.0 V and f = 1 MHz)
Fig 14. Crystal oscillator application
Table 11.
External components for resonator (f < 1 MHz)
Frequency
R1
R2
C1
C2
10 kHz to 15.9 kHz
2.2 MΩ
220 kΩ
56 pF
20 pF
16 kHz to 24.9 kHz
2.2 MΩ
220 kΩ
56 pF
10 pF
25 kHz to 54.9 kHz
2.2 MΩ
100 kΩ
56 pF
10 pF
55 kHz to 129.9 kHz
2.2 MΩ
100 kΩ
47 pF
5 pF
130 kHz to 199.9 kHz
2.2 MΩ
47 kΩ
47 pF
5 pF
200 kHz to 349.9 kHz
2.2 MΩ
47 kΩ
47 pF
5 pF
350 kHz to 600 kHz
2.2 MΩ
47 kΩ
47 pF
5 pF
Table 12.
Optimum value for R2
Frequency
R2
Optimum
3 kHz
2.0 kΩ
minimum required ICC
8.0 kΩ
minimum influence due to change in VCC
1.0 kΩ
minimum required ICC
4.7 kΩ
minimum influence by VCC
0.5 kΩ
minimum required ICC
2.0 kΩ
minimum influence by VCC
0.5 kΩ
minimum required ICC
2.0 kΩ
minimum influence by VCC
6 kHz
10 kHz
14 kHz
> 14 kHz
replace R2 by C3 = 35 pF (typical)
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
10 of 16
74HC3GU04
NXP Semiconductors
Inverter
15. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
D
E
A
SOT505-2
X
c
HE
y
v M A
Z
5
8
A
A2
(A3)
A1
pin 1 index
θ
Lp
L
1
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.15
0.00
0.95
0.75
0.25
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
0.65
4.1
3.9
0.5
0.47
0.33
0.2
0.13
0.1
0.70
0.35
8°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT505-2
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-01-16
---
Fig 15. Package outline SOT505-2 (TSSOP8)
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
11 of 16
74HC3GU04
NXP Semiconductors
Inverter
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
D
E
SOT765-1
A
X
c
y
HE
v M A
Z
5
8
Q
A
A2
A1
pin 1 index
(A3)
θ
Lp
1
4
e
L
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(2)
e
HE
L
Lp
Q
v
w
y
Z(1)
θ
mm
1
0.15
0.00
0.85
0.60
0.12
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
0.5
3.2
3.0
0.4
0.40
0.15
0.21
0.19
0.2
0.13
0.1
0.4
0.1
8°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT765-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-06-07
MO-187
Fig 16. Package outline SOT765-1 (VSSOP8)
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
12 of 16
74HC3GU04
NXP Semiconductors
Inverter
XSON8U: plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3 x 2 x 0.5 mm
B
D
SOT996-2
A
A
E
A1
detail X
terminal 1
index area
e1
v
w
b
e
L1
1
4
8
5
C
C A B
C
M
M
y
y1 C
L2
L
X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
b
D
E
e
e1
L
L1
L2
v
w
y
y1
mm
0.5
0.05
0.00
0.35
0.15
2.1
1.9
3.1
2.9
0.5
1.5
0.5
0.3
0.15
0.05
0.6
0.4
0.1
0.05
0.05
0.1
REFERENCES
OUTLINE
VERSION
IEC
SOT996-2
---
JEDEC
JEITA
---
EUROPEAN
PROJECTION
ISSUE DATE
07-12-18
07-12-21
Fig 17. Package outline SOT996-2 (XSON8U)
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
13 of 16
74HC3GU04
NXP Semiconductors
Inverter
16. Abbreviations
Table 13.
Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
17. Revision history
Table 14.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC3GU04_4
20100111
Product data sheet
-
74HC3GU04_3
Modifications:
•
Marking code for 74HC3GU04DP package changed from HU04 to HU4
74HC3GU04_3
20090511
Product data sheet
-
74HC3GU04_2
74HC3GU04_2
20031126
Product specification
-
74HC3GU04_1
74HC3GU04_1
20030818
Product specification
-
-
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
14 of 16
74HC3GU04
NXP Semiconductors
Inverter
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
18.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC3GU04_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 11 January 2010
15 of 16
74HC3GU04
NXP Semiconductors
Inverter
20. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
12.1
13
14
15
16
17
18
18.1
18.2
18.3
18.4
19
20
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Additional characteristics . . . . . . . . . . . . . . . . . 7
Typical transfer characteristics . . . . . . . . . . . . 8
Application information. . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 11 January 2010
Document identifier: 74HC3GU04_4