INTEGRATED CIRCUITS 74LVT00 3.3V Quad 2-input NAND gate Product specification IC24 Data Handbook 1996 Aug 15 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 2.7 2.7 ns tPLH tPHL Propagation delay An or Bn to Yn CL = 50pF; VCC = 3.3V CIN Input capacitance VI = 0V or 3.0V 3 pF ICCL Total supply current Outputs Low; VCC = 3.6V 1 mA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 14-Pin Plastic SO PACKAGES –40°C to +85°C 74LVT00 D 74LVT00 D SOT108-1 14-Pin Plastic SSOP –40°C to +85°C 74LVT00 DB 74LVT00 DB SOT337-1 14-Pin Plastic TSSOP –40°C to +85°C 74LVT00 PW 74LVT00PW DH SOT402-1 LOGIC SYMBOL PIN CONFIGURATION 1 2 4 5 9 10 12 13 A0 B0 A1 B1 A2 B2 3 6 8 1 14 VCC 2 13 B3 Y0 3 12 A3 A3 B3 Y0 Y1 Y2 Y3 VCC = Pin 14 GND = Pin 7 A0 B0 A1 4 11 Y3 B1 5 10 B2 Y1 6 9 A2 GND 7 8 Y2 SA00333 11 SA00334 PIN DESCRIPTION LOGIC SYMBOL (IEEE/IEC) 1 PIN NUMBER SYMBOL 1, 2, 4, 5, 9, 10, 12, 13 An-Bn 3, 6, 8, 11 Yn Data outputs 7 GND Ground (0V) 14 VCC Positive supply voltage NAME AND FUNCTION & 3 2 4 6 5 9 Data inputs 8 10 12 11 13 SF00004 1996 Aug 15 2 853-1858 17183 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 LOGIC DIAGRAM FUNCTION TABLE 1 A0 B0 VCC = Pin 14 GND = Pin 7 A1 B1 4 5 A2 B2 10 A3 B3 3 2 6 9 8 12 11 13 INPUTS Y0 Y1 Y2 Y3 SA00360 OUTPUT Dna Dnb L L Qn H L H H H L H H H NOTES: H = High voltage level L = Low voltage level L ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC PARAMETER CONDITIONS DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current VOUT DC output voltage3 IOUT DC output current Tstg Storage temperature range RATING UNIT –0.5 to +4.6 V VI < 0 –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +7.0 V Output in High state –32 Output in Low state 64 mA °C –65 to 150 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –20 mA IOL Low-level output current 32 mA ∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V Tamb Operating free-air temperature range +85 °C 1996 Aug 15 2.0 –40 3 V Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage High-level output voltage VOL Low-level output voltage II Input leakage current IOFF Output off current ICCH Quiescent supply current –1.2 CI V VCC–0.2 VCC = 2.7V; IOH = –6mA 2.4 VCC = 3.0V; IOH = –20mA 2.0 V VCC = 2.7V; IOL = 100µA 0.2 VCC = 2.7V; IOL = 24mA 0.5 VCC = 3.0V; IOL = 32mA 0.5 VCC = 0 or 3.6V; VI = 5.5V 10 VCC = 3.6V; VI = VCC or GND ±1 VCC = 0V; VI or VO = 0 to 4.5V ±100 VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 0.02 Additional supply current per input pin2 VCC = 3V to 3.6V; One input at VCC–0.6V, Other inputs at VCC or GND Input capacitance VI = 3V or 0 V µA A µA mA VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 ICCL ∆ICC MAX VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH TYP1 UNIT 1 2 0.2 3 µA pF NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specificed voltage level other than VCC or GND. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL tPLH tPHL PARAMETER Propagation delay An or Bn to Yn 1 NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V An, Bn VM VM tPHL Yn VM tPLH VM SF01395 Waveform 1. Propagation delay for inverting outputs 1996 Aug 15 VCC = 3.3V ± 0.3V VCC = 2.7V MIN TYP1 MAX MAX 1.0 1.0 2.7 2.7 4.1 3.9 5.0 3.8 WAVEFORM 4 UNIT ns Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 TEST CIRCUIT AND WAVEFORMS VCC 10% 0V tTHL (tF) D.U.T. RT CL AMP (V) VM 10% VOUT PULSE GENERATOR 90% VM NEGATIVE PULSE VIN tW 90% tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for Outputs AMP (V) 90% VM VM 10% 10% tW 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. 74LVT RT = Termination resistance should be equal to ZOUT of pulse generators. 1996 Aug 15 Amplitude Rep. Rate 2.7V ≤10MHz tW tR tF 500ns ≤2.5ns ≤2.5ns SV00022 5 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 SO14: plastic small outline package; 14 leads; body width 3.9 mm 1996 Aug 15 6 SOT108-1 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm 1996 Aug 15 7 SOT337-1 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm 1996 Aug 15 8 SOT402-1 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 NOTES 1996 Aug 15 9 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1996 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-04847