Philips Semiconductors Product specification PowerMOS transistor GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications. PINNING - TO220AB PIN QUICK REFERENCE DATA SYMBOL PARAMETER VDS ID Ptot RDS(ON) Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance PIN CONFIGURATION DESCRIPTION 1 gate 2 drain 3 source tab PHP8N20E MAX. UNIT 200 9.2 90 0.4 V A W Ω SYMBOL d tab g drain s 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS ID Continuous drain current IDM PD ∆PD/∆Tmb VGS EAS Pulsed drain current Total dissipation Linear derating factor Gate-source voltage Single pulse avalanche energy Peak avalanche current Tmb = 25 ˚C; VGS = 10 V Tmb = 100 ˚C; VGS = 10 V Tmb = 25 ˚C Tmb = 25 ˚C Tmb > 25 ˚C IAS Tj, Tstg Operating junction and storage temperature range VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω; VGS = 10 V VDD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω; VGS = 10 V MIN. MAX. UNIT - 9.2 6.5 37 90 0.6 ± 30 250 A A A W W/K V mJ - 9.2 A - 55 175 ˚C THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance junction to mounting base Thermal resistance junction to ambient Rth j-a February 1997 CONDITIONS 1 MIN. TYP. MAX. UNIT - - 1.67 K/W - 60 - K/W Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHP8N20E ELECTRICAL CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS VGS = 0 V; ID = 0.25 mA 200 - - V ∆V(BR)DSS / ∆Tj RDS(ON) VGS(TO) gfs IDSS Drain-source breakdown voltage Drain-source breakdown voltage temperature coefficient Drain-source on resistance Gate threshold voltage Forward transconductance Drain-source leakage current VDS = VGS; ID = 0.25 mA - 0.25 - V/K IGSS Gate-source leakage current VGS = 10 V; ID = 6.4 A VDS = VGS; ID = 0.25 mA VDS = 50 V; ID = 5.4 A VDS = 200 V; VGS = 0 V VDS = 160 V; VGS = 0 V; Tj = 125 ˚C VGS = ±30 V; VDS = 0 V 2.0 3.8 - 0.35 3.0 4.7 1 30 10 0.4 4.0 25 250 100 Ω V S µA µA nA Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 5.9 A; VDD = 160 V; VGS = 10 V - 30 4.5 15 40 6 20 nC nC nC td(on) tr td(off) tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 100 V; ID = 5.9 A; RG = 12 Ω; RD = 16 Ω - 12 45 80 40 - ns ns ns ns Ld Internal drain inductance - 3.5 - nH Ld Internal drain inductance - 4.5 - nH Ls Internal source inductance Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad - 7.5 - nH Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 700 100 50 - pF pF pF MIN. TYP. MAX. UNIT SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IS Tmb = 25˚C - - 9.2 A Tmb = 25˚C - - 37 A VSD Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage IS = 9 A; VGS = 0 V - - 1.5 V trr Reverse recovery time IS = 5.9 A; VGS = 0 V; dI/dt = 100 A/µs - 180 - ns Qrr Reverse recovery charge - 1.2 - µC ISM February 1997 2 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor 120 PHP8N20E Normalised Power Derating PD% 10 Zth / (K/W) BUKx54-lv 110 100 D= 90 80 1 0.5 70 60 0.2 50 0.1 40 0.1 0.05 30 tp PD 0.02 D= 20 10 0 0 0 20 40 60 80 100 Tmb / C 120 140 160 0.01 1E-07 180 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 120 1E-03 t/s 1E-01 1E+01 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Normalised Current Derating ID% t T 1E-05 tp T 20 ID / A 110 BUK444-200A 8 10 20 VGS / V = 100 90 15 7 80 70 60 10 50 6 40 30 5 5 20 10 0 0 0 20 40 60 80 100 Tmb / C 120 140 160 180 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V 100 ID / A ID S/ VD N 1.5 (O 6 8 10 12 VDS / V 14 16 18 4 20 BUK454-200A 5.5 4.5 5 6 6.5 7 VGS / V = 7.5 tp = 10 us S RD 10 4 RDS(ON) / Ohm A B 2 Fig.5. Typical output characteristics. ID = f(VDS); parameter VGS BUK454-200A,B )= 0 8 1.0 100 us 1 ms DC 1 10 0.5 10 ms 100 ms 0 0.1 1 10 100 VDS / V 1000 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp February 1997 20 0 2 4 6 8 10 12 ID / A 14 16 18 20 Fig.6. Typical on-state resistance. RDS(ON) = f(ID); parameter VGS 3 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor 20 PHP8N20E ID / A VGS(TO) / V BUK454-200A max. 4 Tj / C = 150 25 15 typ. 3 min. 10 2 5 0 1 0 0 2 4 6 8 10 -60 -20 20 VGS / V gfs / S 100 140 180 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj 6 60 Tj / C BUK454-200A 5 SUB-THRESHOLD CONDUCTION ID / A 1E-01 1E-02 4 2% 1E-03 typ 98 % 3 1E-04 2 1E-05 1 1E-06 0 0 2 4 6 8 10 12 ID / A 14 16 18 0 20 Fig.8. Typical transconductance. gfs = f(ID); parameter Tj 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2 VGS / V 3 4 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Normalised RDS(ON) = f(Tj) a 1 10000 BUK4y4-200 C / pF 1000 Ciss 100 Coss Crss -60 -20 20 60 Tj / C 100 140 10 180 0 40 VDS / V Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 5.9 A; VGS = 10 V February 1997 20 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 4 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHP8N20E BUK454-200 VGS / V 12 120 110 100 90 80 70 VDS / V =40 10 160 8 6 60 50 40 30 20 10 0 4 2 0 0 4 8 12 16 QG / nC 20 24 28 20 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS 1.15 EAS, Normalised unclamped inductive energy (%) 40 60 80 100 120 Starting Tj ( C) 160 180 Fig.16. Normalised unclamped inductive energy. EAS% = f(Tj) Normalised Drain-source breakdown voltage V(BR)DSS @ Tj + V(BR)DSS @ 25 C 1.1 VDD L VDS 1.05 - VGS 1 -ID/100 T.U.T. 0 0.95 0.9 RGS 0.85 -100 -50 0 50 Tj, Junction temperature (C) 100 IF / A R 01 shunt 150 Fig.17. Unclamped inductive test circuit. EAS = 0.5 ⋅ LID2 ⋅ V(BR)DSS /(V(BR)DSS − VDD ) Fig.14. Normalised drain-source breakdown voltage. V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj) 20 140 BUK454-200A 15 10 Tj / C = 150 5 25 0 0 1 VSDS / V 2 Fig.15. Source-Drain diode characteristic. IF = f(VSDS); parameter Tj February 1997 5 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHP8N20E MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8". February 1997 6 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor PHP8N20E DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. February 1997 7 Rev 1.000